DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Information Disclosure Statement
The information disclosure statement (IDS) submitted on 8/8/2024 is in compliance with the provisions of 37 CFR 1.97. Accordingly, the information disclosure statement is being considered by the examiner.
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
Claims 1-5, 7, 16, and 18-19 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Hirano (US 2018/0277723 A1).
Regarding claim 1, Hirano teaches a light-emitting diode (LED) chip (light emitting element 10, Fig. 1, [0058]), comprising:
an active LED structure (comprising n-type clad layer 22, active layer 23, p-type clad layer 25, and p-type contact layer 26, Fig. 1, [0059]: “A light emitting diode structure is formed by layers from the n-type clad layer 22 to the p-type contact layer 26.”) comprising an n-type layer (n-type clad layer 22, Fig. 1), a p-type layer (p-type clad layer 25, Fig. 1), and an active layer (active layer 23, Fig. 1) between the n-type layer (n-type clad layer 22, Fig. 1) and the p-type layer (p-type clad layer 25, Fig. 1); and
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a light-extraction film (back surface covering layer 15, Figs. 1-2, [0088]: “it can be found that the light extraction efficiency is improved by providing the back surface covering layer 15 having the apertures 16 with a forward tapered cross-sectional shape on the back surface of the sapphire substrate 11.”) on the active LED structure (comprising n-type clad layer 22, active layer 23, p-type clad layer 25, and p-type contact layer 26, Fig. 1), the light extraction film (back surface covering layer 15, Fig. 2) comprising a light-extraction element (comprising apertures 16 and surrounding material of the back surface covering layer 15, see light-extraction elements in Illustrative Fig. 1 which is an annotated version of Figs, 2 and 3A (Fig. 3A is top view of Fig. 2), [0088]) that includes an internal cavity (inside of the apertures 16, see internal cavity as labeled in Illustrative Fig. 1) bounded by inner sidewalls (inner sidewalls, Illustrative Fig. 1) of the light-extraction film (back surface covering layer 15, Illustrative Fig. 1).
Regarding claim 2, Hirano teaches the LED chip of claim 1, further comprising a substrate (sapphire substrate 11, Fig. 1, [0063]) between the active LED structure (comprising n-type clad layer 22, active layer 23, electron block layer 24, p-type clad layer 25, and p-type contact layer 26, Fig. 1) and the light-extraction film (back surface covering layer 15, Fig. 1).
Regarding claim 3, Hirano teaches the LED chip of claim 1, wherein a base of the internal cavity (see base of internal cavity in Illustrative Fig. 1) is positioned closer to the active LED structure (comprising n-type clad layer 22, active layer 23, electron block layer 24, p-type clad layer 25, and p-type contact layer 26, Fig. 1: the base of the internal cavity is closer to the substrate 11 which is the side of the active LED structure) than a top of the internal cavity (top of internal cavity in Illustrative Fig, 1), and the base of the internal cavity (base of internal cavity, Illustrative Fig. 1) is wider (see Illustrative Fig. 1) than the top of the internal cavity (top of internal cavity, Illustrative Fig, 1).
Regarding claim 4, Hirano teaches the LED chip of claim 3, wherein the top of the internal cavity (top of internal cavity, Illustrative Fig, 1) is open (see Illustrative Fig. 1) at a surface of the light-extraction film (the surface of back surface covering layer 15 away from the substrate 11, Illustrative Fig. 1).
Regarding claim 5, Hirano teaches the LED chip of claim 3, wherein the internal cavity (internal cavity, Illustrative Fig. 1) forms a shape of a cone (see Illustrative Fig 1: truncated cone as the top view is a circle, and side view is an isosceles trapezoid) within the light-extraction element (back surface covering layer 15, Illustrative Fig. 1).
Regarding claim 7, Hirano teaches the LED chip of claim 1, wherein the light-extraction element (light extraction element, Illustrative Fig. 1) is one of a plurality of light-extraction elements (each aperture and surrounding material of the back surface covering layer 15 corresponds to a light-extraction element, Illustrative Fig. 1), and each light-extraction element (one of the light extraction elements, Illustrative Fig. 1) of the plurality of light-extraction elements (light extraction elements, Illustrative Fig. 1) includes a separate internal cavity (Illustrative Fig. 1: each light extraction element has an internal cavity) bounded by angled sidewalls of the light-extraction film (back surface covering layer 15, Illustrative Fig. 1: each internal cavity is bounded by the angled sidewalls of the material of the light -extraction film 15).
Regarding claim 16, Hirano teaches a light-emitting diode (LED) package (light emitting device 1 Fig. 5, [0069]) comprising:
an LED chip (light emitting element 10 of Fig. 1 comprising semiconductor laminated portion 12, n electrodes 13, and sapphire substrate 11, but without the back surface covering layer 15; Fig. 5, [0063] and [0069]); and
a light-extraction film (back surface covering layer 15, Figs. 1 and 5: while Fig. 5 does not show the back surface covering layer 15, the structure contains this layer at the back surface of the substrate ([0069]), see Illustrative Fig. 2 which is an annotated version of Figs. 1 and 5) on the LED chip (comprising semiconductor laminated portion 12, n electrodes 13, and sapphire substrate 11, Illustrative Fig. 2), the light extraction film comprising a plurality of light-extraction elements (comprising apertures 16 and surrounding material of the back surface covering layer 15, see light-extraction elements in Illustrative Fig. 1, [0088]), each light-extraction element (light-extraction elements in Illustrative Fig. 1) of the plurality of light-extraction elements (light-extraction elements in Illustrative Fig. 1) forming an internal cavity (inside of the apertures 16, see internal cavity as labeled in Illustrative Fig. 1) bounded by inner sidewalls (inner sidewalls, Illustrative Fig. 1) of the light-extraction film (back surface covering layer 15, Illustrative Fig. 1).
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Regarding claim 18, Hirano teaches the LED package of claim 16, further comprising a support structure (submount 30, Illustrative Fig. 2) on which the LED chip (comprising semiconductor laminated portion 12, n electrodes 13, and sapphire substrate 11, Illustrative Fig. 2) is mounted, the support structure (submount 30, Illustrative Fig. 2) comprising a submount ([0069]) or a lead frame structure.
Regarding claim 19, Hirano teaches the LED package of claim 16, wherein a base of the internal cavity (base of internal cavity, Illustrative Fig. 1) is positioned closer to the LED chip (comprising semiconductor laminated portion 12, n electrodes 13, and sapphire substrate 11, Illustrative Fig. 2) than a top of the internal cavity (top of internal cavity, Illustrative Fig. 1), and the base of the internal cavity (base of internal cavity, Illustrative Fig. 1) is wider (see Illustrative Fig. 1) than the top of the internal cavity (top of internal cavity, Illustrative Fig. 1).
Claims 11 and 15 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Kim (US 2009/0108279 A1).
Regarding claim 11, Kim teaches a method ([0109]-[0112]) comprising:
providing an active light-emitting diode (LED) structure (semiconductor layer 10, Fig. 22, [0110]) comprising an n-type layer (n-type semiconductor layer 13, Fig. 22, [0110]), a p-type layer (p-type semiconductor layer 11, Fig. 22, [0110]), and an active layer (light emission layer 12, Fig. 22, [0110]) between the n-type layer (n-type semiconductor layer 13, Fig. 22) and the p-type layer (p-type semiconductor layer 11, Fig. 22);
forming a light extraction film (light extraction layer 90, Fig.22, [0113]) on the active LED structure (semiconductor layer 10, Fig. 22); and
forming a light-extraction element (holes and surrounding material in the photonic crystal 50, Fig. 20A (see Illustrative Fig. 3 (annotated version of Kim’s Fig. 20A) for individual light extraction elements), [0113]: “the photonic crystal 50 may be located on/in a light extraction layer 90 located on the n-type semiconductor layer 13”) in the light extraction film (light extraction layer 90, Fig.22), the light-extraction element (light extraction elements, Illustrative Fig. 3) forming an internal cavity (internal cavity, Illustrative Fig. 3) bounded by inner sidewalls (inner sidewalls, Illustrative Fig. 3) of the light-extraction film (light extraction layer 90 (Fig.. 22) shown with label 10 in Illustrative Fig. 3).
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Regarding claim 15, Kim teaches the method of claim 11, wherein a base of the internal cavity (base, Illustrative Fig. 3) is positioned closer to the active LED structure (semiconductor layer 10, Fig. 22) than a top of the internal cavity (top, Illustrative Fig. 3), and the base of the internal cavity (base, Illustrative Fig. 3) is wider than the top of the internal cavity (top, Illustrative Fig. 3: while the embodiment in Illustrative Fig. 3 shows the top is wider than the base, Kim discloses that the angle theta can be negative ([0019]: “the wall of each of the unit structures being sloped at an angle of -45° to +45° from a virtual vertical line being parallel to a main light emitting direction of the light emitting device”) which means that the base is wider than the top).
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
Claim 6 is rejected under 35 U.S.C. 103 as being unpatentable over Hirano (US 2018/0277723 A1) as applied to claims 1-5, 7, 16, and 18-19 above, and further in view of another embodiment of Hirano (US 2018/0277723 A1).
Regarding claim 6, while Hirano teaches the LED chip of claim 1 (Illustrative Fig. 1),
Hirano does not teach that the light-extraction element forms a shape of a polygonal pyramid structure.
Hirano, however, discloses as another embodiment that the planarly-viewed shape of the apertures 16 can be the shape of a square or a regular hexagon ([0067]), and therefore, another embodiment of Hirano teaches that the light-extraction element (comprising apertures 16 and surrounding material of the back surface covering layer 15, Figs. 2-3A) forms a shape of a polygonal pyramid structure ([0067]: “the planarly-viewed shape of the apertures 16 is any dot shape of a square, a regular hexagon, …”, which means that the cavity has the shape of a truncated polygonal pyramid structure as part of the light-extraction element).
It would have been obvious to a person of ordinary skill in the art before the effective filing date of the claimed invention that the shape of the cavities (apertures 16, Figs. 2-4) would determine the output light pattern (see also Fig. 8), and therefore a person of ordinary skill in the art before the effective filing date of the claimed invention would be motivated to modify the shape of the cavities in the LED chip of Hirano to be a polygonal trapezoid structure, as taught by another embodiment of Hirano, to obtain a specific light output pattern.
Claim 8, 10, and 20 is rejected under 35 U.S.C. 103 as being unpatentable over Hirano (US 2018/0277723 A1) as applied to claims 1-5, 7, 16, and 18-19 above, and further in view of another embodiment of Kim (US 2009/0108279 A1).
Regarding claim 8, Hirano teaches the LED chip of claim 1, wherein the inner sidewalls of the light-extraction element (inner sidewalls, Illustrative Fig. 1) are formed at a first angle (Illustrative Fig. 1: inner sidewalls are sloped) from a direction (vertical direction in Figs. 1-2) perpendicular to a longitudinal plane (vertical direction in Figs. 1-2) of the active LED structure (comprising n-type clad layer 22, active layer 23, electron block layer 24, p-type clad layer 25, and p-type contact layer 26, Fig. 1).
Hirano, however, does not teach that the first angle is in a range from 15 to 45 degrees.
Kim, on the other hand, teaches a light extraction film (light extraction structure/photonic crystal 50, Fig. 21, [0113]), wherein individual light extraction elements (Fig. 20A) have a shape analogous to the shape of the light extraction elements of Hirano in that each light extraction element includes a cavity (hole, Figs. 19C and 20A) bounded by angled inner sidewalls of a light-extraction film (semiconductor layer 10, Fig. 20A). Kim further discloses that “a light extraction structure having an excellent light extraction property is obtained when the wall of the above unit structure is sloped at an angle of -45° to +45° from a virtual vertical line being parallel to a main light emitting direction of the light emitting device”.
Therefore, the range of angles provided by the prior art overlaps with the range of angles provided in the claimed invention, and a prima facie case of obviousness exists (see MPEP 2144.05(I)), as the angle of the inner sidewalls be optimized by routine experimentation to achieve desired light extraction efficiency and far-field light distribution pattern (see MPEP 2144.05(II)). Therefore, the range of values provided does not hold an inventive subject matter over the range disclosed in the prior art.
Regarding claim 10, while Hirano teaches the LED chip of claim 1,
Hirano does not teach that a ratio of a height of the light-extraction element to a width of the light-extraction element is in a range from one-to-one up to three-to-one (In Hirano, a ratio of a height (film thickness T of the back surface covering layer 15, [0067]; the thickness T is the height of the light-extraction element) of the light-extraction element (light-extraction element, Illustrative Fig. 1) to a width (pitch P of the apertures 16, [0067]) of the light-extraction element (light-extraction element, Illustrative Fig. 1) is in a range from one-to-one up to three-to-one ([0067]: “the aperture width (aperture diameter) W is preferably the film thickness T or more and about several times the film thickness T or less, and the arrangement pitch P preferably falls within a range of about 1.5 to 3 times the maximum value of the aperture width (aperture diameter) W, for example.”, and therefore for the considered embodiment, the aperture width W is equal to the film thickness T, and the pitch P is 1.5 to three times the value of the width W, resulting that a ratio of the height (thickness T equal to width W) to the width (pitch P) of 1:1.5 up to 1:3, which is different than claimed range).
Kim, on the other hand, teaches a light extraction film (light extraction structure/photonic crystal 50, Fig. 21, [0113]), wherein individual light extraction elements (Fig. 20A) have a shape analogous to the shape of the light extraction elements of Hirano in that each light extraction element includes a cavity (hole, Figs. 19C and 20A) bounded by angled inner sidewalls of a light-extraction film (semiconductor layer 10, Fig. 20A). Kim further teaches that that
a ratio of a height (height h, Fig. 20A, [0097]: preferably ~3000nm) of the light-extraction element (Fig. 20A) to a width (period a, Fig. 20A, [0096]: “average distance between the centers of respective unit structures is preferably 400-3,000 nm.”) of the light-extraction element (Fig. 20A) is in a range from one-to-one up to three-to-one (3000:3000 (one-to-one) to 3000:400 (7.5:1)).
Therefore, the range of ratios provided by the prior art overlaps with the range of ratios provided in the claimed invention, and a prima facie case of obviousness exists (see MPEP 2144.05(I)), as the ratio of the height to the width can be optimized by routine experimentation to achieve desired light extraction efficiency and far-field light distribution pattern (see MPEP 2144.05(II)), as shown in Fig. 19B of Kim (the period a determines light extraction efficiency, and a person of ordinary skill in the art before the effective filing date of the claimed invention who is aiming to form the light extraction film as a photonic crystal would use the height and width values provided by Kim) and in Fig. 8 of Hirano (the height to width ratio determines the output beam far field pattern, where a higher ratio leads to more beams to be reflected at the sidewalls). Therefore, the range of values provided does not hold an inventive subject matter over the range disclosed in the prior art.
Regarding claim 20, while Hirano teaches the LED package of claim 16,
Hirano does not teach that a ratio of a height of each light-extraction element of the plurality of light extraction elements to a width of each light-extraction of the plurality of light extraction elements (light-extraction element, Illustrative Fig. 1) is in a range from one-to-one up to three-to-one (In Hirano, a ratio of a height (film thickness T of the back surface covering layer 15, [0067]; the thickness T is the height of the light-extraction element) of the light-extraction element (light-extraction element, Illustrative Fig. 1) to a width (pitch P of the apertures 16, [0067]) of the light-extraction element (light-extraction element, Illustrative Fig. 1) is in a range from one-to-one up to three-to-one ([0067]: “the aperture width (aperture diameter) W is preferably the film thickness T or more and about several times the film thickness T or less, and the arrangement pitch P preferably falls within a range of about 1.5 to 3 times the maximum value of the aperture width (aperture diameter) W, for example.”, and therefore for the considered embodiment, the aperture width W is equal to the film thickness T, and the pitch P is 1.5 to three times the value of the width W, resulting that a ratio of the height (thickness T equal to width W) to the width (pitch P) of 1:1.5 up to 1:3, which is different than claimed range).
Kim, on the other hand, teaches a light extraction film (light extraction structure/photonic crystal 50, Fig. 21, [0113]), wherein individual light extraction elements (Fig. 20A) have a shape analogous to the shape of the light extraction elements of Hirano in that each light extraction element includes a cavity (hole, Figs. 19C and 20A) bounded by angled inner sidewalls of a light-extraction film (semiconductor layer 10, Fig. 20A). Kim further teaches that that
a ratio of a height (height h, Fig. 20A, [0097]: preferably ~3000nm) of each light-extraction element of the plurality of light extraction elements (Fig. 20A) to a width (period a, Fig. 20A, [0096]: “average distance between the centers of respective unit structures is preferably 400-3,000 nm.”) of each light-extraction element of the plurality of light extraction elements (Fig. 20A) is in a range from one-to-one up to three-to-one (3000:3000 (one-to-one) to 3000:400 (7.5:1)).
Therefore, the range of ratios provided by the prior art overlaps with the range of ratios provided in the claimed invention, and a prima facie case of obviousness exists (see MPEP 2144.05(I)), as the ratio of the height to the width can be optimized by routine experimentation to achieve desired light extraction efficiency and far-field light distribution pattern (see MPEP 2144.05(II)), as shown in Fig. 19B of Kim (the period a determines light extraction efficiency, and a person of ordinary skill in the art before the effective filing date of the claimed invention who is aiming to form the light extraction film as a photonic crystal would use the height and width values provided by Kim) and in Fig. 8 of Hirano (the height to width ratio determines the output beam far field pattern, where a higher ratio leads to more beams to be reflected at the sidewalls). Therefore, the range of values provided does not hold an inventive subject matter over the range disclosed in the prior art.
Claim 12-14 are rejected under 35 U.S.C. 103 as being unpatentable over Kim (US 2009/0108279 A1) as applied to claims 11 and 15 above, and further in view of another embodiment of Wang (CN 103050588 A).
Regarding claim 12, while Kim teaches the method of claim 11,
Kim does not teach that forming the light-extraction element comprises:
depositing a first portion of the light-extraction film;
forming an island of material on the first portion of the light extraction film;
depositing a remaining portion of the light-extraction film over the island of material; and
removing the island of material to form the internal cavity of the light-extraction element.
Wang, on the other, teaches a method (Figs. 3A-E, [0048]-[0053]) for forming a light extraction layer (comprising first gallium nitride layer 203, Fig. 3E, [0051]-[0052]), wherein light extraction layer includes light extraction elements (buried cavity 204', Fig. 3E, [0052]), wherein the method comprises
forming an island of material (bump 202', Fig. 3B, [0051]) on the first portion (substrate 201, Fig. 3B);
depositing a remaining portion (first gallium nitride layer 203, Fig. 3C) of the light-extraction film (comprising first gallium nitride layer 203, Figs. 3C) over the island of material (bump 202', Fig. 3C); and
removing the island of material (bump 202', Figs. 3C-D, [0050]-[0051]) to form the internal cavity (cavity 203’, Figs. 3D) of the light-extraction element (cavity 203’, Figs. 3D).
It would have been obvious to a person of ordinary skill in the art before the effective filing date of the claimed invention that the method of forming light extraction elements taught by Wang is an alternative method to the one taught by Kim (Figs. 16A-B, [0076]), and would provide a better precision in forming the shape of the cavities, particularly for controlling the angle of the inner sidewalls and the corners of the cavity. Therefore, a person of ordinary skill in the art before the effective filing date of the claimed invention would be motivated to modify the method of Kim to form the light extraction element by the method of Wang to obtain a better precision for shaping the internal cavities. Because the light extraction element comprises a first portion (see Illustrative Fig. 3) in Kim, a person of ordinary skill in the art would also deposit an extra layer (first portion) before forming the cavities as by the method disclosed by Wang (forming an extra layer between the substrate and light extraction element layer). Thus, the combination of Kim and Wand leads to a method comprising
depositing a first portion of the light-extraction film;
forming an island of material on the first portion of the light extraction film;
depositing a remaining portion of the light-extraction film over the island of material; and
removing the island of material to form the internal cavity of the light-extraction element.
Regarding claim 13, Kim in view of Wang teaches the method of claim 12, wherein
the combination of Kim and Wang also teaches that the method further comprises etching the island of material (bump 202', Figs. 3C-D of Wang; while Wang does not explicitly disclose an etching step, the island of material is formed from a uniform film (dielectric layer 202, Fig. 3A, [0049]), and therefore a person of ordinary skill in the art before the effective filing date of the claimed invention would understand that the island of material is etched to its final shape starting from the uniform dielectric layer 202) to form a first shape (shape of the buried voids 204’, Fig. 3D of Wang) before depositing the remaining portion (first gallium nitride layer 203, Fig. 3C of Kim) of the light-extraction film (comprising first gallium nitride layer 203, Fig. 3E), wherein the first shape (shape of the buried voids 204’, Fig. 3D) corresponds with a shape of the internal cavity (buried voids 204’, Fig. 3D).
Regarding claim 14, Kim in view of Wang teaches the method of claim 13, wherein
the combination of Kim and Wang also teaches that the method further comprises further comprising exposing a top surface of the island of material (bump 202', Figs. 3C: the top surface of the bumps 202’ are exposed) at a top surface of the light-extraction film (top surface of first gallium nitride layer 203, Figs. 3C) before removing the island of material (Figs. 3C-D).
Claim 17 is rejected under 35 U.S.C. 103 as being unpatentable over Hirano (US 2018/0277723 A1) as applied to claims 1-5, 7, 16, and 18-19 above, and further in view of McFarlane (US 2021/0328112 A1).
Regarding claim 17, while Hirano teaches the LED package of claim 16,
Hirano does not teach that the LED package comprises a cover structure on the LED chip, the cover structure comprising a support element, wherein the light-extraction film is on the support element.
Hirano, however, does not teach that
McFarlane, on the other hand, teaches an LED package (LED device 10, Fig. 1A, [0073]) comprising an LED chip (LED chip 12, Fig. 1A, [0073]), a light extraction film (superstrate 16, Fig. 1A, [0073]: “The superstrate 16 may also be textured to improve light extraction”), wherein the LED package (LED device 10, Fig. 1A) comprises a cover structure (wavelength conversion element 14, Fig. 1A, [0073]) on the LED chip (LED chip 12, Fig. 1A), the cover structure (wavelength conversion element 14, Fig. 1A) comprising a support element ([0061]: “Wavelength conversion elements may include a support element, such as a superstrate, and one or more lumiphoric materials”), wherein the light-extraction film (superstrate 16, Fig. 1A) is on the support element (wavelength conversion element 14, Fig. 1A).
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McFarlane further discloses that lumiphoric material 18 enables wavelength conversions, and “the LED source and one or more lumiphoric materials may be selected such that their combined output results in light with one or more desired characteristics such as color, color point, intensity, etc” ([0059]). Furthermore, McFarlane also discloses that “the lumiphoric material 18 is formed between the superstrate 16 and the LED chip 12, thereby protecting the lumiphoric material 18 from environmental exposure” ([0073]). Therefore, a person of ordinary skill in the art before the effective filing date of the claimed invention would be motivated to modify the LED package of Hirona to include a wavelength conversion element, as taught by MacFarlane, on the LED chip and to form the light-extraction film on the wavelength conversion element to be able to obtain an LED package with more desired light characteristics. Thus, the combination of Hirano and McFarland leads to an LED package comprising a cover structure on the LED chip, the cover structure comprising a support element, wherein the light-extraction film is on the support element.
Claim 21 is rejected under 35 U.S.C. 103 as being unpatentable over Hirano (US 2018/0277723 A1) as applied to claims 1-5, 7, 16, and 18-19 above.
Regarding claim 21, Hirano the LED package of claim 16, wherein each light-extraction element (light extraction elements, Illustrative Fig. 4) is bounded by outer sidewalls (in a cross section shown in Illustrative Fig. 4), the inner sidewalls of a neighboring light extraction element can be considered as the outer sidewall for a light extraction element, see outer sidewalls in Illustrative Fig. 4), and wherein the inner sidewalls (inner sidewalls, Illustrative Fig. 4) and the outer sidewalls (outer sidewalls, Illustrative Fig. 4) are formed at angles offset (Illustrative Fig. 4: inner sidewalls and outer sidewalls are angled) from a direction (vertical direction in Fig. 4) perpendicular to a longitudinal plane (horizontal direction in Fig. 2) of an active LED structure (comprising n-type clad layer 22, active layer 23, electron block layer 24, p-type clad layer 25, and p-type contact layer 26, Fig. 1) of the LED chip.
Allowable Subject Matter
Claims 9 is objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
Regarding claim 9, claim 9 disclosing “the light-extraction element is bounded by outer sidewalls of the light-extraction element, and the outer sidewalls are formed at a second angle in a range from 30 to 60 degrees from the direction perpendicular to the longitudinal plane of the active LED structure”, would be allowable if this limitation is incorporated in a claim combining claims 1 and 8. The closest prior art identifies are Hirona (US 2018/0277723 A1) and Kim (US 2009/0108279 A1). As detailed above in the rejections of claims 1 and 8, Hirona in view of Kim teaches all the limitations of claim 8, but fail to teach that there is an outer sidewall of the light-extraction element. There has been no prior art identified that teaches a light-extraction element with inner and outer sidewalls with the angle ranges disclosed. Also, there has been no motivation to modify Hirona in view of Kim to include such an outer sidewall. Therefore, claim 9 is objected.
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure.
Shatalov (US 2014/0008675 A1) teaches a LED package, which is relevant to all claims.
Ishikawa (US 2018/0114949 A1) teaches a light extraction film, which is relevant to claims 1-10 and 16-21.
Kang (US 2010/0295015 A1) teaches a light extraction film, which is relevant to all claims.
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, William B Partridge can be reached at 571-270-1402. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/ILKER NMN OZDEN/Examiner, Art Unit 2812
/William B Partridge/Supervisory Patent Examiner, Art Unit 2812