DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Information Disclosure Statement
The information disclosure statements (IDS) submitted on 6/18/2024 was filed. The submission is in compliance with the provisions of 37 CFR 1.97. Accordingly, the information disclosure statements are being considered by the examiner.
Specification
The abstract and title are consistent with the requirements set forth in the MPEP 608.01(b) and 606, respectively.
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1, 3-4, 10, and 12-13 are rejected under 35 U.S.C. 103 as being unpatentable over Hatano et al. US PGPub. 2014/0103385 in view of Choi et al. US PGPub. 2020/0312930 and Joung et al. US PGPub. 2021/0199972. Regarding claim 1, Hatano teaches a sub-pixel (B, pixel, fig. 2A2 and 2C) [0039], comprising: first pixel isolation structures (PIS) (bottom portion of 155 that is coplanar with 118; fig. 2C; hereinafter called 155bX; see examiner’s fig. 2) disposed along a line plane (x-direction, examiner’s fig. 1); second PIS (bottom portion of 155 that is coplanar with 118; fig. 2C; hereinafter called 155bY; see examiner’s fig. 2) disposed along a pixel plane (y-direction, examiner’s fig. 1); overhang structures (150+155t, fig. 2C) disposed on the first PIS (155bX), the overhang structures (150+155t) comprising: a second structure (150, fig. 2C) [0059] disposed over a first structure (155t, examiner’s fig. 2) [0067], wherein: a bottom surface (150a, fig. 2C) of the second structure (150) extends laterally past an upper surface of the first structure (155t), separation structures (the same structure as 150+155t but in the Y/line plane’ examiner’s fig. 2) disposed over the second PIS (155bY); an anode (118b, fig. 2C) [0059] disposed between the first PIS (155bX) and the second PIS (155bY); an organic light emitting diode (OLED) material (120, fig. 2C) [0059] disposed over the anode (118b) between the overhang structures (150+155t) and an upper surface of the separation structures (150+155t in the other plane); and a cathode (122, fig. 2C) [0059] disposed over the OLED material (120) and the upper surface of the separation structures (150+155t) (Hatano et al., fig. 2A2 and 2C).
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But Hatano does not teach wherein the overhang structures (150+155t) have a distance from underside edge of the second structure (150) to a sidewall of the first structure (155t) that is less than about 0.15 µm; and the first structure (155t) disposed over the first PIS (155bX) has a width of 0.2 µm to about 0.8 µm. However, Choi teaches a sub-pixel (14, fig. 7) [0023] comprising overhang structures (76-1, fig. 7) [0047] have a distance (104, fig. 7) from underside edge of the second structure (76-1, fig. 7) to a sidewall of the first structure (76-2, fig. 7) that is less than about 0.15 µm (150nm, [0047]) (Choi et al, fig. 7, [0047]). Accordingly, at the time before the effective filing of the claimed invention, it would have been obvious to one of ordinary skill in art to use the distance of the overhang structure taught by Choi for the overhang structure of Hatano in the range as claimed in order to guarantee that the overhang structure/pixel defining layer if formed to form desired discontinuities in the OLED layers (Choi et al., [0047]) which effectively reduces lateral leakage between pixels in the display (Choi et al., [0061]), because it has been held that where the general conditions of the claims are discloses in the prior art, it is not inventive to discover the optimum or workable range by routine experimentation. See MPEP 2144.05. But Hatano and Choi still do not teach wherein the first structure (155t) disposed over the first PIS (155bX) has a width of 0.2 µm to about 0.8 µm. However, Joung teaches a sub-pixel (fig. 3) wherein the first structure/pixel definition layer (125, fig. 3) [0107] has a width in nanoscale range [0107] (Joung et al., fig. 3, [0107]). Accordingly, at the time before the effective filing of the claimed invention, it would have been obvious to one of ordinary skill in art to use the width of the first structure/pixel defining layer as taught by Joung for the device of Hatano in the range as claimed because using nanoscale widths for the first structure would necessary for application in higher resolution display devices (Joung et al., [0107]), because it has been held that where the general conditions of the claims are discloses in the prior art, it is not inventive to discover the optimum or workable range by routine experimentation. See MPEP 2144.05. Regarding claims 3 and 12, Hatano in view of Choi and Joung teaches the sub-pixel of claims 1 and 10, wherein the first structure (155t) comprises a non-conductive material (insulation, [0087]) (Hatano et al., [0087]). Regarding claims 4 and 13, Hatano in view of Choi and Joung teaches the sub-pixel of claims 3 and 12, wherein the non-conductive material (76-2, fig. 7) [0048] includes amorphous silicon (a-Si), titanium (Ti), silicon nitride (Si3N4) [0048], silicon oxide (SiO2), silicon oxynitride (Si2N2O), or combinations thereof (Choi et al., fig. 7, [0048]). Regarding claim 10, Hatano teaches a sub-pixel (B, pixel, fig. 2A2 and 2C) [0039], comprising: first pixel isolation structures (PIS) (bottom portion of 155 that is coplanar with 118; fig. 2C; hereinafter called 155bX; see examiner’s fig. 2) disposed along a line plane (x-direction, examiner’s fig. 1); overhang structures (150+155t, fig. 2C) disposed on the first PIS (155bX), the overhang structures (150+155t) comprising: a second structure (150, fig. 2C) [0059] disposed over a first structure (155t, examiner’s fig. 2) [0067], wherein: a bottom surface (150a, fig. 2C) of the second structure (150) extends laterally past an upper surface of the first structure (155t); an anode (118b, fig. 2C) [0059]; an organic light emitting diode (OLED) material (120, fig. 2C) [0059] disposed over the anode (118b) between the overhang structures (150+155t); and a cathode (122, fig. 2C) [0059] disposed over the OLED material (120) (Hatano et al., fig. 2A2 and 2C).But Hatano does not teach wherein the overhang structures (150+155t) have a distance from underside edge of the second structure (150) to a sidewall of the first structure (155t) that is less than about 0.15 µm; and the first structure (155t) disposed over the first PIS (155bX) has a width of 0.2 µm to about 0.8 µm. However, Choi teaches a sub-pixel (14, fig. 7) [0023] comprising overhang structures (76-1, fig. 7) [0047] have a distance (104, fig. 7) from underside edge of the second structure (76-1, fig. 7) to a sidewall of the first structure (76-2, fig. 7) that is less than about 0.15 µm (150nm, [0047]) (Choi et al, fig. 7, [0047]). Accordingly, at the time before the effective filing of the claimed invention, it would have been obvious to one of ordinary skill in art to use the distance of the overhang structure taught by Choi for the overhang structure of Hatano in the range as claimed in order to guarantee that the overhang structure/pixel defining layer if formed to form desired discontinuities in the OLED layers (Choi et al., [0047]) which effectively reduces lateral leakage between pixels in the display (Choi et al., [0061]), because it has been held that where the general conditions of the claims are discloses in the prior art, it is not inventive to discover the optimum or workable range by routine experimentation. See MPEP 2144.05. But Hatano and Choi still do not teach wherein the first structure (155t) disposed over the first PIS (155bX) has a width of 0.2 µm to about 0.8 µm. However, Joung teaches a sub-pixel (fig. 3) wherein the first structure/pixel definition layer (125, fig. 3) [0107] has a width in nanoscale range [0107] (Joung et al., fig. 3, [0107]). Accordingly, at the time before the effective filing of the claimed invention, it would have been obvious to one of ordinary skill in art to use the width of the first structure/pixel defining layer as taught by Joung for the device of Hatano in the range as claimed because using nanoscale widths for the first structure would necessary for application in higher resolution display devices (Joung et al., [0107]), because it has been held that where the general conditions of the claims are discloses in the prior art, it is not inventive to discover the optimum or workable range by routine experimentation. See MPEP 2144.05. Claims 5-9 and 14-16 are rejected under 35 U.S.C. 103 as being unpatentable over Hatano et al. US PGPub. 2014/0103385 in view of Choi et al. US PGPub. 2020/0312930 and Joung et al. US PGPub. 2021/0199972 as applied to claims 1 and 10 above, and further in view of Nakamura US PGPub. 2012/0228603. Regarding claims 5 and 14, Hatano in view of Choi and Joung does not teach the sub-pixel of claims 1 and 10, wherein the second structure (150, fig. 2C) [0059] comprises a conductive material. However, Nakamura teaches a sub-pixel (fig. 1 and 4A-4B) comprising first pixel isolation structures (PIS) (bottom portion of 143, hereinafter 143B; fig. 4A) is disposed along a pixel plane (IIA-IIA line, fig. 1 is fig. 4A); second PIS (bottom portion of 143, hereinafter 143B; fig. 4B) is disposed along a line plane (IIB-IIB line, fig. 1 is fig. 4B); overhang structures (top portion of 143, hereinafter 143T+150; fig. 4A) the overhang structures (143T+150) comprising: a second structure (150, fig. 4A) disposed over a first structure (143T); wherein the second structure (150, fig. 4A) [0039] comprises a conductive material (Nakamura, [0039]). At the time before the invention was effectively filed, it would have been obvious to one of ordinary skill in the art to make the simple substitution of the material of the second structure of Hatano with the conductive material used in the second structure as taught by Nakamura because a second structure as a wall when formed of metal/conductive material can function as an auxiliary wiring of cathode which will be effective in suppressing the occurrence of luminance unevenness (Nakamura, [0039]). Regarding claims 6 and 15, Hatano in view of Choi, Joung and Nakamura teaches the sub-pixel of claims 5 and 14, wherein the conductive material (150) includes copper (Cu) [0039], aluminum (Al) [0039], aluminum neodymium (AINd), molybdenum (Mo)[0039], molybdenum tungsten (MoW), or combinations thereof (Nakamura, [0039]).
Regarding claims 7 and 16, Hatano in view of Choi, Joung and Nakamura teaches the sub-pixel of claims 1 and 10, wherein the first structure (143T) comprises a non-conductive material [0054] and the second structure (150) comprises a conductive material [0039] (Nakamura, [0039] and [0054]). At the time before the invention was effectively filed, it would have been obvious to one of ordinary skill in the art to make the simple substitution of the material of the second structure of Hatano with the conductive material used in the second structure as taught by Nakamura because a second structure as a wall when formed of metal/conductive material can function as an auxiliary wiring of cathode which will be effective in suppressing the occurrence of luminance unevenness (Nakamura, [0039]). Regarding claim 8, Hatano in view of Choi and Joung does not teach the sub-pixel of claim 1, wherein the OLED material (120) is continuous over the separation structures (150+155t) over the line plane. However, Nakamura teaches a sub-pixel (fig. 1 and 4A-4B) wherein the OLED material (160, fig. 4A/B) [0036] is continuous (fig. 4B, [0062]) over the separation structures (143, fig. 4B)[0054] over the line plane (IIB-IIB of fig. 1, fig. 4B) (Nakamura, fig. 1 and 4B). At the time before the invention was effectively filed, it would have been obvious to one of ordinary skill in the art to modify the structure of Hatano such that the OLED material is continuous as taught by Nakamura because all the sub-pixels in the line plane are the same color and would hence simplify the manufacturing process. Regarding claim 9, Hatano in view of Choi and Joung does not teach the sub-pixel of claim 1, wherein the cathode (122) is continuous over the separation structures (150+155t) over the line plane. However, Nakamura teaches a sub-pixel (fig. 1 and 4A-4B) wherein the cathode (170, fig. 4A/B) [0063] is continuous (fig. 4B, [0062]) over the separation structures (143, fig. 4B)[0054] over the line plane (IIB-IIB of fig. 1, fig. 4B) (Nakamura, fig. 1 and 4B). At the time before the invention was effectively filed, it would have been obvious to one of ordinary skill in the art to modify the structure of Hatano such that the cathode is continuous as taught by Nakamura because all the sub-pixels in the line plane are the same color and would hence simplify the manufacturing process. Allowable Subject Matter
Claims 2 and 11 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims as well as a timely filed terminal disclaimer to overcome the double patenting rejection.
The following is a statement of reasons for the indication of allowable subject matter: the prior arts of record taken alone or in combination neither anticipates nor renders obvious a sub-pixel comprising “an encapsulation layer disposed over the cathode, wherein the encapsulation layer extends under at least a portion of the second structure past the cathode along the sidewall of the first structure, and contacts the bottom surface of the second structure of the overhang structures” as recited in claims 2 and 11 and in combination with the rest of the limitations of claims 1 and 10, respectively. Claims 17-20 are allowable, however, a timely filed terminal disclaimer to overcome the double patenting rejection. The following is an examiner’s statement of reasons for allowance: the prior arts of record taken alone or in combination neither anticipates nor renders obvious a sub-pixel comprising overhang structures disposed on the first PIS, “the overhang structures have a distance from underside edge of the second structure to a sidewall of the first structure that is less than about 0.15 µm; and the first structure disposed over the first PIS has a width of 0.2 µm to about 0.8 µm” in combination with “ an encapsulation layer disposed over the cathode, wherein the encapsulation layer extends under at least a portion of the second structure past the cathode along the sidewall of the first structure, and contacts the bottom surface of the second structure of the overhang structures” as recited in claim 17.
Claims 18-20 are also allowed for further limiting and depending upon allowed claim 17.
Any comments considered necessary by applicant must be submitted no later than the payment of the issue fee and, to avoid processing delays, should preferably accompany the issue fee. Such submissions should be clearly labeled “Comments on Statement of Reasons for Allowance.”
Double Patenting
The nonstatutory double patenting rejection is based on a judicially created doctrine grounded in public policy (a policy reflected in the statute) so as to prevent the unjustified or improper timewise extension of the “right to exclude” granted by a patent and to prevent possible harassment by multiple assignees. A nonstatutory double patenting rejection is appropriate where the conflicting claims are not identical, but at least one examined application claim is not patentably distinct from the reference claim(s) because the examined application claim is either anticipated by, or would have been obvious over, the reference claim(s). See, e.g., In re Berg, 140 F.3d 1428, 46 USPQ2d 1226 (Fed. Cir. 1998); In re Goodman, 11 F.3d 1046, 29 USPQ2d 2010 (Fed. Cir. 1993); In re Longi, 759 F.2d 887, 225 USPQ 645 (Fed. Cir. 1985); In re Van Ornum, 686 F.2d 937, 214 USPQ 761 (CCPA 1982); In re Vogel, 422 F.2d 438, 164 USPQ 619 (CCPA 1970); In re Thorington, 418 F.2d 528, 163 USPQ 644 (CCPA 1969).
A timely filed terminal disclaimer in compliance with 37 CFR 1.321(c) or 1.321(d) may be used to overcome an actual or provisional rejection based on nonstatutory double patenting provided the reference application or patent either is shown to be commonly owned with the examined application, or claims an invention made as a result of activities undertaken within the scope of a joint research agreement. See MPEP § 717.02 for applications subject to examination under the first inventor to file provisions of the AIA as explained in MPEP § 2159. See MPEP § 2146 et seq. for applications not subject to examination under the first inventor to file provisions of the AIA . A terminal disclaimer must be signed in compliance with 37 CFR 1.321(b).
The filing of a terminal disclaimer by itself is not a complete reply to a nonstatutory double patenting (NSDP) rejection. A complete reply requires that the terminal disclaimer be accompanied by a reply requesting reconsideration of the prior Office action. Even where the NSDP rejection is provisional the reply must be complete. See MPEP § 804, subsection I.B.1. For a reply to a non-final Office action, see 37 CFR 1.111(a). For a reply to final Office action, see 37 CFR 1.113(c). A request for reconsideration while not provided for in 37 CFR 1.113(c) may be filed after final for consideration. See MPEP §§ 706.07(e) and 714.13.
The USPTO Internet website contains terminal disclaimer forms which may be used. Please visit www.uspto.gov/patent/patents-forms. The actual filing date of the application in which the form is filed determines what form (e.g., PTO/SB/25, PTO/SB/26, PTO/AIA /25, or PTO/AIA /26) should be used. A web-based eTerminal Disclaimer may be filled out completely online using web-screens. An eTerminal Disclaimer that meets all requirements is auto-processed and approved immediately upon submission. For more information about eTerminal Disclaimers, refer to www.uspto.gov/patents/apply/applying-online/eterminal-disclaimer.
Claims 1-7 and 10-20 are rejected on the ground of nonstatutory double patenting as being unpatentable over claims 1-6 of U.S. Patent No. 12,041,823 in view of Choi et al. US PGPub. 2020/0312930. Regarding claims 1-2, 10-11 and 17, claim 1 of patent no. 12,041,823 recites most of the limitations of the claims (see table 1 below) but fails to recite “the overhang structures have a distance from underside edge of the second structure to a sidewall of the first structure that is less than about 0.15 µm; and the first structure disposed over the first PIS has a width of 0.2 µm to about 0.8 µm.” However, since the overhang structure is already taught by the patent no. 12,041,823 and it is only missing the dimensions, at the time before the effective filing of the claimed invention, it would have been obvious to one of ordinary skill in art to use the distance of the overhang structure in the range as claimed in order to guarantee that the overhang structure/pixel defining layer is formed to form desired discontinuities in the OLED layers (Choi et al., [0047]) which effectively reduces lateral leakage between pixels in the display (Choi et al., [0061]), because it has been held that where the general conditions of the claims are discloses in the prior art, it is not inventive to discover the optimum or workable range by routine experimentation. See MPEP 2144.05. Claims 3-7, 11-16 and 18-20 are similar and obvious over claims 2-6 of patent no. 12,041,823. See table 1 below for claim to claim matching.
Current Application
Patent No. 12,041,823
1. A sub-pixel, comprising: first pixel isolation structures (PIS) disposed along a line plane; second PIS disposed along a pixel plane; overhang structures disposed on the first PIS, the overhang structures comprising: a second structure disposed over a first structure, wherein: a bottom surface of the second structure extends laterally past an upper surface of the first structure, the overhang structures have a distance from underside edge of the second structure to a sidewall of the first structure that is less than about 0.15 µm; and the first structure disposed over the first PIS has a width of 0.2 µm to about 0.8 µm; separation structures disposed over the second PIS; an anode disposed between the first PIS and the second PIS; an organic light emitting diode (OLED) material disposed over the anode between the overhang structures and an upper surface of the separation structures; and a cathode disposed over the OLED material and the upper surface of the separation structures.2. The sub-pixel of claim 1, further comprising an encapsulation layer disposed over the cathode, wherein the encapsulation layer extends under at least a portion of the second structure past the cathode along the sidewall of the first structure, and contacts the bottom surface of the second structure of the overhang structures.
1. A sub-pixel, comprising:adjacent first pixel isolation structures (PIS) disposed along a line plane; adjacent second PIS disposed along a pixel plane; an anode disposed between the first PIS and the second PIS, wherein upper surfaces of the anode, the first PIS, and the second PIS are planar with each other; overhang structures disposed on the first PIS, the overhang structures comprising: a second structure disposed over a first structure, wherein a bottom surface of the second structure extends laterally past an upper surface of the first structure, the first structure being disposed over the first PIS; separation structures disposed over the second PIS; an organic light emitting diode (OLED) material disposed over the anode and an upper surface of the separation structures; a cathode disposed over the OLED material and the upper surface of the separation structures; and an encapsulation layer disposed over the cathode, wherein the encapsulation layer extends under at least a portion of the second structure past the cathode along the sidewall of the first structure, and contacts a bottom surface of the second structure of the overhang structures.
3. The sub-pixel of claim 1, wherein the first structure comprises a non-conductive material.
2. The sub-pixel of claim 1, wherein the first structure comprises a non-conductive material.
4. The sub-pixel of claim 3, wherein the non-conductive material includes amorphous silicon (a-Si), titanium (Ti), silicon nitride (Si.sub.3N.sub.4), silicon oxide (SiO.sub.2), silicon oxynitride (Si.sub.2N.sub.2O), or combinations thereof.
3. The sub-pixel of claim 2, wherein the non-conductive material includes amorphous silicon (a-Si), titanium (Ti), silicon nitride (Si.sub.3N.sub.4), silicon oxide (SiO.sub.2), silicon oxynitride (Si.sub.2N.sub.2O), or combinations thereof.
5. The sub-pixel of claim 1, wherein the second structure comprises a conductive material.
4. The sub-pixel of claim 1, wherein the second structure comprises a conductive material.
6. The sub-pixel of claim 5, wherein the conductive material includes copper (Cu), aluminum (Al), aluminum neodymium (AlNd), molybdenum (Mo), molybdenum tungsten (MoW), or combinations thereof.
5. The sub-pixel of claim 4, wherein the conductive material includes copper (Cu), aluminum (Al), aluminum neodymium (AlNd), molybdenum (Mo), molybdenum tungsten (MoW), or combinations thereof.
7. The sub-pixel of claim 1, wherein the first structure comprises a non-conductive material and the second structure comprises a conductive material.
6. The sub-pixel of claim 1, wherein the first structure comprises a non-conductive material and the second structure comprises a conductive material.
10. A sub-pixel, comprising: first pixel isolation structures (PIS) disposed along a line plane; overhang structures disposed on the first PIS, the overhang structures comprising: a second structure disposed over a first structure, wherein: a bottom surface of the second structure extends laterally past an upper surface of the first structure, the overhang structures have a distance from underside edge of the second structure to a sidewall of the first structure that is less than about 0.15 µm; and the first structure disposed over the first PIS has a width of 0.2 µm to about 0.8 µm; an anode; an organic light emitting diode (OLED) material disposed over the anode between the overhang structures; and a cathode disposed over the OLED material.11. The sub-pixel of claim 10, further comprising an encapsulation layer disposed over the cathode, wherein the encapsulation layer extends under at least a portion of the second structure past the cathode along the sidewall of the first structure, and contacts the bottom surface of the second structure of the overhang structures.
1. A sub-pixel, comprising:adjacent first pixel isolation structures (PIS) disposed along a line plane; adjacent second PIS disposed along a pixel plane; an anode disposed between the first PIS and the second PIS, wherein upper surfaces of the anode, the first PIS, and the second PIS are planar with each other; overhang structures disposed on the first PIS, the overhang structures comprising: a second structure disposed over a first structure, wherein a bottom surface of the second structure extends laterally past an upper surface of the first structure, the first structure being disposed over the first PIS; separation structures disposed over the second PIS; an organic light emitting diode (OLED) material disposed over the anode and an upper surface of the separation structures; a cathode disposed over the OLED material and the upper surface of the separation structures; and an encapsulation layer disposed over the cathode, wherein the encapsulation layer extends under at least a portion of the second structure past the cathode along the sidewall of the first structure, and contacts a bottom surface of the second structure of the overhang structures.
12. The sub-pixel of claim 10, wherein the first structure comprises a non-conductive material.
2. The sub-pixel of claim 1, wherein the first structure comprises a non-conductive material.
13. The sub-pixel of claim 12, wherein the non-conductive material includes amorphous silicon (a-Si), titanium (Ti), silicon nitride (Si.sub.3N.sub.4), silicon oxide (SiO.sub.2), silicon oxynitride (Si.sub.2N.sub.2O), or combinations thereof.
3. The sub-pixel of claim 2, wherein the non-conductive material includes amorphous silicon (a-Si), titanium (Ti), silicon nitride (Si.sub.3N.sub.4), silicon oxide (SiO.sub.2), silicon oxynitride (Si.sub.2N.sub.2O), or combinations thereof.
14. The sub-pixel of claim 10, wherein the second structure comprises a conductive material.
4. The sub-pixel of claim 1, wherein the second structure comprises a conductive material.
15. The sub-pixel of claim 14, wherein the conductive material includes copper (Cu), aluminum (Al), aluminum neodymium (AlNd), molybdenum (Mo), molybdenum tungsten (MoW), or combinations thereof.
5. The sub-pixel of claim 4, wherein the conductive material includes copper (Cu), aluminum (Al), aluminum neodymium (AlNd), molybdenum (Mo), molybdenum tungsten (MoW), or combinations thereof.
16. The sub-pixel of claim 10, wherein the first structure comprises a non-conductive material and the second structure comprises a conductive material.
6. The sub-pixel of claim 1, wherein the first structure comprises a non-conductive material and the second structure comprises a conductive material.
17. A sub-pixel, comprising: first pixel isolation structures (PIS) disposed along a line plane; second PIS disposed along a pixel plane;overhang structures disposed on the first PIS, the overhang structures comprising: a second structure disposed over a first structure, wherein: a bottom surface of the second structure extends laterally past an upper surface of the first structure, the overhang structures have a distance from underside edge of the second structure to a sidewall of the first structure that is less than about 0.15 µm; and the first structure disposed over the first PIS has a width of 0.2 µm to about 0.8 µm; separation structures disposed over the second PIS; an anode disposed between the first PIS and the second PIS; an organic light emitting diode (OLED) material disposed over the anode between the overhang structures and an upper surface of the separation structures; a cathode disposed over the OLED material and the upper surface of the separation structures; and an encapsulation layer disposed over the cathode, wherein the encapsulation layer extends under at least a portion of the second structure past the cathode along the sidewall of the first structure, and contacts the bottom surface of the second structure of the overhang structures.
1. A sub-pixel, comprising:adjacent first pixel isolation structures (PIS) disposed along a line plane; adjacent second PIS disposed along a pixel plane; an anode disposed between the first PIS and the second PIS, wherein upper surfaces of the anode, the first PIS, and the second PIS are planar with each other; overhang structures disposed on the first PIS, the overhang structures comprising: a second structure disposed over a first structure, wherein a bottom surface of the second structure extends laterally past an upper surface of the first structure, the first structure being disposed over the first PIS; separation structures disposed over the second PIS; an organic light emitting diode (OLED) material disposed over the anode and an upper surface of the separation structures; a cathode disposed over the OLED material and the upper surface of the separation structures; and an encapsulation layer disposed over the cathode, wherein the encapsulation layer extends under at least a portion of the second structure past the cathode along the sidewall of the first structure, and contacts a bottom surface of the second structure of the overhang structures.
18. The sub-pixel of claim 17, wherein the first structure comprises a non-conductive material.
2. The sub-pixel of claim 1, wherein the first structure comprises a non-conductive material.
19. The sub-pixel of claim 17, wherein the second structure comprises a conductive material.
4. The sub-pixel of claim 1, wherein the second structure comprises a conductive material.
20. The sub-pixel of claim 19, wherein the conductive material includes copper (Cu), aluminum (Al), aluminum neodymium (AlNd), molybdenum (Mo), molybdenum tungsten (MoW), or combinations thereof.
5. The sub-pixel of claim 4, wherein the conductive material includes copper (Cu), aluminum (Al), aluminum neodymium (AlNd), molybdenum (Mo), molybdenum tungsten (MoW), or combinations thereof.
Table 1
Conclusion
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/NDUKA E OJEH/Primary Examiner, Art Unit 2892