Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claims 1-4 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Lin (US 20190115268 A1).
Regarding claim 1, Camacho discloses a semiconductor product (Fig. 9), comprising:
a semiconductor die (124; [0035]: “semiconductor die”) having a front surface (See annotated figure);
an array of electrically-conductive spherical bodies (156; [0049]: “electrically conductive bump material”) arranged around the semiconductor die (laterally around, See annotated figure for direction designation), wherein the electrically-conductive spherical bodies have opposed front end surfaces (See annotated figure) and back end surfaces (See annotated figure);
a layer of molding material (168; [0052]: “molding compound”) embedding (at least partially embedding) the semiconductor die and the array of electrically-conductive spherical bodies to form a package (198, See annotated figure) having a front surface (See annotated figure) and a rear surface (See annotated figure);
wherein the front end surfaces of the electrically-conductive spherical bodies protrude from the layer of molding material at said front surface of the package (See dashed reference line demarking the protruding portion) and said back end surfaces of the electrically-conductive spherical bodies protrude from the layer of molding material at the rear surface of the package (See dashed reference line demarking the protruding portion); and
electrically-conductive formations (172) extending on said front surface of the package between (laterally between) the front surface of the semiconductor die and the front end surfaces of the electrically-conductive spherical bodies.
Illustrated below is a marked and annotated figure of Fig. 9 of Lin.
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Regarding claim 2, Lin discloses the semiconductor product of claim 1 (Fig. 9), wherein said electrically-conductive formations comprise:
electrically-conductive printed formations ([0055]: “plating” and the resultant shapes in the figure are encompassed within the ordinary and customary meaning of “printed” as it is used in same context in the art. Note: these formations are one layer of the disclosed multiple layers; [0055]: “one or more layers”) on the front surface of the package (directly on); and
plated electrically-conductive material ([0055]: “plating”. Note: this material is another layer of the disclosed multiple layers; [0055]: “one or more layers”) on the electrically-conductive printed formations.
Regarding claim 3, Lin discloses the semiconductor product of claim 1 (Fig. 9), wherein said electrically-conductive spherical bodies are solder balls ([0049]: “solder ball”).
Regarding claim 4, Lin discloses the semiconductor product of claim 1, further comprising a sealing layer (178) over the front surface of the package (vertically over) including over the front surface of the semiconductor die (vertically over), the front end surfaces of the electrically-conductive spherical bodies (vertically over) and the electrically-conductive formations (vertically over).
Claim 6 is rejected under 35 U.S.C. 102(a)(1) as being anticipated by Camacho (US 20100314780 A1).
Regarding independent claim 6, Camacho discloses a stacked semiconductor device (Fig. 5), comprising:
a first semiconductor product (top 126); and
a second semiconductor product (the other 126);
wherein each of the first and second semiconductor products comprises:
a semiconductor die (104; [0052]: “semiconductor die”) having a front surface (See annotated figure);
an array of electrically-conductive spherical bodies (110; [0045]: “electrically conductive bump material”) arranged around the semiconductor die (laterally around, See annotated figure for direction designation), wherein the electrically-conductive spherical bodies have opposed front end surfaces (See annotated figure) and back end surfaces (See annotated figure);
a layer of molding material (120; [0049]: “molding compound”) embedding (at least partially embedding) the semiconductor die and the array of electrically-conductive spherical bodies to form a package (the assembly of Fig. 4) having a front surface (See annotated figure) and a rear surface (See annotated figure);
wherein the front end surfaces of the electrically-conductive spherical bodies protrude from the layer of molding material at said front surface of the package (See dashed reference line demarking the protruding portion) and said back end surfaces of the electrically-conductive spherical bodies protrude from the layer of molding material at the rear surface of the package (See dashed reference line demarking the protruding portion); and
electrically-conductive formations (114/116/122) extending on said front surface of the package between (laterally between) the front surface of the semiconductor die and the front end surfaces of the electrically-conductive spherical bodies;
wherein front end surfaces of the electrically-conductive spherical bodies of the first semiconductor product are electrically coupled (directly electrically coupled) to back end surfaces of the electrically-conductive spherical bodies of the second semiconductor product.
Illustrated below is a marked and annotated figure of Fig. 5 of Camacho.
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Regarding claim 7, Camacho discloses the stacked semiconductor device of claim 6 (Fig. 5), wherein said electrically-conductive formations for each of the first and second semiconductor products comprise:
electrically-conductive printed formations ([0047]: “a deposition and patterning process” is encompassed within the ordinary and customary meaning of “printed”. Note: these formations are one layer of the disclosed multiple layers; [0047]: “one or more layers”) on the front surface of the package (directly on); and
plated electrically-conductive material ([0047]: “plating”. Note: this material is another layer of the disclosed multiple layers; [0047]: “one or more layers”) on the electrically-conductive printed formations.
Regarding claim 8, Camacho discloses the stacked semiconductor device of claim 6 (Fig. 5), wherein said electrically-conductive spherical bodies for each of the first and second semiconductor products are solder balls ([0045]: “solder”. Note: ball shapes are shown in the figure).
Claim 5 is rejected under 35 U.S.C. 103 as being unpatentable over Lin as applied to claim 4 above, and further in view of Yu (US 20200006088 A1).
Regarding claim 5, Lin discloses the semiconductor product of claim 4 (Fig. 9), wherein the sealing layer is made of a light-permeable sealing material ([0058]: “Si3N4”. Note: Lin fails to explicitly teach silicon nitride is light-permeable. However, this is a known characteristic of silicon nitride. Additional remarks are provided below).
Further regarding the claimed characteristic of the sealing material, i.e., “light-permeable”; Yu teaches silicon nitride possesses a light-permeable characteristic ([0024]: “transparent…silicon nitride”). This characteristic reasonably applies to the sealing material of Lin because it is the same material composition. Therefore, it would have been obvious to one of ordinary skill in the art to have the claimed light-permeable sealing material because the prior art product (of Lin) necessarily possesses the claimed characteristic. MPEP 2112.01 (I).
Claim 9 is rejected under 35 U.S.C. 103 as being unpatentable over Camacho as applied to claim 6 above, and further in view of Lin.
Regarding claim 9, Camacho discloses the stacked semiconductor device of claim 6, however fails to teach a sealing layer. Thus, Camacho fails to teach “wherein at least one of the first and second semiconductor products further comprises a sealing layer over the front surface of the package including over the front surface of the semiconductor die, the front end surfaces of the electrically-conductive spherical bodies and the electrically- conductive formations”.
Lin discloses a stacked semiconductor device in the same field of endeavor (Fig. 9), wherein [a semiconductor product] (198, See annotated figure) further comprises a sealing layer (178) over the front surface of the package (vertically over) including over the front surface of the semiconductor die (vertically over), the front end surfaces of the electrically-conductive spherical bodies (vertically over) and the electrically-conductive formations (vertically over). Modifying at least one of the first and second semiconductor products (of Camacho) to further comprise the sealing layer of Lin would arrive at the claimed sealing layer configuration. Lin provides a teaching to motivate one of ordinary skill in the art before the effective filing date to include the sealing layer because it would protect underlying structures (i.e., the electrically-conductive formations of Camacho: Fig. 5: 114/116/122; these formations are analogous to Lin: Fig. 9: 172/176. Note: protection is inclusive within the term “passivation” which renders a surface protected/non-reactive according to the ordinary and customary meaning within the context of the art). Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date to have the claimed sealing layer configuration because it would protect underlying structures within the device. MPEP 2143 (I)(G).
Claim 10 is rejected under 35 U.S.C. 103 as being unpatentable over Camacho in view of Lin as applied to claim 9 above, and further in view of Yu.
Regarding claim 10, Camacho in view of Lin discloses the stacked semiconductor device of claim 9 (Lin: Fig. 9), wherein the sealing layer is made of a light-permeable sealing material ([0058]: “Si3N4”. Note: Lin fails to explicitly teach silicon nitride is light-permeable. However, this is a known characteristic of silicon nitride. Additional remarks are provided below).
Further regarding the claimed characteristic of the sealing material, i.e., “light-permeable”; Yu teaches silicon nitride possesses a light-permeable characteristic ([0024]: “transparent…silicon nitride”). This characteristic reasonably applies to the sealing material of Lin because it is the same material composition. Therefore, it would have been obvious to one of ordinary skill in the art to have the claimed light-permeable sealing material because the prior art product (of Camacho in view of Lin) necessarily possesses the claimed characteristic. MPEP 2112.01 (I).
Response to Arguments
Applicant's arguments filed 12/8/2025 have been fully considered but they are not persuasive.
Applicant argues:
Applicant argues with respect to amended claims 1 and 5 that “There is no teaching or suggestion in Lee for having opposed front end surfaces and back end surfaces of electrically-conductive spherical bodies protrude from molding material embedding a semiconductor die at the front and rear surfaces, respectively, of the package”. Remarks at pg. 5.
Examiner’s reply:
Applicant’s arguments with respect to claims 1 and 5 have been considered but are moot because the new ground of rejection does not rely on any reference applied in the prior rejection of record for any teaching or matter specifically challenged in the argument. The examiner finds Applicant’s amendment describing a spatial configuration of 14b in Fig. 1F which is supported in Applicant’s disclosure on pg. 7 of the written description which describes the method of forming and molding over the spherical bodies. The examiner finds the subsequent method step shown in Fig. 1G requiring at least some amount of protrusion of 14b, to enable a functional device. The shape of the spherical bodies in Figs. 1D and 1F are consistent with maintaining a spherical shape and the disclosure provides nothing contrary to this interpretation. Nonetheless, the instant Office action relies upon a new reference to reject the contended features.
Conclusion
THIS ACTION IS MADE FINAL. Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to WILLIAM H ANDERSON whose telephone number is (571)272-2534. The examiner can normally be reached Monday-Friday, 8:00-5:00.
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/WILLIAM H ANDERSON/ Examiner, Art Unit 2817
/Kretelia Graham/ Supervisory Patent Examiner, Art Unit 2817 February 5, 2026