DETAILED ACTION
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
This action is responsive to the following communications: the Amendment filed 8/14/2025.
Claims 1-19 are pending. Claims 1, 8 and 15 are currently amended. Claims 1, 8 and 15 are independent.
Response to Arguments
Applicants’ arguments and amendments, filed 8/14/2025, with respect to Drawings Objections and 112 Rejections, as indicated in line numbers 1-2 of the office action mailed 5/13/2025, have been fully considered and are persuasive. The rejections have been withdrawn.
Applicants' arguments and amendments, filed 8/14/2025, with respect to independent claims 1, 8 and 15, although substantive and pertinent to expediting the prosecution of the current application, are considered moot and not persuasive, respectfully, in light of new grounds of rejections made using the prior art of Sutardja as noted below in the rejections of independent claims 1, 8 and 15.
Claim Objections
Claim 8 is objected to because of the following informalities:
Claim 8 recites the limitation “the comprising” in line 3of the claim, which appears to be a typographical error, and thus the Examiner suggests amending the limitation to “the method comprising”.
Appropriate correction is required.
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claims 1-19 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Sutardja et al. (US 2012/0098127 A1, hereinafter “Sutardja”).
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Regarding independent claim 1, Sutardja discloses a method for forming a substantially planar electrically-conductive layer 110/112 (collectively elements 110 and 112) adapted to be fabricated into a package (see completed package in Fig. 4), the method comprising the steps of:
forming an electrically-conductive signal trace 112 (“islands… connect a signal”- ¶0023, specifically the portion of 112 notated as “Signal Trace”; see above Examiner’s Markup Fig. 1C Sutardja) configured to define a trace plane (i.e., the vertical plane of 110/112 facing in and out of the page of Figure 1C), the signal trace 112 having a first width W1 and a height T, and extending within said trace plane between a selected first point (i.e., a point at the bottom of 110/112 as notated as “1st Point”; see above Examiner’s Markup Fig. 1C Sutardja) in said trace plane and a selected second point (i.e., a point at the top of 110/112 as notated as “2nd Point”; see above Examiner’s Markup Fig. 1C Sutardja) in said trace plane 110/112 (see Fig. 1C);
forming an electrically-conductive reference trace 110 (“first metal layer… ground (GND) plane”- ¶0023, specifically the portion of 110 notated as “1st Reference Trace”; see above Examiner’s Markup Fig. 1C Sutardja) oriented substantially in said trace plane laterally adjacent to, and coplanar with, the signal trace 112 and extending within said trace plane substantially from said first point to said second point, the reference trace 110 having a second width W2, a height substantially equal to T, and spaced laterally from the signal trace 112 by a third width S1, wherein S1 is less than T (see Fig. 1C); and
forming said layer 110/112 by embedding the signal trace 112 and the reference trace 110 in a dielectric medium 114 (“dielectric layer”- ¶0024) (see Fig. 1D).
Regarding claim 2, Sutardja discloses wherein S1 is further characterized as being substantially less than T (see Fig. 4).
Regarding claim 3, Sutardja discloses an electrically-conductive layer manufactured using the method of claim 1 (see Fig. 4).
Regarding claim 4, Sutardja discloses an advanced package comprising the electrically-conductive layer of claim 3 (see Fig. 4).
Regarding claim 5, Sutardja discloses wherein the electrically-conductive layer is adapted to be connected to a selected one of a reference voltage or a ground voltage (¶0033) (see Fig. 4).
Regarding claim 6, Sutardja discloses the advanced package further comprising a second electrically-conductive layer 118 (“second metal layer”- ¶0027) (see Fig. 4).
Regarding claim 7, Sutardja discloses and advanced package comprising an electrically-conductive layer manufactured using the method of claim 1 (see Fig. 4).
Regarding independent claim 8, Sutardja discloses a method for forming a substantially planar electrically-conductive layer 110/112 (collectively elements 110 and 112) adapted to be fabricated into a package (see completed package in Fig. 4), the method comprising the steps of:
forming an electrically-conductive signal trace 112 (“islands… connect a signal”- ¶0023, specifically the portion of 112 notated as “Signal Trace”; see above Examiner’s Markup Fig. 1C Sutardja) configured to define a trace plane (i.e., the vertical plane of 110/112 facing in and out of the page of Figure 1C), said signal trace 112 extending within said trace plane between a selected first point (i.e., a point at the bottom of 110/112 as notated as “1st Point”; see above Examiner’s Markup Fig. 1C Sutardja) in said trace plane and a selected second point (i.e., a point at the top of 110/112 as notated as “2nd Point”; see above Examiner’s Markup Fig. 1C Sutardja) in said trace plane (see Fig. 1C), and having:
a first side;
a second side opposite said first side;
a top side;
a bottom side opposite said top side;
a first width, W1, between said first side and said second side; and
a height, T, between said top side and said bottom side;
forming a first electrically-conductive reference trace 110 (“first metal layer… ground (GND) plane”- ¶0023, specifically the portion of 110 notated as “1st Reference Trace”; see above Examiner’s Markup Fig. 1C Sutardja) oriented substantially on said trace plane laterally adjacent to a selected first side of the signal trace 112 and extending within said trace plane substantially from said first point to said second point, the first reference trace 110 having a second width W2, a height substantially equal to T, and spaced from the first side of the signal trace 112 by a third width S1, wherein S1 is less than T (see Fig. 1C);
forming a second electrically-conductive reference trace 110 (“first metal layer… ground (GND) plane”- ¶0023, specifically the portion of 110 notated as “2nd Reference Trace”; see above Examiner’s Markup Fig. 1C Sutardja) oriented substantially in said trace plane laterally adjacent to a selected second side of the signal trace 112, the second reference trace 110 having said second width W2, a height substantially equal to T, and spaced from the second side of the signal trace 112 by said third width S1 (see Fig. 1C); and
forming said layer 110/112 by embedding the signal trace 112 and the reference traces 110 in a dielectric medium 114 (“dielectric layer”- ¶0024) (see Fig. 1D).
Regarding claim 9, Sutardja discloses wherein S1 is further characterized as being substantially less than T (see Fig. 4).
Regarding claim 10, Sutardja discloses an electrically-conductive layer manufactured using the method of claim 8 (see Fig. 4).
Regarding claim 11, Sutardja discloses an advanced package comprising the electrically-conductive layer of claim 10 (see Fig. 4).
Regarding claim 12, Sutardja discloses wherein the electrically-conductive layer is adapted to be connected to a selected one of a reference voltage or a ground voltage (¶0033) (see Fig. 4).
Regarding claim 13, Sutardja discloses the advanced package further comprising a second electrically-conductive layer 118 (“second metal layer”- ¶0027) (see Fig. 4).
Regarding claim 14, Sutardja discloses an advanced package comprising an electrically-conductive layer manufactured using the method of claim 8 (see Fig. 4).
Regarding independent claim 15, Figure 4 of Sutardja discloses a substantially planar electrically-conductive layer 110/112 (collectively elements 110 and 112) adapted to be fabricated into a package (see completed package in Fig. 4), the layer 110/112 comprising:
an electrically-conductive signal trace 112 (“islands… connect a signal”- ¶0023; see Fig. 1C for notation, specifically the portion of 112 notated as “Signal Trace”; see above Examiner’s Markup Fig. 1C Sutardja) configured to define a trace plane (i.e., the vertical plane of 110/112 facing in and out of the page of Figure 1C), said signal trace 112 extending within said trace plane between a selected first point (i.e., a point at the bottom of 110/112 as notated as “1st Point”; see above Examiner’s Markup Fig. 1C Sutardja) in said trace plane and a selected second point (i.e., a point at the top of 110/112 as notated as “2nd Point”; see above Examiner’s Markup Fig. 1C Sutardja) in said trace plane (see Fig. 1C), and having:
a first side;
a second side opposite said first side;
a top side;
a bottom side opposite said top side;
a first width, W1, between said first side and said second side; and
a height, T, between said top side and said bottom side;
a first electrically-conductive reference trace 110 (“first metal layer… ground (GND) plane”- ¶0023, specifically the portion of 110 notated as “1st Reference Trace”; see above Examiner’s Markup Fig. 1C Sutardja) oriented in said trace plane laterally adjacent to a selected first side of the signal trace 112 and extending within said trace plane substantially from said first point to said second point, the first reference trace 110 having a second width W2, a height substantially equal to T, and spaced from the first side of the signal trace 112 by a third width S1, wherein S1 is less than T;
a second electrically-conductive reference trace 110 (“first metal layer… ground (GND) plane”- ¶0023, specifically the portion of 110 notated as “2nd Reference Trace”; see above Examiner’s Markup Fig. 1C Sutardja) substantially oriented in said trace plane laterally adjacent to a selected second side of the signal trace 112, the second reference trace 110 having said second width W2, a height substantially equal to T, and spaced from the second side of the signal trace 112 by said third width S1; and
said layer 110/112 embedding the signal trace 112 and the reference traces 110.
Regarding claim 16, Figure 4 of Sutardja discloses wherein S1 is further characterized as being substantially less than T.
Regarding claim 17, Figure 4 of Sutardja discloses an advanced package comprising the electrically-conductive layer of claim 15.
Regarding claim 18, Figure 4 of Sutardja discloses wherein the electrically-conductive layer is adapted to be connected to a selected one of a reference voltage or a ground voltage (¶0033).
Regarding claim 19, Figure 4 of Sutardja discloses the advanced package further comprising a second electrically-conductive layer 118 (“second metal layer”- ¶0027) or 110/112 (collectively elements 110 and 112, specifically different segments of 110/112 than the ones cited in claim 15) of claim 15.
Conclusion
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to JAY C CHANG whose telephone number is (571)272-6132. The examiner can normally be reached Mon- Fri 12pm-10pm.
Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Eliseo Ramos-Feliciano can be reached at (571)-272-7925. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/JAY C CHANG/Primary Examiner, Art Unit 2817