Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claims 1 and 12 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Quinones et al. [US PGPUB 20100148346] (hereinafter Quinones).
Regarding claim 1, Quinones teaches a packaged semiconductor device comprising:
a conductive paddle (2a, Fig. 7e);
a first conductive clip piece (3c, Para 64) having a first surface (surface facing structure 2a, Fig. 7) coupled with the conductive paddle (Fig. 7e) and a second surface (surface facing die 4, Fig. 7e) that is opposite the first surface (Fig. 7e);
a semiconductor die (4, Para 63) having a first surface (surface facing clip 3c, Fig. 7e) coupled with the second surface of the first conductive clip piece (Fig. 7e), and a second surface (surface facing portion of structure 5, Fig. 7e) being disposed in a plane (Fig. 7e), the second surface of the semiconductor die being opposite the first surface of the semiconductor die (Fig. 7e); and
a second conductive clip piece (portion of structure 5 attached to die 4, Fig. 7e) having a first surface (surface facing die 4 Fig. 7e) and a second surface opposite the first surface (surface planar with uppermost surface of the mold material, Fig. 7e), a first portion of the first surface of the second conductive clip piece being coupled with the second surface of the semiconductor die (Fig. 7e).
Regarding claim 12, Quinones teaches a packaged semiconductor device wherein;
the first conductive clip piece has a first thickness (Fig. 7e; i.e., thickness at region where clip 3c is couple to die 4); and
the second conductive clip piece has a second thickness (Fig. 7e; i.e., thickness portion of structure 5 not exposed from the mold compound and close to structure 5f).
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
Claims 1-6 and 13-14 are rejected under 35 U.S.C. 102(a)(2) as being anticipated by Xue et al. [US PGPUB 20170372987] (hereinafter Xue).
Regarding claim 1, Xue teaches a packaged semiconductor device comprising:
a conductive paddle (302, Para 16);
a first conductive clip piece (442, Para 18) having a first surface (surface contacting chip 312, Fig. 6B/7B) coupled with the conductive paddle (coupled via chip 312, Fig. 6B/7B) and a second surface (surface contact chip 512, Fig. 6B/7B) that is opposite the first surface (Fig. 6B/7B);
a semiconductor die (512, Para 19) having a first surface (surface contacting clip 442, Fig. 6B/7B) coupled with the second surface of the first conductive clip piece (Fig. 6B/7B), and a second surface (surface contacting clip 642, Fig. 6B/7B) being disposed in a plane (Fig. 6B/7B), the second surface of the semiconductor die being opposite the first surface of the semiconductor die (Fig. 6B/7B); and
a second conductive clip piece (642, Para 20) having a first surface (surface contacting chip 512, Fig. 6B/7B) and a second surface opposite the first surface (652, Fig. 6B/7B), a first portion of the first surface of the second conductive clip piece being coupled with the second surface of the semiconductor die (Fig. 6B/7B).
Regarding claim 2, Xue teaches a packaged semiconductor device further wherein the first surface of the second conductive clip piece is coupled with the second surface of the semiconductor die in the plane (Fig. 6B/7B).
Regarding claim 3, Xue teaches a packaged semiconductor device further comprising:
a signal lead (662, Para 20) having a surface (surface contacting end 654, Fig. 6B/7B), a portion of the surface of the signal lead being coupled with a second portion of the first surface of the second conductive clip piece (Fig. 6B/7B).
Regarding claim 4, Xue teaches a packaged semiconductor device wherein the first surface of second conductive clip piece includes a notch (762, Para 26) disposed therein (Fig. 7B), the notch being disposed between the first portion of the first surface of the second conductive clip piece and the second portion of the first surface of the second conductive clip piece (Fig. 6B/7B).
Regarding claim 5, Xue teaches a packaged semiconductor device further wherein the surface of the signal lead is disposed in the plane of the second surface of the semiconductor die (Fig. 6B/7B).
Regarding claim 6, Xue teaches a packaged semiconductor device further comprising a molding compound (722, Para 25) encapsulating the semiconductor die, encapsulating the first conductive clip piece, at least partially encapsulating the conductive paddle, at least partially encapsulating the second conductive clip piece, and at least partially encapsulating the signal lead (Fig. 7B).
Regarding claim 13, Xue teaches a packaged semiconductor device comprising:
a conductive paddle (302, Para 16);
a first conductive clip piece (442, Para 18) having a first surface (surface contacting chip 312, Fig. 6B/7B) coupled with the conductive paddle (coupled via chip 312, Fig. 6B/7B) and a second surface (surface contact chip 512, Fig. 6B/7B) that is opposite the first surface (Fig. 6B/7B);
a semiconductor die (512, Para 19) having a first surface (surface contacting clip 442, Fig. 6B/7B) coupled with the second surface of the first conductive clip piece (Fig. 6B/7B), and a second surface (surface contacting clip 642, Fig. 6B/7B) being disposed in a plane (Fig. 6B/7B), the second surface of the semiconductor die being opposite the first surface of the semiconductor die (Fig. 6B/7B);
a second conductive clip piece (642, Para 20) having a first surface (surface contacting chip 512, Fig. 6B/7B) and a second surface opposite the first surface (652, Fig. 6B/7B), a first portion of the first surface of the second conductive clip piece being coupled with the second surface of the semiconductor die (Fig. 6B/7B);
a signal lead (662, Para 20) having a surface coupled with a second portion of the first surface of the second conductive clip piece (Fig. 6B/7B), the surface of the signal lead being disposed in the plane of the second surface of the semiconductor die (Fig. 6B/7B); and
a molding compound (722, Para 25) encapsulating the semiconductor die, encapsulating the first conductive clip piece, at least partially encapsulating the conductive paddle, at least partially encapsulating the second conductive clip piece, and at least partially encapsulating the signal lead (Fig. 7B).
Regarding claim 14, Xue teaches a packaged semiconductor device wherein the first surface of second conductive clip piece includes a notch (762, Para 26) disposed therein (Fig. 7B), the notch being disposed between the first portion of the first surface of the second conductive clip piece and the second portion of the first surface of the second conductive clip piece (Fig. 6B/7B).
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 11 and 16-17 are rejected under 35 U.S.C. 103 as being unpatentable over Xue.
Regarding claim 11, Xue teaches the limitation of claim 1 upon which it depends.
Xue does not specifically disclose a packaged semiconductor device wherein the first conductive clip piece and the second conductive clip piece have a same thickness.
However, it is noted that Xue depicts the first conductive clip piece and the second conductive clip piece to have a same thickness (Fig. 6B).
In view of such depiction, it would have been obvious to a person having ordinary skills in the art before the effective filing date of the claimed invention to have the first conductive clip piece and the second conductive clip piece have a same thickness at least based on the rationale of relying on teachings, suggestions, or motivation in the prior art that would have led one of ordinary skill to modify the prior art reference or to combine prior art reference teachings to arrive at the claimed invention (MPEP 2143.I.G)
Regarding claim 16, Xue teaches the limitation of claim 13 upon which it depends.
Xue does not specifically disclose a packaged semiconductor device wherein the first conductive clip piece and the second conductive clip piece have a same thickness.
However, it is noted that Xue depicts the first conductive clip piece and the second conductive clip piece to have a same thickness (Fig. 6B).
In view of such depiction, it would have been obvious to a person having ordinary skills in the art before the effective filing date of the claimed invention to have the first conductive clip piece and the second conductive clip piece have a same thickness at least based on the rationale of relying on teachings, suggestions, or motivation in the prior art that would have led one of ordinary skill to modify the prior art reference or to combine prior art reference teachings to arrive at the claimed invention (MPEP 2143.I.G).
Regarding claim 17, Xue teaches a packaged semiconductor device wherein;
the first conductive clip piece has a first thickness (Fig. 6B); and
the second conductive clip piece has a second thickness (Fig. 6B).
In the embodiment of Fig. 6B, Xue does not disclose that the second thickness is different than the first thickness.
However, in Fig. 7D, of Xue’s invention, Xue depicts the second conductive clip piece 742, having a thickness different than that of the first conductive clip piece.
In view of such further teaching by Xue, it would have been obvious to a person having ordinary skills in the art before the effective filing date of the claimed invention to have the second conductive clip piece have a thickness different (thicker) than the first conductive clip piece in order to have the second conductive clip piece exposed for the molding compound and thus allow for improved thermal dissipation in the device.
Claims 7 and 15 are rejected under 35 U.S.C. 103 as being unpatentable over Xue in view of Xue et al. [US PGPUB 20150087114] (hereinafter Xue114).
Regarding claim 7, Xue teaches a packaged semiconductor device of claim 6, wherein:
a surface of the conductive paddle is exposed through the molding compound on a first side (702, Para 26) of the packaged semiconductor device (Fig. 7B); and
the second side being opposite the first side (Fig. 7B).
Xue does not specifically disclose that the second surface of the second conductive clip piece is exposed through the molding compound on a second side of the packaged semiconductor device.
Referring to the invention of Xue114, Xue114 discloses that the top surface of clip 151 can be unexposed from molding compound 160 (Fig. 2D-1) and in another instance, the top surface of clip 151 is exposed from the molding compound 160 (Fig. 2D-2).
In view of such teaching by Xue114, it would have been obvious to a person having ordinary skills in the art before the effective filing date of the claimed invention to have the second surface of the second conductive clip piece in Xue’s invention exposed through the molding compound on a second side of the packaged semiconductor device, at least based on the rationale of simple substitution of one known element/structure with a suitable another to obtain predictable results (MPEP 2143.I.B), wherein exposing the surface allows for improved heat dissipation in the device.
Regarding claim 15, Xue teaches a packaged semiconductor device of claim 6, wherein:
a surface of the conductive paddle is exposed through the molding compound on a first side (702, Para 26) of the packaged semiconductor device (Fig. 7B); and
the second side being opposite the first side (Fig. 7B).
Xue does not specifically disclose that the second surface of the second conductive clip piece is exposed through the molding compound on a second side of the packaged semiconductor device.
Referring to the invention of Xue114, Xue114 discloses that the top surface of clip 151 can be unexposed from molding compound 160 (Fig. 2D-1) and in another instance, the top surface of clip 151 is exposed from the molding compound 160 (Fig. 2D-2).
In view of such teaching by Xue114, it would have been obvious to a person having ordinary skills in the art before the effective filing date of the claimed invention to have the second surface of the second conductive clip piece in Xue’s invention exposed through the molding compound on a second side of the packaged semiconductor device, at least based on the rationale of simple substitution of one known element/structure with a suitable another to obtain predictable results (MPEP 2143.I.B), wherein exposing the surface allows for improved heat dissipation in the device.
Allowable Subject Matter
Claims 8-10 and 18-19 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
Conclusion
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/ISMAIL A MUSE/ Primary Examiner, Art Unit 2812
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