DETAILED ACTION
This Office Action is in response to Applicant’s application 18/761,660 filed on July 2, 2024 in which claims 1 to 20 are pending.
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Drawings
The drawings submitted on July 2, 2024 have been reviewed and accepted by the Examiner.
Information Disclosure Statement
The Information Disclosure Statements (IDS), filed on December 12, 2025 and May 8, 2026 are in compliance with the provisions of 37 CFR 1.97. Accordingly, the information disclosed therein has been considered by the Examiner.
Notation
References to patents will be in the form of [C:L] where C is the column number and L is the line number. References to pre-grant patent publications will be to the paragraph number in the form of [xxxx].
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
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Claims 1-9, 11-13 and 17 are rejected under 35 U.S.C. 103 as being unpatentable over U.S. 2022/0293458 (Khaderbad) and U.S. 2025/0340985 (Kato).
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Regarding claim 1, Khaderbad discloses at annotated Figures 5, 9 and 12; semiconductor processing method comprising:
providing a layer of a first silicon-containing material, 120 [0037] or 114 [0058], defining one or more features, 506 [0036] and as annotated, disposed on the substrate, as shown;
forming a liner material, e.g., 136 [0052], e.g. SiN, SiON, SiCN, etc., on the first silicon-containing material, as described at [0058];
performing an atomic layer deposition (ALD) process, [0060], wherein the ALD process deposits a silicon-and-oxygen-containing material, 136 [0030], e.g. SiO2 or SiOC etc., in the one or more features, shown.
Khaderbad teaches the liner and gap fill material are formed by ALD at [0050, 60]. Khaderbad teaches the liner material includes SiCN at [0052].
Khaderbad does not teach providing one or more deposition precursors to a processing region of a semiconductor processing chamber, wherein a substrate is disposed within the processing region contacting the substrate with the one or more deposition precursors, wherein the contacting deposits forming a liner.
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Kato is directed to the formation of insulating films on wafers. Kato teaches ALD of insulating films [0029], by providing one or more deposition precursors, [0038], to a processing region, 38 [0052], of a semiconductor processing chamber, 1 [0053], wherein a substrate, W [0053], is disposed within the processing region contacting the substrate with the one or more deposition precursors, [0055], wherein the contacting deposits forming a liner, e.g. SiCN or SiOCN [0064].
Taken as a whole the prior art is directed to tools and methods to produce gap fill structures for semiconductors using ALD processes. Kato teaches an ALD process uses a chamber to receive a wafer and precursors which enable the formation of an insulating film, e.g., SiCN. An artisan would find it useful to form an ALD film using and ALD process using commercially available equipment.
Accordingly it would have been obvious to a person of ordinary skill in the art at the time of Applicant’s invention to configure the method of claim 1 by providing one or more deposition precursors to a processing region of a semiconductor processing chamber, wherein a substrate is disposed within the processing region contacting the substrate with the one or more deposition precursors, wherein the contacting deposits forming a liner, as taught by Kato, because Khaderbad teaches the liner includes SiCN formed by ALD and Kato teaches a chamber and precursors to form and ALD material for a semiconductor wafer and because the combination of familiar elements according to known methods is likely to be obvious when it does no more than yield predictable results. KSR International Co. v. Teleflex Inc., 550 U.S. 398, 416 (2007).
Regarding claim 2 which depends upon claim 1, Kato teaches the deposition precursors, 51a-55a [0037], comprise a silicon-containing precursor, 51a [0038], carbon-containing precursor, 51a [0038], or a nitrogen-containing precursor, 52a [0040].
Regarding claim 3 which depends upon claim 1, Kato teaches the deposition precursors comprise diatomic nitrogen (N2) or ammonia (NH3) at [0040].
Regarding claim 4 which depends upon claim 1, Khaderbad teaches the first silicon-containing material, 120 [0037] or 114 [0058], comprises a silicon-and-germanium-containing material.
Regarding claim 5 which depends upon claim 1, Khaderbad teaches the layer of the first silicon-containing material, 120, is disposed on the substrate in alternation with a layer of a second silicon-containing material, 122 [0037].
Regarding claim 6 which depends upon claim 1, Khaderbad teaches the liner material is characterized by a thickness of 1-30 nm [0053] and so teaches the liner is less than or about 10 nm.
Regarding claim 7 which depends upon claim 1, Khaderbad teaches the liner material comprises a silicon-and-nitrogen-containing material, e.g., SiCN [0052].
Regarding claim 8 which depends upon claim 1, Khaderbad teaches at [0050] and Kato teaches through-out contacting the substrate with the one or more deposition precursors to deposit the liner material comprises performing a liner material ALD process.
Regarding claim 9 which depends upon claim 1, at [0060] Khaderbad teaches the liner with a thickness greater than 3 nm will prevent oxidation of the first silicon containing material, SiGe, and so teaches performing the ALD process reduces an upper surface thickness of the layer of the first silicon-containing material by less than or about 5 nm because oxidation of the SiGe is prevented during the subsequent ILD formation and anneal process, see also [0015, 29].
Regarding claim 11 which depends upon claim 1, Khaderbad teaches the ALD process comprises a gap-fill operation, as shown and described at [0063].
Regarding claim 12 and referring to the discussion at claim 1 Khaderbad discloses a semiconductor processing method comprising: performing a first atomic layer deposition (ALD) process, [0050], on a substrate [0067], wherein a layer of a silicon-containing material, 120 [0037], defining one or more features, 506 [0036] or as shown in Figure 10, disposed on the substrate, as shown, and wherein the first ALD process deposits a silicon-and-nitrogen-containing material, e.g., SiCN or SiCON [0052], on the silicon-containing material, 120 as described at [0052] or 114 as shown;; performing a second ALD process, [0060], on the substrate, wherein the second ALD process deposits a silicon-and-oxygen-containing material, e.g. SiOC [0030], in the one or more features, as shown.
Khaderbad does not teach a substrate disposed within a processing region of a semiconductor processing chamber and halting the first ALD process.
Kato teaches an ALD process uses substrate disposed within a processing region of a semiconductor processing chamber.
Taken as a whole the prior art is directed to formation of gap fill structures using ALD processes. Examiner notes there is a recognized problem in the art, optimization of ALD processes for capital utilization. Furthermore, there are a finite number of ways to optimize ALD processing, e.g., multiple ALD processes in a single tool or dedicated tools for particular a process. Moreover, an artisan could have tried each of these with a reasonable chance of optimizing capital utilization and related output. Accordingly for the reasons discussed at claim 1 it would have been obvious to a person of ordinary skill in the art at the time of Applicant’s invention to try the method of claim 12 by halting the first ALD process. KSR International Co. v. Teleflex Inc., 550 U.S. 398, 421 (2007).
Regarding claim 13 which depends upon claim 12, Khaderbad teaches the silicon-and-nitrogen-containing material, 126, is conformal at Figure 12.
Regarding claim 17 which depends upon claim 12, Khaderbad teaches the silicon-and-nitrogen-containing material reduces underlayer oxidation of the layer of the silicon-containing material at [0015, 29].
Claims 12, 14-15 and 17 are rejected under 35 U.S.C. 103 as being unpatentable over U.S. 2022/0293458 (Khaderbad) and U.S. 2020/0126788 (Pore).
Regarding claim 12, Khaderbad discloses a semiconductor processing method comprising: performing a first atomic layer deposition (ALD) process, [0050], on a substrate, 102 [0067], wherein a layer of a silicon-containing material, 120 [0037], defining one or more features, 506 [0036] or as annotated in Figure 10, is disposed on the substrate, as shown, and wherein the first ALD process deposits a silicon-and-nitrogen-containing material, e.g. SiN, SiON, SiC, SiCN [0052], on the silicon-containing material, as shown; performing a second ALD process, [0060], on the substrate, wherein the second ALD process deposits a silicon-and-oxygen-containing material, e.g., SiOC [0030], in the one or more features.
Khaderbad teaches the first ALD process produces SiCN, etc. at [0052].
Khaderbad does not teach a substrate disposed within a processing region of a semiconductor processing chamber and halting the first ALD process.
Pore is directed to tools and methods to produce a SiCN film using ALD. Pore teaches a Pulsar 3000 reactor [0056] is useful for ALD of SiCN films. Examiner notes the Pulsar 3000 reactor with have a process chamber and a processing region within the process chamber, c.f., U.S. 2013/0203267 at Figure 3.
Taken as a whole the prior art is directed to structures formed by ALD processes. Examiner notes there is a recognized problem in the art, optimization of ALD processes for capital utilization. Furthermore, there are a finite number of ways to optimize ALD processing, e.g., multiple ALD processes in a single tool or dedicated tools for particular a process. Moreover, an artisan could have tried each of these with a reasonable chance of optimizing capital utilization and related output. Accordingly for the reasons discussed at claim 1 it would have been obvious to a person of ordinary skill in the art at the time of Applicant’s invention to try the method of claim 12 by halting the first ALD process. KSR International Co. v. Teleflex Inc., 550 U.S. 398, 421 (2007).
Regarding claim 14 which depends upon claim 12, Pore teaches forming a SiCN film comprises a first ALD process comprises sequentially exposing the substrate to a silicon-containing precursor and a nitrogen-containing precursor at [0045-49], see also Figure 1.
Regarding claim 15 which depends upon claim 14, Pore teaches the nitrogen-containing precursor comprises ammonia (NH3) at [0045-46].
Regarding claim 17 which depends upon claim 12, Khaderbad teaches the silicon-and-nitrogen-containing material reduces underlayer oxidation of the layer of the silicon-containing material at [0015, 29].
Claims 18-19 are rejected under 35 U.S.C. 103 as being unpatentable over U.S. 2022/0293458 (Khaderbad) and U.S. 2021/0025634 (Sharma) and U.S. 2022/0220142 (Husson).
Regarding claim 18 Khaderbad discloses a semiconductor processing method comprising: performing a first atomic layer deposition (ALD) process, [0050], on a substrate, 102 [0067], wherein alternating layers of a silicon-containing material, 122 [0037], and a silicon-and-germanium-containing material, 120 [0037], defining one or more features, 506 [0036], is disposed on the substrate, as shown, and wherein the first ALD process conformally deposits, see Figure 10 where 136 is blanket deposited, a silicon-and-nitrogen-containing liner material, e.g. SiCN, SiON SiN [0052], on the alternating layers of the silicon-containing material and the silicon-and-germanium-containing material, where 136 is blanket deposited [0052]; the silicon-and-nitrogen-containing liner material is formed to a thickness of greater than or about 2 nm, [0029]; performing a second ALD process, [0062], on the substrate, wherein the second ALD process deposits a silicon-and-oxygen-containing material, e.g., SiOC [0030], in the one or more features, as shown.
Khaderbad does not teach a substrate disposed within a processing region of a semiconductor processing chamber, and halting the first ALD process.
Sharma is directed to ALD processes to form SiCN. At [0020], Sharma teaches that SiCN films are formed in a reaction chamber via a cyclic ALD process. An artisan would recognize the chamber has have a platen and substrate processing region.
Husson is directed to ALD processes. Husson teaches and suggests that ALD films are formed on a substrate disposed within a processing region of a semiconductor processing chamber at [0227-229].
Taken as a whole the prior art is directed to formation of ALD films. Examiner notes there is a recognized problem in the art, optimization of ALD processes for capital utilization. Furthermore, there are a finite number of ways to optimize ALD processing, e.g., multiple ALD processes in a single tool or dedicated tools for particular a process. Moreover, an artisan could have tried each of these with a reasonable chance of optimizing capital utilization and related output. Accordingly for the reasons discussed at claim 12 it would have been obvious to a person of ordinary skill in the art at the time of Applicant’s invention to try the method of claim 18 by halting the first ALD process. KSR International Co. v. Teleflex Inc., 550 U.S. 398, 421 (2007).
Regarding claim 19 which depends upon claim 18, Sharma teaches deposition of the silicon-and-nitrogen-containing liner material is self-limiting [0018].
Claims 1-8, 11-15 and 18-19 are rejected under 35 U.S.C. 103 as being unpatentable over U.S. 2020/0126788 (Pore) and U.S. 2024/0322024 (Tsai).
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Regarding claim 1, Pore discloses A semiconductor processing method comprising: providing one or more deposition precursors, [0034, 45-46], to a processing region of a semiconductor processing chamber, [0047-49], wherein a substrate, as annotated, is disposed within the processing region [0047-49], and wherein a layer of a first silicon containing material, as annotated, defining one or more features, 1100 [0110], is disposed on the substrate, as shown; contacting the substrate with the one or more deposition precursors, [0045-46], wherein the contacting deposits a liner material, e.g., SiCN, on the first silicon-containing material, as shown.
Pore does not teach performing an atomic layer deposition (ALD) process, wherein the ALD process deposits a silicon-and-oxygen-containing material in the one or more features.
Tsai is directed to integration of ALD SiCN films into semiconductor devices. At annotated Figure 2 and 3 Tsai teaches a substrate, 100 [0027], comprising a layer of a first material, 102 [0030], as a defining one or more features, T [00036], is disposed on the substrate, as shown; depositing a liner material, 108 e.g., SiCN [0036], on the first silicon-containing material, as shown; performing an atomic layer deposition (ALD) process, [0036-37], wherein the ALD process deposits a
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silicon-and-oxygen-containing material 110 e.g., SiO2 [0036-27], in the one or more features, as shown.
Taken as a whole the prior art is directed to integration of materials and processing equipment to produce a semiconductor device. Tsai teaches that filling the feature with a silicon and oxygen containing material produces a useful structure in the production of a transistor. An artisan would find it desirable to sell and market ALD production tools to manufactures of transistors. An artisan would find it desirable to demonstrate the utility of the tool by replicating structures used by the transistor manufacturer to facilitate tool sales.
Accordingly it would have been obvious to a person of ordinary skill in the art at the time of Applicant’s invention to configure the method of claim 1 comprising performing an atomic layer deposition (ALD) process, wherein the ALD process deposits a silicon-and-oxygen-containing material in the one or more features, as taught by Tsai, to illustrate to semiconductor manufacturers the utility of deposition chambers and precursors in the fabrication of semiconductor devices and because the combination of familiar elements according to known methods is likely to be obvious when it does no more than yield predictable results. KSR International Co. v. Teleflex Inc., 550 U.S. 398, 416 (2007).
Regarding claim 2 which depends upon claim 1, Pore teaches at [0045-47, 52],
the deposition precursors comprise a silicon-containing precursor, a carbon-containing precursor, or a nitrogen-containing precursor.
Regarding claim 3 which depends upon claim 1, Pore teaches at [0045-47, 52], the deposition precursors comprise diatomic nitrogen (N2) or ammonia (NH3) [0045-47, 52].
Regarding claim 4 which depends upon claim 1, Tsai teaches the first silicon-containing material comprises a silicon-and-germanium-containing material [0030].
Regarding claim 5 which depends upon claim 1, Tsai teaches the layer of the first silicon-containing material is disposed on the substrate in alternation with a layer of a second silicon-containing material, 104 [0030].
Regarding claim 6 which depends upon claim 1, Tsai teaches the liner material is characterized by a thickness less than or about 10 nm at [0036].
Regarding claim 7 which depends upon claim 1 Pore and Tsai teach the liner material comprises a silicon-and-nitrogen-containing material, e.g., SiCN.
Regarding claim 8 which depends upon claim 1, Pore teaches contacting the substrate with the one or more deposition precursors to deposit the liner material comprises performing a liner material, SiCN, ALD process.
Regarding claim 11 which depends upon claim 1, Tsai teaches the ALD process comprises a gap-fill operation at Figure 2.
Regarding claim 12 and referring to the discussion at claim 1, Pore teaches a semiconductor processing method comprising: performing a first atomic layer deposition (ALD) process on a substrate disposed within a processing region of a semiconductor processing chamber, wherein a layer of a silicon-containing material defining one or more features is disposed on the substrate, and wherein the first ALD process deposits a silicon-and-nitrogen-containing material on the silicon-containing material;
Pore does not teach halting the first ALD process; performing a second ALD process on the substrate, wherein the second ALD process deposits a silicon-and-oxygen-containing material in the one or more features.
Tsai teaches performing a second ALD process on the substrate, wherein the second ALD process deposits a silicon-and-oxygen-containing material in the one or more features.
Taken as a whole the prior art is directed to ALD processes. Pore teaches that a first ALD process produces a SiCN film. Tsai teaches a second ALD process produces a SiO2 film. An artisan would recognize that the films have different compositions and cannot be performed in a single ALD process. Further that the first ALD process would need to stop to purge the chamber of reactant gases to avoid cross contamination of the two materials, i.e., just common sense.
Accordingly, it would have been obvious to a person of ordinary skill in the art at the time of Applicant’s invention to configure the method of claim 1 by halting the first ALD process to avoid cross contamination between the first and second ALD processes and because the combination of familiar elements according to known methods is likely to be obvious when it does no more than yield predictable results. KSR International Co. v. Teleflex Inc., 550 U.S. 398, 416 (2007).
Regarding claim 13 which depends upon claim 12, Pore at Figure 12, [0026] and Tsai at Figure 2 and [0036], wherein the silicon-and-nitrogen-containing material is conformal.
Regarding claim 14 which depends upon claim 12, Pore teaches the first ALD process comprises sequentially exposing the substrate to a silicon-containing precursor and a nitrogen-containing precursor at Figure 1, [0051-54].
Regarding claim 15 which depends upon claim 14, Pore teaches the nitrogen-containing precursor comprises ammonia (NH3) [0052].
Regarding claim 18 and referring to the discussion above, Pore teaches semiconductor processing method comprising: performing a first atomic layer deposition (ALD) process, [0075], on a substrate disposed within a processing region of a semiconductor processing chamber, [0047-49], and wherein the first ALD process conformally deposits, see Figure 12, a silicon-and-nitrogen-containing liner, SiCN, material on a silicon-containing material; halting the first ALD process after the silicon-and-nitrogen-containing liner material is formed to a thickness of greater than or about 2 nm [0061];
Pore does not explicitly teach alternating layers of a silicon-containing material and a silicon-and-germanium-containing material defining one or more features is disposed on the substrate; the first ALD process conformally deposits a silicon-and-nitrogen-containing liner material on the alternating layers of the silicon-containing material and the silicon-and-germanium-containing material; halting the first ALD process after the silicon-and-nitrogen-containing liner material is formed; performing a second ALD process on the substrate, wherein the second ALD process deposits a silicon-and-oxygen-containing material in the one or more features.
Tsai teaches a trench in alternating layers of a silicon-containing material and a silicon-and-germanium-containing material defining one or more features is disposed on the substrate; the first ALD process conformally deposits a silicon-and-nitrogen-containing liner material, SiCN, on the alternating layers of the silicon-containing material and the silicon-and-germanium-containing material; performing a second ALD process on the substrate, wherein the second ALD process deposits a silicon-and-oxygen-containing material in the one or more features.
For the reasons discussed at claim 1 it would have been obvious to a person ordinary skill in the art at the time of Applicant’s invention to configure the method of claim 18 with alternating layers of a silicon-containing material and a silicon-and-germanium-containing material defining one or more features is disposed on the substrate; the first ALD process conformally deposits a silicon-and-nitrogen-containing liner material on the alternating layers of the silicon-containing material and the silicon-and-germanium-containing material; halting the first ALD process after the silicon-and-nitrogen-containing liner material is formed; performing a second ALD process on the substrate, wherein the second ALD process deposits a silicon-and-oxygen-containing material in the one or more features, to illustrate to semiconductor manufacturers the utility of deposition chambers and precursors in the fabrication of semiconductor devices and because the combination of familiar elements according to known methods is likely to be obvious when it does no more than yield predictable results. KSR International Co. v. Teleflex Inc., 550 U.S. 398, 416 (2007).
Regarding claim 19 which depends upon claim 18, Pore teaches deposition of the silicon-and-nitrogen-containing liner material is self-limiting at [0034].
Claims 9 and 17 are rejected under 35 U.S.C. 103 as being unpatentable over U.S. 20200126788 (Pore) and U.S. 2024/0322024 (Tsai) and Khaderbad.
Regarding claim 9 which depends upon claim 1, Pore is silent as to any reduction in the thickness of the first silicon containing material and so suggests that performing the ALD process reduces an upper surface thickness of the layer of the first silicon-containing material by less than or about 5 nm.
As discussed above Khaderbad teaches SiCN is an oxidation barrier and so performing the ALD process reduces an upper surface thickness of the layer of the first silicon-containing material by less than or about 5 nm.
Regarding claim 17 which depends upon claim 12, Pore is silent as to the SiCN property, i.e., the silicon-and-nitrogen-containing material reduces underlayer oxidation of the layer of the silicon-containing material.
Khaderbad teaches the silicon-and-nitrogen-containing material, SiCN, reduces underlayer oxidation of the layer of the silicon-containing material at [0015, 29].
Accordingly, it would have been obvious to a person of ordinary skill in the art at the time of Applicant’s invention to configure the method of claim 12 wherein the silicon-and-nitrogen-containing material reduces underlayer oxidation of the layer of the silicon-containing material because Khaderbad teaches these materials have this property.
Allowable Subject Matter
Claims 10, 16 and 18 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
The following is a statement of reasons for the indication of allowable subject matter:
Regarding claim 10 the prior art does not teach the method of claim 1, wherein performing the ALD process converts the liner material to silicon-and-oxygen-containing material. – Examiner is mindful of the burden of showing inherency for the consumption of the liner by the gap fill material.
Regarding claim 16 the prior art does not teach the method of claim 12, wherein, subsequent the second ALD process, the silicon-and-nitrogen-containing material is converted to silicon-and-oxygen-containing material.
Regarding claim 20 the prior art does not teach the method of claim 18, wherein, subsequent the second ALD process, the silicon-and-nitrogen-containing liner material is converted to silicon-and-oxygen-containing material
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure is listed on the notice of references cited.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to Joe Schoenholtz whose telephone number is (571)270-5475. The examiner can normally be reached M-Thur 7 AM to 7 PM PST.
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/J.E. Schoenholtz/Primary Examiner, Art Unit 2893
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