DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 1-20 is/are rejected under 35 U.S.C. 103 as being unpatentable over Xiao(USPGPUB DOCUMENT: 2020/0335397, hereinafter Xiao) in view of Pi (USPGPUB DOCUMENT: 2022/0307127, hereinafter Pi).
Re claim 1 Xiao discloses a substrate(421) for semiconductor fabrication, comprising: an interior portion(432) bound by a perimeter(from the top down view 432 is bound by 421), wherein all of the perimeter(from the top down view 432 is bound by 421) form a hardened perimeter[0024](since 421 is tough this may be interpreted as hard) having an increased hardness relative to the interior portion(432).
Xiao does not discloses wherein all of the perimeter(from the top down view 432 is bound by 421) has been selectively treated to form a hardened perimeter
Pi discloses in Fig 4C selectively treated (ion)[0029 of Pi] to form a hardened perimeter
It would have been obvious to one of ordinary skill in the art before the effective filling date of the invention to apply the teachings of Pi to the teachings of Xiao in order to forming discrete regions of optical device substrates having at least one discrete area of high refractive index or scratch resistant optical material [0002, Pi]. In doing so, wherein all of the perimeter(from the top down view 432 is bound by 421) has been selectively treated(ion)[0029 of Pi] to form a hardened perimeter
Re claim 2 Xiao and Pi disclose the substrate(421) for semiconductor fabrication [0067]of claim 1, wherein the perimeter(from the top down view 432 is bound by 421) has been selectively treated via ion implantation(ion)[0029 of Pi] to form the hardened perimeter(from the top down view 432 is bound by 421)[0024].
Re claim 3 Xiao and Pi disclose the substrate(421) for semiconductor fabrication [0067]of claim 2, wherein the ion implantation(ion)[0029 of Pi] utilizes one or more of argon, helium, nitrogen, or oxygen.
Re claim 4 Xiao and Pi disclose the substrate(421) for semiconductor fabrication [0067]of claim 1, wherein the hardened perimeter(from the top down view 432 is bound by 421)[0024] extends from an outer edge of the substrate(421) for semiconductor fabrication [0067]towards the interior portion(432) by less than or equal to about 2 mm.
Re claim 5 Xiao and Pi disclose the substrate(421) for semiconductor fabrication [0067]of claim 1, wherein the hardened perimeter(from the top down view 432 is bound by 421)[0024] comprises glass.
Re claim 6 Xiao and Pi disclose the substrate(421) for semiconductor fabrication [0067]of claim 1, wherein the hardened perimeter(from the top down view 432 is bound by 421)[0024] comprises fused silica or a doped fused silica.
Re claim 7 Xiao and Pi disclose the substrate(421) for semiconductor fabrication [0067]of claim 1, wherein both a top side and a bottom side of the substrate(421) for semiconductor fabrication [0067]substrate(421) has been selectively treated to form the hardened perimeter(from the top down view 432 is bound by 421)[0024].
Re claim 8 Xiao discloses a method of treating a substrate(421) for semiconductor fabrication, comprising: selecting a perimeter(from the top down view 432 is bound by 421) of the substrate(421) for semiconductor fabrication [0067]to form a hardened perimeter(from the top down view 432 is bound by 421)[0024] having an increased hardness[0024](since 421 is tough this may be interpreted as hard) relative to an interior portion(432) of the substrate(421) for semiconductor fabrication [0067]bounded by the perimeter(from the top down view 432 is bound by 421).
Xiao does not discloses treating a perimeter(from the top down view 432 is bound by 421) of the substrate(421) for semiconductor fabrication [0067]to form a hardened perimeter(from the top down view 432 is bound by 421)[0024]
Pi discloses in Fig 4C treating the substrate (ion)[0029 of Pi]
It would have been obvious to one of ordinary skill in the art before the effective filling date of the invention to apply the teachings of Pi to the teachings of Xiao in order to forming discrete regions of optical device substrates having at least one discrete area of high refractive index or scratch resistant optical material [0002, Pi]. In doing so, treating (ion)[0029 of Pi] a perimeter(from the top down view 432 is bound by 421) of the substrate(421) for semiconductor fabrication to form a hardened perimeter(from the top down view 432 is bound by 421)[0024]
Re claim 9 Xiao and Pi disclose the method of claim 8, wherein selectively treating the perimeter(from the top down view 432 is bound by 421) of the substrate(421) for semiconductor fabrication [0067]comprises ion implantation(ion)[0029 of Pi].
Re claim 10 Xiao and Pi disclose the method of claim 9, wherein the ion implantation(ion)[0029 of Pi] utilizes one or more of argon, helium, nitrogen, or oxygen.
Re claim 11 Xiao and Pi disclose the method of claim 9, wherein the ion implantation(ion)[0029 of Pi] utilizes a potential of greater than or equal to about 10 kV, at a power from about 0.1 to 10 mA.
Re claim 12 Xiao and Pi disclose the method of claim 9, wherein the ion implantation(ion)[0029 of Pi] utilizes a plurality of ion beams.
Re claim 13 Xiao and Pi disclose the method of claim 8, wherein the hardened perimeter(from the top down view 432 is bound by 421)[0024] extends from an outer edge of the substrate(421) for semiconductor fabrication [0067]towards the interior portion(432) by less than or equal to about 2 mm.
Re claim 14 Xiao and Pi disclose the method of claim 8, wherein the hardened perimeter(from the top down view 432 is bound by 421)[0024] comprises glass, fused silica, or a doped fused silica.
Re claim 15 Xiao and Pi disclose the method of claim 8, wherein both a top side and a bottom side of the substrate(421) for semiconductor fabrication [0067]has been selectively treated to form the hardened perimeter(from the top down view 432 is bound by 421)[0024].
Re claim 16 Xiao and Pi disclose the method of claim 8, further comprising subdividing a base substrate(421) comprising the hardened perimeter(from the top down view 432 is bound by 421)[0024] by cutting[0047] the base substrate(421) along the hardened perimeter(from the top down view 432 is bound by 421)[0024] to form the substrate(421) for semiconductor fabrication.
Re claim 17 Xiao and Pi disclose the method of claim 16, further comprising processing of the base substrate(421) to form a semiconductor assembly within the hardened perimeter(from the top down view 432 is bound by 421)[0024] of the substrate(421) for semiconductor fabrication [0067]prior to subdividing the base substrate(421) along the hardened perimeter(from the top down view 432 is bound by 421)[0024].
Re claim 18 Xiao discloses a method to produce a plurality of semiconductor assemblies, comprising: at least one of a top side and a bottom side of a plurality of portions of a base substrate(421) along a plurality of perimeter(from the top down view 432 is bound by 421)s, each of the plurality of perimeter(from the top down view 432 is bound by 421)s outlining a substrate(421) for semiconductor fabrication [0067]within a corresponding portion of the base substrate(421) to form a plurality of hardened perimeter(from the top down view 432 is bound by 421)[0024]s, each having an increased hardness [0024](since 421 is tough this may be interpreted as hard) relative to an interior portion(432) of each of the outlined plurality of substrate(421)s for semiconductor fabrication [0067]bounded by the corresponding hardened perimeter(from the top down view 432 is bound by 421)[0024]; processing the base substrate(421) to form a plurality of semiconductor assemblies within each of the hardened perimeter(from the top down view 432 is bound by 421)[0024]s; and subdividing the base substrate(421) by cutting[0047] along each of the hardened perimeter(from the top down view 432 is bound by 421)[0024]s to form the plurality of semiconductor assemblies.
Xiao does not discloses selectively ion implanting at least one of a top side and a bottom side of a plurality of portions of a base substrate(421) along a plurality of perimeter(from the top down view 432 is bound by 421)s, each of the plurality of perimeter(from the top down view 432 is bound by 421)s outlining a substrate(421) for semiconductor fabrication [0067]within a corresponding portion of the base substrate(421) to form a plurality of hardened perimeter(from the top down view 432 is bound by 421)[0024]s,
Pi discloses in Fig 4C selectively ion implanting(ion)[0029 of Pi] at least one of a top side of a plurality of portions of a base substrate
It would have been obvious to one of ordinary skill in the art before the effective filling date of the invention to apply the teachings of Pi to the teachings of Xiao in order to forming discrete regions of optical device substrates having at least one discrete area of high refractive index or scratch resistant optical material [0002, Pi]. In doing so, selectively ion implanting(ion)[0029 of Pi] at least one of a top side and a bottom side of a plurality of portions of a base substrate(421) along a plurality of perimeter(from the top down view 432 is bound by 421)s, each of the plurality of perimeter(from the top down view 432 is bound by 421)s outlining a substrate(421) for semiconductor fabrication [0067]within a corresponding portion of the base substrate(421) to form a plurality of hardened perimeter(from the top down view 432 is bound by 421)[0024]s,
Re claim 19 Xiao and Pi disclose the method of claim 18, wherein the base substrate(421) is glass, fused silica, or a doped fused silica.
Re claim 20 Xiao and Pi disclose the method of claim 18, wherein the selective ion implanting(ion)[0029 of Pi] utilizes one or more of argon, helium, nitrogen, or oxygen, a potential of greater than or equal to about 10 kV, and a power from about 0.1 to 10 mA.
Conclusion
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/PATRICIA D VALENZUELA/Primary Examiner, Art Unit 2812
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