DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Election/Restrictions
Applicant’s election without traverse of claims 1-14 and 21-26 in the reply filed on 6/3/26 is acknowledged.
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claims 10-14 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
In claim 10, it is unclear where and how the gate is formed so that the gate spacer feature is in contact with a sidewall of the source/drain feature and the protection layer is formed between the gate spacer feature and the isolation feature, thus claim is indefinite.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
Claim(s) 1-5 and 8-9 is/are rejected under 35 U.S.C. 102(a)(2) as being anticipated by Pan et al. (US pub 20220320088).
With respect to claim 1, Pan et al. teach a semiconductor structure, comprising (see figs. 1-29, particularly fig. 27B and associated text):
an isolation feature 250;
a first base fin (206’ left) and a second base fin (206’ right) extending through and rising above the isolation feature;
a first active region 220’ left disposed over the first base fin;
a second active region 220’ right disposed over the second base fin;
a gate structure 374A disposed over the first active region, the second active region, and the isolation feature; and
a protection layer 372 sandwiched between the gate structure and the isolation feature.
With respect to claim 2, Pan et al. teach the isolation feature comprises silicon oxide, and wherein the protection layer comprises silicon nitride. See figs. 27B and associated text.
With respect to claim 3, Pan et al. teach the first active region comprises a first plurality of nanostructures disposed one over another, and wherein the second active region comprises a second plurality of nanostructures disposed one over another. See para 0050.
With respect to claim 4, Pan et al. teach the gate structure wraps around each of the first plurality of nanostructures and the second plurality of nanostructures. See figs. 27B and associated text.
With respect to claim 5, Pan et al. teach the protection layer comprises a portion that extends between a sidewall of the first base fin and the isolation feature and between a sidewall of the second base fin and the isolation feature. See figs. 27B and associated text.
With respect to claim 8, Pan et al. teach the first base fin (left) is spaced apart from the second base fin (right) along a direction (x), and wherein the gate structure 374A is sandwiched between a first dielectric fin (vertical portion of 372)) and a second dielectric fin (vertical portion 372) along the direction. See figs. 27B and associated text.
With respect to claim 9, Pan et al. teach the first dielectric fin and the second dielectric fin extend into the isolation feature. See figs. 27B and associated text.
Claim(s) 21-24 is/are rejected under 35 U.S.C. 102(a)(2) as being anticipated by Pan et al. (US pub 20220320088).
With respect to claim 21, Pan et al. teach a semiconductor structure, comprising (see figs. 1-29, particularly fig. 27B and associated text):
a substrate 206;
a first base portion (206’ left) and a second base portion (206’ right) over the substrate;
an isolation feature 250 over the substrate and disposed between the first base portion and the second base portion;
first nanostructures 220’ stacked one over another over the first base portion;
second nanostructures 220’ stacked one over another over the second base portion;
a gate structure 374A disposed over the first nanostructures, the second nanostructures, and the isolation feature; and
a protection layer 372 disposed between the gate structure and the isolation feature.
With respect to claim 22, Pan et al. teach comprising a first source/drain feature 320A,B disposed over the first base portion and interfacing the first nanostructures; and a second source/drain feature 320A,B disposed over the second base portion and interfacing the second nanostructures. See figs. 27B and associated text.
With respect to claim 23, Pan et al. teach the first source/drain feature comprises silicon germanium (SiGe) and a p-type dopant, and wherein the second source/drain feature comprises silicon (Si) and an n-type dopant. See para 0042.
With respect to claim 24, Pan et al. teach the isolation feature comprises silicon oxide, and wherein the protection layer comprises silicon nitride. See figs. 27B and associated text.
Allowable Subject Matter
Claims 6-7 and 25-26 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
Examiner’s Cited References
The cited references generally show the similar or related structure having a gate structure over a first active fin and a second active fin and an isolation region and a protection layer between the gate structure and isolation region as presently claimed by applicant.
Conclusion
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LONG . PHAM
Examiner
Art Unit 2823
/LONG PHAM/Primary Examiner, Art Unit 2897
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