Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
DETAILED ACTION
Status of Claims
1. Applicant's submittal of claims 1-9 in the “Claims” filed on 07/05/2024 is acknowledged and entered by the Examiner.
This office action considers claims 1-9 pending for prosecution.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale or otherwise available to the public before the effective filing date of the claimed invention.
Notes: when present, semicolon separated fields within the parenthesis (; ;) represent, for example, as (100; Fig 3A; [0063]) = (element 100; Figure No. 3A; Paragraph No. [0063]). For brevity, the texts “Element”, “Figure No.” and “Paragraph No.” shall be excluded, though; additional clarification notes may be added within each field. The number of fields may be fewer or more than three indicated above. These conventions are used throughout this document.
2. Claims 1 and 9 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Lee et al. (US 20220102352 A1; hereinafter Lee).
Regarding claim 1, Lee teaches a semiconductor structure (see the entire document, specifically Fig. 1+; [0009+], and as cited below), comprising:
a data storage unit (DSP1; Fig. 17C; [0166]) disposed in a first dielectric layer (ML1; Fig. 17C; [0154]);
a word line (WL1a; Fig. 17C; [0166]) disposed in a second dielectric layer ({150, 151, 153, 155}; Fig. 17C; [0156-0160]) over the first dielectric layer (ML1; Fig. 17C; [0154]);
an array of conductive pads (PADa; Fig. 17C; [0166]) disposed over the word line (WL1a; Fig. 17C; [0166]) and the second dielectric layer ({150, 151, 153, 155}; Fig. 17C; [0156-0160]);
a bit line (164; Fig. 17C; [0164-0166]) disposed over the conductive pads (PADa; Fig. 17C; [0166]);
a third dielectric layer (160; Fig. 17C; [0164]) disposed over the second dielectric layer ({150, 151, 153, 155}; Fig. 17C; [0156-0160]);
a fourth dielectric layer (171; Fig. 17C; in view of [0160] in view of 151, where 151 is an insulating layer) disposed over the third dielectric layer (160; Fig. 17C; [0164]);
a fifth dielectric layer (SIPb; Fig. 17C; in view of [0167]) disposed on the bit line (164; Fig. 17C; [0164-0166]), and disposed over the third dielectric layer (160; Fig. 17C; [0164]) and the fourth dielectric layer (171; Fig. 17C; in view of [0160] in view of 151, where 151 is an insulating layer);
a sixth dielectric layer (175; Fig. 17C; in view of [0160] in view of 155, where 155 is an insulating layer) disposed between a pair of the fifth dielectric layers (SIPb; Fig. 17C; in view of [0167]), and over the third dielectric layer (160; Fig. 17C; [0164]) and the fourth dielectric layer (171; Fig. 17C; in view of [0160] in view of 151, where 151 is an insulating layer); and
a conductive line (LP1; Fig. 17C; in view of [0094-0097, 0156]) disposed in the second dielectric layer ({150, 151, 153, 155}; Fig. 17C; [0156-0160]).
Regarding claim 9, Lee teaches all of the features of claim 1.
Lee further teaches wherein the sixth dielectric layer (175; Fig. 17C; in view of [0160] in view of 155, where 155 is an insulating layer in view of [0068, 0073, 0172, 0174], where insulating layers comprises of silicon oxide) is made of silicon oxide, silicon nitride, silicon oxynitride, phosphosilicate glass (PSG), borophosphosilicate glass (BPSG), low-k dielectric material, and/or other applicable dielectric materials.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102 of this title, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Notes: when present, semicolon separated fields within the parenthesis (; ;) represent, for example, as (30A; Fig 2B; [0128]) = (element 30A; Figure No. 2B; Paragraph No. [0128]). For brevity, the texts “Element”, “Figure No.” and “Paragraph No.” shall be excluded, though; additional clarification notes may be added within each field. The number of fields may be fewer or more than three indicated above. These conventions are used throughout this document.
3. Claims 3-8 are rejected under 35 U.S.C.103 as being unpatentable over Lee et al. (US 20220102352 A1; hereinafter Lee), in view of Yang et al. (US 20240407174 A1; hereinafter Yang).
Regarding claim 2, Lee teaches all of the features of claim 1.
But, Lee does not expressly disclose a dielectric isolation structure disposed in the sixth dielectric layer, wherein the dielectric isolation structure includes a liner layer enclosing an air gap.
However, in the analogous art, Yang teaches a semiconductor devices ([0002]), wherein (Fig. 1A+; [0005+]) first spacers (71; Fig. 4; [0081]) in third stack structure (130; Fig. 4; [0081, 0067]) comprising of an insulation layer, where first spacers (71; Fig. 4; [0081]) comprises first air gaps (72; Fig. 4; [0081]) each located within each of the first spacers (71; Fig. 4; [0081]).
It would have been obvious to one with ordinary skill in the art, before the effective filing date of the claimed invention, to incorporate Yang’s first spacers with air gaps into Lee/s device, and thereby, modified Lee’s (by Yang) device will have a dielectric isolation structure (Yang 71; Fig. 4; [0081]) disposed in the sixth dielectric layer (Lee 175; Fig. 17C; in view of [0160] in view of 155, where 155 is an insulating layer), wherein the dielectric isolation structure (Yang 71; Fig. 4; [0081]) includes a liner layer enclosing an air gap (Yang 72; Fig. 4; [0081])
The ordinary artisan would have been motivated to modify Costrini in the manner set forth above, at least, because this inclusion provides first spacers comprises first air gaps each located within each of the first spacers which increases the insulative properties of the device and help can minimize the RC delay between adjacent channel structures or adjacent bit lines (Yang [0081, 0126]).
Regarding claim 3, modified Lee (by Yang) teaches all of the features of claim 2.
Modified Lee (by Yang) ffurther teaches wherein the isolation structure (Yang 71; Fig. 4; [0081]) (see below for “is transformed by a reinforcement pillar”) disposed in the sixth dielectric layer (Lee 175; Fig. 17C; in view of [0160] in view of 155, where 155 is an insulating layer).
In reference to the language in claim 3 referring to wherein the isolation structure is transformed by a reinforcement pillar disposed in the sixth dielectric layer, it is important to note that “Even though product-by-process claims are limited by and defined by the process, determination of patentability is based on the product itself. The patentability of a product does not depend on its method of production. If the product in the product-by-process claim is the same as or obvious from a product of the prior art, the claim is unpatentable even though the prior product was made by a different process.” In re Thorpe, 777 F.2d 695, 698, 227 USPQ 964, 966 (Fed. Cir. 1985). Accordingly the limitation "the display module is configured to be torn along the dotted area when a force is applied thereto" is not patentable over prior art as the structure of the prior art cannot be differentiate from the structural limitation as claimed.
Therefore, in reference to the language in claim 3 referring to t wherein the isolation structure is transformed by a reinforcement pillar disposed in the sixth dielectric layer, it is noted that Lee teaches all the structural elements in claim 3 according to the instant invention and that wherein the isolation structure is transformed by a reinforcement pillar disposed in the sixth dielectric layer does not affect the structure of the final device.
Regarding claim 4, modified Lee (by Yang) teaches all of the features of claim 3.
Modified Lee (by Yang) ffurther teaches wherein the reinforcement pillar is made of an energy-removable material (see rejection of claim 3 above, where the reinforcement pillar does not affect the structure of the final device).
Regarding claim 5, modified Lee (by Yang) teaches all of the features of claim 4.
Modified Lee (by Yang) further teaches wherein the energy-removable material includes a thermal decomposable material (see rejection of claims 3-4 above, where the reinforcement pillar does not affect the structure of the final device).
Regarding claim 6, modified Lee (by Yang) teaches all of the features of claim 4.
Lee further teaches wherein the energy-removable material includes a base material and a decomposable porogen material, wherein the base material includes hydrogen silsesquioxane (HSQ), methylsilsesquioxane (MSQ), porous polyarylether (PAE), porous SiLK, or porous silicon oxide (SiO2), and the decomposable porogen material includes a porogen organic compound (see rejection of claims 3-4 above above, where the reinforcement pillar does not affect the structure of the final device).
Regarding claim 7, modified Lee (by Yang) teaches all of the features of claim 3.
Modified Lee (by Yang) ffurther comprising a capping dielectric layer (Goxb; Fig. 17C; in view of [0119, 0087]) formed over the reinforcement pillar (see rejection of claim 3 above, where the reinforcement pillar does not affect the structure of the final device).
Regarding claim 8, modified Lee (by Yang) teaches all of the features of claim 7.
Modified Lee (by Yang) further teaches wherein the capping dielectric layer (Goxb; Fig. 17C; in view of [0119, 0087]) is made of silicon oxide, silicon nitride, silicon oxynitride, or the like (see rejection of claims 3 and 7 above, where the reinforcement pillar does not affect the structure of the final device).
Conclusion
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/OMAR F MOJADDEDI/Examiner, Art Unit 2898
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