Prosecution Insights
Last updated: October 22, 2026
Application No. 18/765,738

IMAGE SENSOR WITH PHOTOSENSITIVITY ENHANCEMENT REGION

Non-Final OA §103
Filed
Jul 08, 2024
Priority
Jun 16, 2021 — divisional of 12/062,671
Examiner
RODELA, EDUARDO A
Art Unit
2893
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Taiwan Semiconductor Manufacturing Company, Ltd.
OA Round
1 (Non-Final)
86%
Grant Probability
Favorable
1-2
OA Rounds
0m
Est. Remaining
92%
With Interview

Examiner Intelligence

Grants 86% — above average
86%
Career Allowance Rate
938 granted / 1087 resolved
+18.3% vs TC avg
Moderate +6% lift
Without
With
+5.8%
Interview Lift
resolved cases with interview
Typical timeline
2y 2m
Avg Prosecution
24 currently pending
Career history
1116
Total Applications
across all art units

Statute-Specific Performance

§101
0.2%
-39.8% vs TC avg
§103
58.4%
+18.4% vs TC avg
§102
18.6%
-21.4% vs TC avg
§112
15.2%
-24.8% vs TC avg
Black line = Tech Center average estimate • Based on career data from 1087 resolved cases

Office Action

§103
DETAILED ACTION This correspondence is in response to the communications received July 8, 2024. Claims 1-20 are pending. Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Relevant Prior Art Lu et al. (US 2022/0359770) Fig. 8B, shown below. 111 is p or n type, ¶ 0066. PNG media_image1.png 320 450 media_image1.png Greyscale Zhang et al. (US 2018/0019268) Figs. 3 and 4A, shown below. PNG media_image2.png 458 542 media_image2.png Greyscale PNG media_image3.png 346 560 media_image3.png Greyscale Frach (US 2010/0127314) Fig. 12A, shown below. PNG media_image4.png 494 622 media_image4.png Greyscale Applicant’s Claim to Figure Comparison It is noted that this comparison is merely for the benefit of reviewers of this office action during prosecution, to allow for an understanding of the examiner’s interpretation of the Applicant’s independent claims as compared to disclosed embodiments in Applicant’s Figures. No response or comments are necessary from Applicant. PNG media_image5.png 626 826 media_image5.png Greyscale PNG media_image6.png 738 820 media_image6.png Greyscale Regarding claim 1, the Applicant discloses in Figs. 1 and 2, an image sensor comprising: a first semiconductor region (110, ¶ 0022) having a first doping type (n-type, ¶ 0022); a second semiconductor region (112, ¶ 0022) directly over the first semiconductor region (112 on 110), the second semiconductor region (112) having a second doping type different than the first doping type (p-type, 0022); a ring-shaped third semiconductor region (“The guard ring semiconductor region 108 has a ring-shaped top layout.”, ¶ 0023) laterally surrounding the first and second semiconductor regions (108 surrounds both of 110 and 112), the ring-shaped third semiconductor region having the first doping type (“the guard ring semiconductor region 108 has the first doping type.”, ¶ 0023); and a ring-shaped fourth semiconductor region (“semiconductor region 106 has the second doping type and has a ring-shaped top layout”, ¶ 0026) over the ring-shaped third semiconductor region and having the second doping type (106 over the 108). Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claims 1-4, 6, 10, 11, 13-16 and 18-20 are rejected under 35 U.S.C. 103 as being unpatentable over Ayel et al. (US 2022/0093807) in view of Sanfilippo et al. (US 9,209,336). PNG media_image7.png 298 584 media_image7.png Greyscale PNG media_image8.png 442 458 media_image8.png Greyscale Regarding claim 1, the prior art of Ayel discloses in Figs. 2, 8 and 9, an image sensor (Ayel does not disclose the term “image” implying an array of sensors, which will be addressed below in the combination rejection, but Ayel does disclose a sensor, see title, “SPAD-TYPE PHOTODIODE”) comprising: a first semiconductor region (portion 103a of 103, “Central region 103a of region 103 has its lower surface in contact with the upper surface of region 105. Thus, the PN junction of photodiode 100 comprises a central portion formed between region 105 and central portion 103a of region 103, and a peripheral portion formed between substrate 101 and the peripheral portion 103b of region 103.”, ¶ 0051. It is noted that the use of the term “region” imparts a flexibility to the claim language which can include a single feature being broken up in an interpretation into several “regions” as is done here in this interpretation.) having a first doping type (“N-type doped region 103”, ¶ 0050); a second semiconductor region (“P-type doped region 105”, ¶ 0050) directly over the first semiconductor region (105 directly over lower boundary of 103), the second semiconductor region (105) having a second doping type different than the first doping type (105 is p-type, which is opposite type to that of 103 which is n-type); a ring-shaped third semiconductor region (103b, “A peripheral ring-shaped region 103b of region 103”, ¶ 0050) laterally surrounding the first and second semiconductor regions (103b laterally surrounds both of 103 and 105), the ring-shaped third semiconductor region (103b) having the first doping type (Region 103b is a n-type region as detailed in, “Central region 103a of region 103 has its lower surface in contact with the upper surface of region 105. Thus, the PN junction of photodiode 100 comprises a central portion formed between region 105 and central portion 103a of region 103, and a peripheral portion formed between substrate 101 and the peripheral portion 103b of region 103.”, ¶ 0051.); and a ring-shaped fourth semiconductor region (“buried P-type region 111… Region 111 forms a buried ring”, ¶ 0053, and portion of 101 between 103b and 111, to be described further below. Both regions hereinafter referred to as ‘R4’) over the ring-shaped third semiconductor region and having the second doping type (As stated above, the peripheral portion 103b is the “ring-shaped third semiconductor region”, which then makes the upper portion of 101 between 111 and 103b, “P-type doped substrate 101”, ¶ 0071, immediately surrounding and beneath 103a, the surrounding “ring-shaped fourth semiconductor region”, that is bounded by 121, a ring shaped feature. Further the interpretation of what constitutes the “ring-shaped fourth semiconductor region” includes both the p-type region of 101 between 111 and 103b, and the p-type region 111, “regions … 111… form a continuous separation well totally surrounding the lateral surfaces … of region 103”, 0062. R4 is formed directly over lower boundary of 103b). Ayel does not disclose that the SPAD sensor is arranged in an array as an “image sensor”. This claim limitation is understood to signify an array of sensors, which together provide the “image” created by said array of sensors. PNG media_image9.png 408 464 media_image9.png Greyscale PNG media_image10.png 314 628 media_image10.png Greyscale PNG media_image11.png 502 662 media_image11.png Greyscale Sanfilippo discloses a similar SPAD type sensor device (see Figs. 12 and 13) which can be implemented in an array of SPAD sensor devices as can be seen in Fig. 16. Therefore, Sanfilippo discloses the limitation of an “image sensor” (see col. 8, lines 47-55, “The array 220 of photodiodes 1 may also be used in the field of the molecular biology, as a light sensor in fluorescence microscopes used for detection of fluorescence or luminescence phenomena of extremely low intensity. … (60) Arrays 220 of photodiodes 1 may also be used to provide sensors for photographic cameras and/or camcorders, in particular for capturing three-dimensional digital images in conditions of poor lighting.”). Therefore, it would have been obvious to one having ordinary skill in the art at the time the invention was effectively filed to use the feature of, “image sensor”, as disclosed by Sanfilippo in the system of Ayel, for the purpose of implementing arrays of high sensitivity photon sensors to be able to create images low light settings. (G) Some teaching, suggestion, or motivation in the prior art that would have led one of ordinary skill to modify the prior art reference or to combine prior art reference teachings to arrive at the claimed invention. Regarding claim 2, the prior art of Ayel et al. disclose the image sensor of claim 1, wherein the ring-shaped fourth semiconductor region is vertically spaced from the ring-shaped third semiconductor region (portion 111 is vertically spaced from 103b as can be seen in Ayel’s Fig. 8, “buried P-type region 111… Region 111 forms a buried ring”, ¶ 0053, 103b, “A peripheral ring-shaped region 103b of region 103”, ¶ 0050). Regarding claim 3, the prior art of Ayel et al. disclose the image sensor of claim 1, and Ayel discloses, wherein a doping concentration of the ring-shaped fourth semiconductor region (portion 111, “buried P-type region 111… Region 111 forms a buried ring”, ¶ 0053) is lower than a doping concentration of the first semiconductor region (111 is lower than 103a, shown in the following excerpts, “the doping level of region 111 is in the range from 1*10.sup.16 atoms/cm.sup.3 to 5*10.sup.17 atoms/cm.sup.3.”, ¶ 0058, “the doping level of region 103 is in the range from 5*10.sup.17 atoms/cm.sup.3 to 5*10.sup.19 atoms/cm.sup.3”, ¶ 0058). Regarding claim 4, the prior art of Ayel et al. disclose the image sensor of claim 1, and Ayel discloses, in Figs. 8 and 9, wherein the ring-shaped third semiconductor region (103b, “A peripheral ring-shaped region 103b of region 103”, ¶ 0050) and the ring-shaped fourth semiconductor region (at least 111 can be explicitly seen, “buried P-type region 111… Region 111 forms a buried ring”, ¶ 0053) are centered on a common axis (both are centered at the common axis of the center of 103/103a). Regarding claim 6, the prior art of Ayel et al. disclose the image sensor of claim 4, and Ayel discloses, in Figs. 8 and 9, wherein a first distance between an outer sidewall of the ring-shaped fourth semiconductor region and the common axis is greater than a second distance between an outer sidewall of the ring-shaped third semiconductor region and the common axis (the distance from the outer sidewall of 111 to the central axis, which is center of 103, is greater than the distance from the outer sidewall of 103b to the center of 103). Regarding claim 7, the prior art of Ayel et al. disclose the image sensor of claim 1, and Ayel discloses, in Figs. 8 and 9, wherein the second semiconductor region is laterally spaced from the ring-shaped third semiconductor region (in Ayel’s Fig. 8, region 103b is a n-type region as detailed in, “Central region 103a of region 103 has its lower surface in contact with the upper surface of region 105. Thus, the PN junction of photodiode 100 comprises a central portion formed between region 105 and central portion 103a of region 103, and a peripheral portion formed between substrate 101 and the peripheral portion 103b of region 103.”, ¶ 0051). Regarding claim 8, the prior art of Ayel et al. disclose the image sensor of claim 1, wherein the ring-shaped fourth semiconductor region meets the ring-shaped third semiconductor region at a diffusion region (in Ayel’s Fig. 8, 111 meets 103b at the local region of 101, where 101 is a semiconductor region that has dopant diffusion therein, “substrate 101 is P-type doped”, ¶ 0050). Regarding claim 10, the prior art of Ayel discloses in Figs. 2, 8 and 9, an image sensor (Ayel does not disclose the term “image” implying an array of sensors, which will be addressed below in the combination rejection, but Ayel does disclose a sensor, see title, “SPAD-TYPE PHOTODIODE”) comprising: a first semiconductor region (portion 103a of 103, “Central region 103a of region 103 has its lower surface in contact with the upper surface of region 105. Thus, the PN junction of photodiode 100 comprises a central portion formed between region 105 and central portion 103a of region 103, and a peripheral portion formed between substrate 101 and the peripheral portion 103b of region 103.”, ¶ 0051. It is noted that the use of the term “region” imparts a flexibility to the claim language which can include a single feature being broken up in an interpretation into several “regions” as is done here in this interpretation.) and a second semiconductor region (“P-type doped region 105”, ¶ 0050) in a semiconductor substrate (both 103a and 105 formed in “a semiconductor substrate 101, for example, made of silicon. In the shown example, substrate 101 is P-type doped.”, ¶ 0050), the first semiconductor region having a first doping type (“N-type doped region 103”, ¶ 0050), the second semiconductor region having a second doping type (“P-type doped region 105”, ¶ 0050) different than the first doping type (p-type being opposite to that of n-type), the first and second semiconductor regions meeting at a p-n junction (“Central region 103a of region 103 has its lower surface in contact with the upper surface of region 105. Thus, the PN junction of photodiode 100 comprises a central portion formed between region 105 and central portion 103a of region 103, and a peripheral portion formed between substrate 101 and the peripheral portion 103b of region 103.”, ¶ 0051); a guard ring semiconductor region (portion 103b of 103, “the peripheral portion 103b of region 103.”, ¶ 0051. 103b is a portion of the interpreted “guard ring”, which as can be seen in Fig. 1, forms a field shaping structure around the central p-n junction, “Region 111 extends, in particular, under the peripheral region 103b of region 103. Region 111 forms a buried ring connecting region 110 to region 105 all along the periphery of the PN junction. Thus, regions 110, 111, and 105 form a continuous separation well entirely surrounding the lateral surfaces and the lower surface of region 103, and interposing between region 103 and the lower portion of substrate 101.”, ¶ 0053. Further ¶ 0056 discusses how the peripheral / ring portions prevent avalanche from occurring peripherally, so that the intended sensing area which is the central area can be the location where avalanche can be started, as desired in the design) in the semiconductor substrate and laterally surrounding the first semiconductor region and the second semiconductor region (“Central region 103a of region 103 has its lower surface in contact with the upper surface of region 105. Thus, the PN junction of photodiode 100 comprises a central portion formed between region 105 and central portion 103a of region 103, and a peripheral portion formed between substrate 101 and the peripheral portion 103b of region 103.”, ¶ 0051. As can be seen in cross sectional figures 103b laterally surrounds 103a/105), the guard ring semiconductor region (103b) having the first doping type (“N-type doped region 103”, ¶ 0050); and a photosensitivity enhancement semiconductor region (“buried P-type region 111… Region 111 forms a buried ring”, ¶ 0053, and portion of 101 between 103b and 111, to be described further below. Both regions hereinafter referred to as ‘R4’. The “photosensitivity enhancement” is satisfied by the improved collection of charges as detailed in, ¶ 0057, “More particularly, due to the continuity of the separation well formed by regions 110 and 111, the structure of FIG. 1 benefits from a “lens” effect, which makes it particularly adapted to the collection of charges photogenerated in depth in substrate 101.”, “The photodiode 120 of FIG. 2 comprises a buried P-type region 111 substantially identical to that of photodiode 100 of FIG. 1,”, ¶ 0062, then, “Due to the continuity of the separation between region 103 and the lower portion of substrate 101, the structure of FIG. 2 provides, identically or similarly to what has been described in relation with FIG. 1, a significant improvement in the efficiency of the collection of the charges photogenerated in depth in the substrate.”, ¶ 0063) in the semiconductor substrate and directly over the guard ring semiconductor region (As stated above, the peripheral portion 103b is the “ring-shaped third semiconductor region”, which then makes the upper portion of 101 between 111 and 103b, “P-type doped substrate 101”, ¶ 0071, immediately surrounding and beneath 103a, the surrounding “ring-shaped fourth semiconductor region”, that is bounded by 121, a ring shaped feature. Further the interpretation of what constitutes the “ring-shaped fourth semiconductor region” includes both the p-type region of 101 between 111 and 103b, and the p-type region 111, “regions … 111… form a continuous separation well totally surrounding the lateral surfaces … of region 103”, 0062. R4 is formed directly over lower boundary of 103b), the photosensitivity enhancement semiconductor region having the second doping type (“buried P-type region 111”, ¶ 0053). Ayel does not disclose that the SPAD sensor is arranged in an array as an “image sensor”. This claim limitation is understood to signify an array of sensors, which together provide the “image” created by said array of sensors. PNG media_image9.png 408 464 media_image9.png Greyscale PNG media_image10.png 314 628 media_image10.png Greyscale PNG media_image11.png 502 662 media_image11.png Greyscale Sanfilippo discloses a similar SPAD type sensor device (see Figs. 12 and 13) which can be implemented in an array of SPAD sensor devices as can be seen in Fig. 16. Therefore, Sanfilippo discloses the limitation of an “image sensor” (see col. 8, lines 47-55, “The array 220 of photodiodes 1 may also be used in the field of the molecular biology, as a light sensor in fluorescence microscopes used for detection of fluorescence or luminescence phenomena of extremely low intensity. … (60) Arrays 220 of photodiodes 1 may also be used to provide sensors for photographic cameras and/or camcorders, in particular for capturing three-dimensional digital images in conditions of poor lighting.”). Therefore, it would have been obvious to one having ordinary skill in the art at the time the invention was effectively filed to use the feature of, “image sensor”, as disclosed by Sanfilippo in the system of Ayel, for the purpose of implementing arrays of high sensitivity photon sensors to be able to create images low light settings. (G) Some teaching, suggestion, or motivation in the prior art that would have led one of ordinary skill to modify the prior art reference or to combine prior art reference teachings to arrive at the claimed invention. Regarding claim 11, the prior art of Ayel et al. disclose the image sensor of claim 10, and Ayel discloses in Figs. 2, 8 and 9, further comprising: a contact semiconductor region (“a peripheral trench 121 filled with P-type doped polysilicon”, ¶ 0061) in the semiconductor substrate (in 101), laterally surrounding the guard ring semiconductor region (where 111 is in the surrounded area in 101), and laterally spaced from the guard ring semiconductor region (121 spaced from 103b by 122 and portion of 101), the contact semiconductor region (121) having the second doping type (p-type). Regarding claim 13, the prior art of Ayel discloses in Figs. 1, 2, 8 and 9, an image sensor (Ayel does not disclose the term “image” implying an array of sensors, which will be addressed below in the combination rejection, but Ayel does disclose a sensor, see title, “SPAD-TYPE PHOTODIODE”) comprising: a semiconductor well (“a semiconductor substrate 101, for example, made of silicon. In the shown example, substrate 101 is P-type doped.”, ¶ 0050) in a semiconductor substrate (the physical semiconductor material layer that subsequently has been p-doped to be 101 and 109, see Fig. 1, “photodiode 100 further comprises, in a lower portion of substrate 101, a P-type doped region 109, having a lower doping level than that of substrate 101, extending in substrate 101 from its lower surface.”, ¶ 0051) along a first side of the semiconductor substrate (the majority of the substrate has been doped P- type to be well 101) and having a first doping type (p-type); and a first single-photon avalanche diode (SPAD) (“SPAD photodiode 100”, ¶ 0050, “SPAD photodiode 120”, ¶ 0060, “SPAD photodiode 200”, ¶ 0072) in the semiconductor well (in 101) along the first side of the semiconductor substrate (along upper majority of 101), the first SPAD (100/120/200) comprising: a first semiconductor region (portion 103a of 103, “Central region 103a of region 103 has its lower surface in contact with the upper surface of region 105. Thus, the PN junction of photodiode 100 comprises a central portion formed between region 105 and central portion 103a of region 103, and a peripheral portion formed between substrate 101 and the peripheral portion 103b of region 103.”, ¶ 0051. It is noted that the use of the term “region” imparts a flexibility to the claim language which can include a single feature being broken up in an interpretation into several “regions” as is done here in this interpretation.) extending along the first side of the semiconductor substrate (103 in top surface of 101) and having a second doping type (n-type) different than the first doping type (n-type opposite to p-type); a second semiconductor region (“P-type doped region 105”, ¶ 0050) directly over the first semiconductor region (105 directly over the lower boundary of 103a) and having the first doping type (p-type), the first semiconductor region (103a) and the second semiconductor region (105) meeting at a p-n junction (“Central region 103a of region 103 has its lower surface in contact with the upper surface of region 105. Thus, the PN junction of photodiode 100 comprises a central portion formed between region 105 and central portion 103a of region 103, and a peripheral portion formed between substrate 101 and the peripheral portion 103b of region 103.”, ¶ 0051); a guard ring semiconductor region (portion 103b of 103, “the peripheral portion 103b of region 103.”, ¶ 0051. 103b is a portion of the interpreted “guard ring”, which as can be seen in Fig. 1, forms a field shaping structure around the central p-n junction, “Region 111 extends, in particular, under the peripheral region 103b of region 103. Region 111 forms a buried ring connecting region 110 to region 105 all along the periphery of the PN junction. Thus, regions 110, 111, and 105 form a continuous separation well entirely surrounding the lateral surfaces and the lower surface of region 103, and interposing between region 103 and the lower portion of substrate 101.”, ¶ 0053. Further ¶ 0056 discusses how the peripheral / ring portions prevent avalanche from occurring peripherally, so that the intended sensing area which is the central area can be the location where avalanche can be started, as desired in the design) extending along the first side of the semiconductor substrate (at top of 101) and having the second doping type (n-type), the guard ring semiconductor region laterally surrounding the first and second semiconductor regions (“Central region 103a of region 103 has its lower surface in contact with the upper surface of region 105. Thus, the PN junction of photodiode 100 comprises a central portion formed between region 105 and central portion 103a of region 103, and a peripheral portion formed between substrate 101 and the peripheral portion 103b of region 103.”, ¶ 0051. As can be seen in cross sectional figures 103b laterally surrounds 103a/105); and a photosensitivity enhancement semiconductor region (“buried P-type region 111… Region 111 forms a buried ring”, ¶ 0053, and portion of 101 between 103b and 111, to be described further below. Both regions hereinafter referred to as ‘R4’. The “photosensitivity enhancement” is satisfied by the improved collection of charges as detailed in, ¶ 0057, “More particularly, due to the continuity of the separation well formed by regions 110 and 111, the structure of FIG. 1 benefits from a “lens” effect, which makes it particularly adapted to the collection of charges photogenerated in depth in substrate 101.”, “The photodiode 120 of FIG. 2 comprises a buried P-type region 111 substantially identical to that of photodiode 100 of FIG. 1,”, ¶ 0062, then, “Due to the continuity of the separation between region 103 and the lower portion of substrate 101, the structure of FIG. 2 provides, identically or similarly to what has been described in relation with FIG. 1, a significant improvement in the efficiency of the collection of the charges photogenerated in depth in the substrate.”, ¶ 0063) directly over the guard ring semiconductor region (directly over the lower boundary of 103a, where a vertical line can be drawn through both 103a and 111) and having the first doping type (p-type), the photosensitivity enhancement semiconductor region configured to enlarge an area of the SPAD that is sensitive to photons (¶ 0057, “More particularly, due to the continuity of the separation well formed by regions 110 and 111, the structure of FIG. 1 benefits from a “lens” effect, which makes it particularly adapted to the collection of charges photogenerated in depth in substrate 101.”). Ayel does not disclose that the SPAD sensor is arranged in an array as an “image sensor”. This claim limitation is understood to signify an array of sensors, which together provide the “image” created by said array of sensors. PNG media_image9.png 408 464 media_image9.png Greyscale PNG media_image10.png 314 628 media_image10.png Greyscale PNG media_image11.png 502 662 media_image11.png Greyscale Sanfilippo discloses a similar SPAD type sensor device (see Figs. 12 and 13) which can be implemented in an array of SPAD sensor devices as can be seen in Fig. 16. Therefore, Sanfilippo discloses the limitation of an “image sensor” (see col. 8, lines 47-55, “The array 220 of photodiodes 1 may also be used in the field of the molecular biology, as a light sensor in fluorescence microscopes used for detection of fluorescence or luminescence phenomena of extremely low intensity. … (60) Arrays 220 of photodiodes 1 may also be used to provide sensors for photographic cameras and/or camcorders, in particular for capturing three-dimensional digital images in conditions of poor lighting.”). Therefore, it would have been obvious to one having ordinary skill in the art at the time the invention was effectively filed to use the feature of, “image sensor”, as disclosed by Sanfilippo in the system of Ayel, for the purpose of implementing arrays of high sensitivity photon sensors to be able to create images low light settings. (G) Some teaching, suggestion, or motivation in the prior art that would have led one of ordinary skill to modify the prior art reference or to combine prior art reference teachings to arrive at the claimed invention. Regarding claim 14, the prior art of Ayel et al. disclose the image sensor of claim 13, wherein the second semiconductor region is laterally spaced from the guard ring semiconductor region by a non-zero distance (in Ayel’s Fig. 8, region 103b is a n-type region as detailed in, “Central region 103a of region 103 has its lower surface in contact with the upper surface of region 105. Thus, the PN junction of photodiode 100 comprises a central portion formed between region 105 and central portion 103a of region 103, and a peripheral portion formed between substrate 101 and the peripheral portion 103b of region 103.”, ¶ 0051). Regarding claim 16, the prior art of Ayel et al. disclose the image sensor of claim 13, and Ayel shows in Figs. 8 and 9, wherein the photosensitivity enhancement semiconductor region (“buried P-type region 111… Region 111 forms a buried ring”, ¶ 0053) has a ring-shaped top layout (e.g. noted “ring”) and is vertically spaced from the guard ring semiconductor region (“the peripheral portion 103b of region 103.”, ¶ 0051) by a non-zero distance (the distance spaced by portion of 101 between 103b and 111), and wherein the photosensitivity enhancement semiconductor region (111) and the guard ring semiconductor region (103b) are concentric (111 and 103b are ring shaped about center of 103a/103). Regarding claim 18, the prior art of Ayel et al. disclose the image sensor of claim 16, and Ayel shows in Figs. 8 and 9, wherein a width of the photosensitivity enhancement semiconductor region (“buried P-type region 111… Region 111 forms a buried ring”, ¶ 0053) is greater than a width of the guard ring semiconductor region (“the peripheral portion 103b of region 103.”, ¶ 0051, where width/outer circumference of 111 is greater than width of 103b). Regarding claim 19, the prior art of Ayel et al. disclose the image sensor of claim 13, and Ayel shows in Figs. 8 and 9, in combination with Sanfilippo’s Fig. 16, further comprising: a second SPAD adjacent to the first SPAD (SPAD as shown by Ayel, and Sanfilippo teaches the array of plural SPADs being next to each other) and laterally separated from the first SPAD by a trench isolation structure that extends along a boundary between the first SPAD (Ayel shows the “peripheral trench 121”, ¶ 0061) and the second SPAD (Ayel’s SPAD design filled into plurality of array of Fig. 16 of Sanfilippo would have each device separated by Ayel’s peripheral trenches 121), the second SPAD comprising another photosensitivity enhancement semiconductor region (the plural SPADs in Sanfilippo’s Fig. 16 would have a sensor per each of the plural sensors shown). Regarding claim 20, the prior art of Ayel et al. disclose the image sensor of claim 13, and Ayel shows in Figs. 8 and 9, image sensor of claim 13, the first SPAD further comprising: a contact semiconductor region (“a peripheral trench 121 filled with P-type doped polysilicon”, ¶ 0061) extending along the first side of the semiconductor substrate (from top of 101) and having the first doping type (p-type), wherein the contact semiconductor region (121) laterally surrounds the guard ring semiconductor region (121 surrounds 103b) and is laterally spaced from the guard ring semiconductor region (121 spaced from 103b by 122 and portion of 101). Allowable Subject Matter Claims 5, 9, 12, 15 and 17 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. For claim 5, the prior art of Ayel et al. (US 2022/0093807) discloses a device (see Fig. 2 or 8) which shows, (1) that the outer sidewall of “ring shaped third semiconductor region” (103b) is clearly closer to the common axis (center of 103), than the outer sidewall of the “ring shaped fourth semiconductor region” (111), and so this arrangement does not satisfy the claim limitation of the outer sidewalls being “approximately equal distance” to the common axis, and (2) the “ring shaped third semiconductor region” is a portion of the “first semiconductor region”, which establishes the “common axis”, and therefore the “ring shaped third semiconductor region” does not have an, “inner sidewall” for comparison in the claim, and therefore cannot teach the second limitation. Ayel then does not teach both limitations of claim 5. “5. The image sensor of claim 4, wherein a first distance between an outer sidewall of the ring-shaped fourth semiconductor region and the common axis is approximately equal to a second distance between an outer sidewall of the ring-shaped third semiconductor region and the common axis, and wherein a third distance between an inner sidewall of the ring-shaped fourth semiconductor region and the common axis is approximately equal to a fourth distance between an inner sidewall of the ring-shaped third semiconductor region and the common axis.” For claim 9, the prior art of Ayel et al. (US 2022/0093807) discloses a device (see Fig. 2 or 8) which does not show a further “ring shaped fifth semiconductor region” and thus does not disclose the features set forth in the claim. “9. The image sensor of claim 1, further comprising: a ring-shaped fifth semiconductor region laterally surrounding the ring-shaped third semiconductor region and laterally spaced from the ring-shaped third semiconductor region, the ring-shaped fifth semiconductor region having the second doping type.” For claim 12, the prior art of Ayel et al. (US 2022/0093807) discloses a device (see Fig. 2 or 8) which does show a further “isolation semiconductor region” (“region 122”, ¶ 0061) but does not show that 122 is spaced from 111, so Ayel thus does not disclose the features set forth in the claim. “12. The image sensor of claim 11, further comprising: an isolation semiconductor region in the semiconductor substrate, directly over the contact semiconductor region, laterally surrounding the photosensitivity enhancement semiconductor region, and laterally spaced from the photosensitivity enhancement semiconductor region, the isolation semiconductor region having the second doping type.” For claim 15, the prior art of Ayel et al. (US 2022/0093807) discloses a device (see Fig. 2 or 8) which shows the “guard ring semiconductor region” is a portion of the “first semiconductor region”, and so then the “guard ring semiconductor region” does not have an, “inner sidewall” for any of the first or second semiconductor regions. Ayel then does not teach both limitations of claim 15. “15. The image sensor of claim 13, wherein the guard ring semiconductor region abuts the first semiconductor region and the second semiconductor region along sidewalls of the first and second semiconductor regions.” For claim 17, the prior art of Ayel et al. (US 2022/0093807) discloses a device (see Fig. 2 or 8) which shows the “guard ring semiconductor region” (103b) has a width (outer circumference) which is clearly less than that of the “photosensitivity enhancement semiconductor region” (111). “17. The image sensor of claim 16, wherein a width of the photosensitivity enhancement semiconductor region is approximately equal to a width of the guard ring semiconductor region.” Contact Information Any inquiry concerning this communication or earlier communications from the examiner should be directed to Eduardo A Rodela whose telephone number is (571)272-8797. The examiner can normally be reached M-F, 8:30-5:00pm ET. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Yara B Green can be reached on (571) 270-3035. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /EDUARDO A RODELA/Primary Examiner, Art Unit 2893
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Prosecution Timeline

Jul 08, 2024
Application Filed
Sep 29, 2026
Non-Final Rejection mailed — §103 (current)

Precedent Cases

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

1-2
Expected OA Rounds
86%
Grant Probability
92%
With Interview (+5.8%)
2y 2m (~0m remaining)
Median Time to Grant
Low
PTA Risk
Based on 1087 resolved cases by this examiner. Grant probability derived from career allowance rate.

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