DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Information Disclosure Statement
The information disclosure statement (IDS) submitted on 7/8/2024 is in compliance with the provisions of 37 CFR 1.97. Accordingly, the information disclosure statement is being considered by the examiner.
Claims Status
Claims 1-20 are currently pending and being examined.
Claim Objections
Claims 16-17 are objected to because of the following informalities: the grammatical errors “wherein the plurality of discrete features are” in line 2; and line 1 of claims 16; and 17, respectively.
For examination purposes, “wherein the plurality of discrete features are” in line 2; and line 1 of claims 16; and 17, respectively, will be interpreted to read as “wherein the plurality of discrete features is”. Appropriate correction is required by amending claims 16; and 17 as suggested, or similarly.
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claims 1-2, 8, 10; 11; and 18-20 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Lee et al (US 2003/0111735 A1-IDS prior art, hereafter Lee).
Re claim 1, Lee discloses in FIG. 11 a structure comprising:
a first conductive feature (130; [0036]);
an etch stop layer (150; [0034]) over (above/on) the first conductive feature (130);
a dielectric layer (layer laminate 160/210/220; [0034]) over (above/on) the etch stop layer (150); and
a second conductive feature (180; [0037]) in the dielectric layer (layer laminate 160/210/220) and the etch stop layer (150), wherein the second conductive feature (180) comprises:
a conductive barrier layer (metal barrier; [0037]) comprising:
a first portion (part of 180 in 171/221; [0035] and [0037]) on sidewalls (inner planes) of the dielectric layer (layer laminate 160/210/220), wherein the first portion (part of 180 in 171/221) forms a continuous (uninterrupted) layer, wherein a bottommost end (lower tip) of the first portion (part of 180 in 171/221) of the conductive barrier layer (180) is spaced apart from (not in contact with) the first conductive feature (130); and
a conductive region (lower portion of 191 below 150; [0038]) encircled by (surrounding) the first portion (part of 180 in 171/221) of the conductive barrier layer (180).
Re claim 2, Lee discloses the structure of claim 1, wherein the bottommost end (lower tip) of the first portion (part of 180 in 171/221) of the conductive barrier layer (180) is spaced apart from (separated by) the first conductive feature (180) by a portion of the conductive region (lower portion of 191 below 150).
Re claims 8 and 10, Lee discloses the structure of claim 1, wherein the conductive barrier (180) layer is substantially free from silicon therein (e.g. titanium nitride; [0016]); and wherein the conductive barrier layer (180) comprises titanium nitride ([0016]).
Re claim 11, Lee discloses in FIG. 11 a structure comprising:
a conductive feature (130; [0036]), wherein the conductive feature (130) comprises a top surface (part of 130 at 205);
an etch stop layer (layer laminate 150/205; [0035]) over the conductive feature (130), wherein the etch stop layer (205 of layer laminate 150/205) physically contacts (directly touches) a part (left/right sides) of the top surface (part of 130 at 205) of the conductive feature (130);
a dielectric layer (layer laminate 160/210/220; [0034]) over (above/on) and contacting (physically touching) the etch stop layer (150 of layer laminate 150/205); and
a conductive barrier layer (metal barrier 180; [0037]) in the dielectric layer (layer laminate 160/210/220), wherein the conductive barrier layer (180) comprises a bottommost end (lower tip) higher than (above), and spaced apart (separated) from, the top surface (part of 130 at 205) of the conductive feature (130).
Re claim 12, Lee discloses the structure of claim 11, wherein the bottommost end (lower tip) of the conductive barrier layer (180) contacts an edge (left/right inner walls of 150) of the etch stop layer (layer laminate 150/205).
Re claim 13, Lee discloses the structure of claim 11 further comprising: a conductive region (lower portion of 191 below 180 down to curve of 133; [0038]) encircled by (surrounding) the conductive barrier layer (180), wherein the conductive region (lower portion of 191 below down to curve of 133) comprises a portion (lower portion of 191 above curve of 133 at 205 up to 150) between (elevational) the bottommost end (lower tip) of the conductive barrier layer (180) and the top surface (part of 130 at 205) of the conductive feature (130).
Re claim 14, Lee discloses the structure of claim 11, wherein the conductive barrier layer (180) comprises a topmost end (left/right upper tips) coplanar (level) with an additional top surface (upper plane of 220) of the dielectric layer (layer laminate 160/210/220), and wherein portions (on the inner walls of layer laminate 160/210/220) of the conductive barrier layer (180) connecting the bottommost end (lower tip) to the topmost end (left/right upper tips) form a continuous (uninterrupted) layer.
Re claim 15, Lee discloses the structure of claim 11 further comprising a discrete feature (181; [0037]) over the conductive feature (130), wherein the discrete feature (181) is formed of a same material (e.g. titanium nitride; [0016] and [0031]) as the conductive barrier layer (180), and the discrete feature is thinner (at extreme left/right ends of 181) than (portions of 180 on 220) the conductive barrier layer (180).
Re claim 18, Lee discloses in FIG. 11 a structure comprising:
a metal line (130; [0036]);
a dielectric layer (layer laminate 160/210/220; [0034]) over (above/on) the metal line (130);
a conductive barrier layer (metal barrier 180; [0037]) in the dielectric layer (layer laminate 160/210/220), wherein the conductive barrier layer (180) comprises a portion (part of 180 in 171/221; [0035] and [0037]) on sidewalls (inner planes) of the dielectric layer (layer laminate 160/210/220), and wherein the conductive barrier layer (180) comprises a first material (e.g. titanium or titanium nitride; [0016]); and
a metal via (191; [0038]) over (above/on) and contacting (physically touching) the metal line (130), wherein the metal via (191) comprises a portion (part of 191 in 171/221) of the conductive barrier layer (180), and the portion (part of 191 in 171/221) of the conductive barrier layer (180) is separated from the metal line (130) by a second material (copper of 191 below 150; [0038]) that is different from (not the same as) the first material (e.g. titanium or titanium nitride).
Re claim 19, Lee discloses the structure of claim 18, wherein the first material (of 180) comprises titanium ([0016]), and the second material (of 191) comprises copper ([0038]).
Re claim 20, Lee discloses the structure of claim 18, wherein the metal via (191) comprises a copper-containing region (portion of 191 below 160), with the conductive barrier layer (180) being on sidewalls (left/right outer planes) of the copper-containing region (portion of 191 below 160), and wherein the copper-containing region (portion of 191 below 160) comprises a part (portion of 191 below 150) between the conductive barrier layer (180) and the metal line (130).
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention.
Claims 3, 5-7; and 16-17 are rejected under 35 U.S.C. 103 as being unpatentable over Lee in view of de Felipe et al (US 6,541,374 B1-IDS prior art, hereafter de Felipe).
Re claims 3 and 5-7, Lee discloses the structure of claim 1, wherein the conductive barrier layer (180) further comprises a second portion (181; [0037]) on a top surface (dotted curve of 133) of the first conductive feature (130), wherein the second portion (181) of the conductive barrier layer (180) is a discrete island (single body); wherein the discrete island (single body) is at, and is in contact with, an interface (dotted curve of 133) between the first conductive feature (130) and the conductive region (lower portion of 191 below 150); wherein the first conductive feature (130) and the conductive region (lower portion of 191 below 150) form a distinguishable interface (dotted curve of 133) in between, and wherein the second portion (181) of the conductive barrier layer (180) joined to the distinguishable interface (dotted curve of 133); and wherein the second portion (181) is physically separated (isolated; [0037]) from the first portion (part of 180 in 171/221).
Lee fails to disclose wherein the conductive barrier layer (180) further comprises second portions on the top surface (dotted curve of 133) of the first conductive feature (130), wherein the second portions of the conductive barrier layer (180) are discrete islands separated from each other; wherein the discrete islands are at, and are in contact with, the interface (dotted curve of 133) between the first conductive feature (130) and the conductive region (lower portion of 191 below 150); and wherein the second portions of the conductive barrier layer (180) are joined to the distinguishable interface (dotted curve of 133); and wherein the second portions are physically separated from the first portion (part of 180 in 171/221).
However,
de Felipe discloses in FIG. 2D a structure comprising: a conductive barrier (223; col. 7, lines 3-24) extending into a dielectric layer (217; col. 7, lines 3-24), the conductive barrier (223) comprising second portions (223B; col. 7, lines 3-24), wherein the second portions (223B) are discrete islands (col. 7, lines 3-24) separated from each other by a conductive region (copper inlay not shown; col. 6, lines 19-30 and col. 7, lines 3-24); and wherein the discrete islands (223B) are at, and are in contact with, an interface (225; col. 7, lines 3-24) between a first conductive feature (221; col. 7, lines 3-24) and the conductive region (copper inlay not shown).
Thus, it would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to modify the structure of Lee, by using the second portions of de Felipe with the second portion of Lee, such that the conductive barrier layer (180) further comprises second portions on the top surface (dotted curve of 133) of the first conductive feature (130), wherein the second portions of the conductive barrier layer (180) are discrete islands separated from each other; wherein the discrete islands are at, and are in contact with, the interface (dotted curve of 133) between the first conductive feature (130) and the conductive region (lower portion of 191 below 150); and wherein the second portions of the conductive barrier layer (180) are joined to the distinguishable interface (dotted curve of 133); and wherein the second portions are physically separated from the first portion (part of 180 in 171/221), in order to form copper diffusion barriers with discrete low resistance layers over copper conductive features that allow copper-to-copper contact formation (de Felipe; col. 7, lines 25-37 and col. 7, line 65-col. 8, line 22).
Re claims 16-17, Lee and de Felipe disclose the structure of claim 15 further comprising a plurality of discrete features over the conductive feature, wherein the plurality of discrete features is formed of the same material as the conductive barrier layer, and the plurality of discrete features are spaced apart from each other (see claims 3 and 5-7); and wherein the plurality of discrete features is separated from each other by copper (see claims 3 and 5-7).
Claim 9 is rejected under 35 U.S.C. 103 as being unpatentable over Lee in view of Leobandung (US 2017/0194256 A1).
Re claim 9, Lee discloses the structure of claim 1.
But, fails to disclose wherein the first conductive feature (130) and the conductive region (lower portion of 191 below 150) are continuously joined with each other, without forming a distinguishable interface in between.
However,
Leobandung discloses in FIG. 2 a structure comprising: wherein the first conductive feature (206 of 210; [0023]) and the conductive region (206 of 212; [0023]) are continuously joined with each other (single body), without forming a distinguishable interface in between (no separation; [0023]).
Thus, it would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to modify the structure of Lee, by using the first conductive feature and the conductive region configuration of Leobandung for the same of Lee, such that the first conductive feature (130) and the conductive region (lower portion of 191 below 150) are continuously joined with each other, without forming a distinguishable interface in between, thereby lower the contact resistance between them.
Claim 4 is rejected under 35 U.S.C. 103 as being unpatentable over Lee and de Felipe as applied to claim 3 above, and further in view of Chiang et al (US 2002/0029958 A1, hereafter Chiang).
Re claim 4, Lee and de Felipe disclose the structure of claim 3.
But, fail to disclose wherein the first portion of the conductive barrier layer (of Lee) has a thickness, and the second portions (of de Felipe) have a maximum thickness, and wherein the maximum thickness is smaller than the thickness of the first portion.
However,
Chiang discloses in FIG. 4 a structure comprising: wherein the first portion of the conductive barrier layer (upper portion of 412 at 426; [0059]) has a thickness (400 Å; [0059]), and the second portions (discrete portion of 412 at 416; [0059]) have a maximum thickness (300 Å; [0059]), and wherein the maximum thickness (300 Å) is smaller than the thickness (400 Å) of the first portion (upper portion of 412 at 426).
Thus, it would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to modify the structure of Lee, by using the first portion thickness and the maximum thickness of Chiang, for the first portion of the conductive barrier layer and the second portions, respectively, wherein the first portion of the conductive barrier layer (of Lee) has a thickness, and the second portions (of de Felipe) have a maximum thickness, and wherein the maximum thickness is smaller than the thickness of the first portion, to tailor the diffusion properties of the barrier, and the resistance properties between the first conductive feature and the conductive region.
Claim 15 is rejected under 35 U.S.C. 103 as being unpatentable over Lee in view of Chiang et al (US 2002/0029958 A1, hereafter Chiang).
Re claim 15, Lee discloses the structure of claim 11 further comprising a discrete feature (181; [0037]) over the conductive feature (130), wherein the discrete feature (181) is formed of a same material (e.g. titanium nitride; [0016] and [0031]) as the conductive barrier layer (180).
But, fails to explicitly disclose and the discrete feature is thinner (at extreme left/right ends of 181) than (portions of 180 on 220) the conductive barrier layer (180).
However, Chiang would render these limitations obvious using the first portion thickness and the maximum thickness disclosures for the same of Lee (see claim 4), such that the discrete feature is thinner (at extreme left/right ends of 181) than (portions of 180 on 220) the conductive barrier layer (180), to tailor the diffusion properties of the barrier, and the resistance properties between the first conductive feature and the conductive region.
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure:
US-20020109234-A1 and US-6417094-B1 disclose conductive barriers on dielectric layers, with discrete second portions on conductive features, without disclosing a plurality of discrete second portions consistent with forming interconnect structures to properly connect densely packed devices together.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to ERIC W JONES whose telephone number is (408) 918-9765. The examiner can normally be reached M-F 7:00 AM - 6:00 PM PT.
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, N. Drew Richards can be reached at (571) 272-1736. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/ERIC W JONES/Primary Examiner, Art Unit 2892
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