DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Information Disclosure Statement
This office acknowledges receipt of the following items from the applicant: Information Disclosure Statement (IDS) filed on 8 July 2024. The references cited on the PTOL 1449 form have been considered.
Claim Objections
Claim 15 is objected to because of the following informalities:
Claim 15 recites “of of” and should read -- [[of]] of --.
Appropriate correction is required.
Claim Rejections - 35 USC § 112(a)
The following is a quotation of the first paragraph of 35 U.S.C. 112(a):
(a) IN GENERAL.—The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor or joint inventor of carrying out the invention.
The following is a quotation of the first paragraph of pre-AIA 35 U.S.C. 112:
The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor of carrying out his invention.
Claims 18-20 are rejected under 35 U.S.C. 112(a) or 35 U.S.C. 112 (pre-AIA ), first paragraph, as failing to comply with the written description requirement. The claim(s) contains subject matter which was not described in the specification in such a way as to reasonably convey to one skilled in the relevant art that the inventor or a joint inventor, or for applications subject to pre-AIA 35 U.S.C. 112, the inventor(s), at the time the application was filed, had possession of the claimed invention.
Claim 18 recites “at a time the first alignment mark is formed, forming shallow trench isolation regions” which is not sufficiently supported by the originally filed written description. The applicant’s written description does not describe any particular formation order for when one or more trench is formed with respect to another. The applicant’s disclosure (par. 16) only generally states that the isolation regions (32) are formed to extend into the semiconductor substrate (24), but does not state that they are all formed at the same time, or if one trench is formed before another trench, or any other particular order. Claims 19 and 20 include the limitations and do no cure the deficiencies of claim 18.
Claim Rejections - 35 USC § 112(b)
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claims 17-20 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
Claim 17 recites “the method of claim 10 further comprising forming backside high-absorption regions in the semiconductor substrate” which makes unclear if this is referring to the same backside high-absorption regions already formed in claim 10 or these are separate and distinct backside high-absorption regions; Or if claim 17 was intended to depend from claim 12.
Claim 18 recites the term “vertically misaligned” which is a relative term that renders the claim indefinite. The term “vertically misaligned” is not defined by the claim, the specification does not provide a standard for ascertaining the requisite degree, and one of ordinary skill in the art would not be reasonably apprised of the scope of the invention.
The applicant’s disclosure does not utilize the term “vertically misaligned” nor describes any scope or degree of the term.
The applicant’s disclosure does state:
Alignment mark 56 may be vertically aligned to alignment mark 32C, or may horizontally offset from alignment mark 32C. (par. 29)
In accordance with some embodiments of the present disclosure, DTI regions 62 form a grid, with the grid lines of DTI regions 62 vertically aligned to the grid lines of STI grid 32A. (par. 32)
Trenches 66 may be vertically aligned to alignment mark 32C, or may horizontally offset from alignment mark 32C. (par. 34)
Trenches 80 may be vertically aligned to alignment mark 32C, or may horizontally offset from alignment mark 32C. (par. 40)
Even in context of the applicant’s disclosure regarding “vertically aligned” it’s unclear as to any intended meaning. As can be seen in Fig. 3 for example, alignment mark (56) is not vertically aligned to alignment mark (32C). As can be seen in Fig. 5 for example, DTI regions (62) are not vertically aligned to STI grid (32A). As can be seen in Fig. 7 for example, trenches (66) are not vertically aligned to alignment mark (32C). As can be seen in Fig. 10 for example, trenches (80) are not vertically aligned to alignment mark (32C). The relative vertical disposition of the comparative structures is not the same, and if these descriptions are meant to define “vertically aligned” it is further unclear as to what is required for structures to be “vertically misaligned.” Claims 19 and 20 include the limitations and do no cure the deficiencies of claim 18.
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
Claims 1, 2, 7-9, 12, 15, 18 and 19 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Kao (U.S. Patent Application Publication 2013/0069190).
Referring to Claim 1, Kao teaches a method comprising: forming image sensors (102a) in a semiconductor substrate (101), wherein a first alignment mark (113) is in the semiconductor substrate (101) (Fig. 1A); forming a second alignment mark (112, recess in 109 of Fig. 1E and 1F) from a backside (101b) of the semiconductor substrate (101), wherein the forming the second alignment mark (112, recess in 109 of Fig. 1E and 1F) comprises: etching the semiconductor substrate (101) to form first trenches (105), wherein the first trenches (105) are formed using the first alignment mark (113) for aligning (Fig. 1C); filling the first trenches (105) with a first dielectric layer (109) (Fig. 1E); and planarize the first dielectric layer (109) to form a planar surface for the first dielectric layer (109 -> 110), wherein a portion of the first dielectric layer (109) forms the second alignment mark (112, recess in 109 of Fig. 1E and 1F); and forming a feature (116, 117) on the backside (101b) of the semiconductor substrate (101), wherein the feature (116, 117) is formed using the second alignment mark (112, recess in 109 of Fig. 1E and 1F) for alignment.
"The identical invention must be shown in as complete detail as is contained in the ... claim." Richardson v. Suzuki Motor Co., 868 F.2d 1226, 1236, 9 USPQ2d 1913, 1920 (Fed. Cir. 1989). The elements must be arranged as required by the claim, but this is not an ipsissimis verbis test, i.e., identity of terminology is not required. In re Bond, 910 F.2d 831, 15 USPQ2d 1566 (Fed. Cir. 1990). An “alignment mark” does not have a specific inherent structure but merely identified as such with a label based on an intended use of another structure(s) (i.e. a trench, a trench filled with a dielectric, a trench filled with a conductor, a dielectric, a conductor, a group of trenches, a mesa, a coated mesa, a group of mesas, etc.). The Examiner notes that a recitation of the intended use of the claimed invention must result in a structural difference between the claimed invention and the prior art in order to patentably distinguish the claimed invention from the prior art. If the prior art structure is capable of performing the intended use, then it meets the claim. See, e.g., In re Pearson, 181 USPQ 641 (CCPA); In re Minks, 169 USPQ 120 (Bd Appeals); In re Casey, 152 USPQ 235 (CCPA 1967); In re Otto, 136 USPQ 458, 459 (CCPA 1963). See MPEP §2114. The recitation does not distinguish the present invention over the prior art who teaches the structure as claimed.
Referring to Claim 2, Kao further teaches wherein the planar surface of the first dielectric layer (109 -> 110) is coplanar with a back surface (101b) of the semiconductor substrate (101).
Referring to Claim 7, Kao further teaches forming a third alignment mark (recess in 115a of Fig. 1I) using the second alignment mark (112, recess in 109 of Fig. 1E and 1F) for aligning, wherein the third alignment mark (recess in 115a of Fig. 1I) is spaced apart from the semiconductor substrate (101).
Referring to Claim 8, Kao further teaches forming a metal grid (115a) using the second alignment mark (112, recess in 109 of Fig. 1E and 1F) for aligning.
Referring to Claim 9, Kao further teaches wherein the metal (115a) is outside of the semiconductor substrate (101).
Referring to Claim 12, Kao teaches a method comprising: forming Shallow Trench Isolation (STI) regions (111) in a semiconductor substrate (101), wherein the STI regions comprise a first alignment mark (111); forming image sensors (102a) in the semiconductor substrate (101); forming deep trench isolation regions (110) from a backside (101b) of the semiconductor substrate (101); depositing a dielectric layer (109) on a back surface (101b) of the semiconductor substrate (101), wherein the dielectric layer (109) is in physical contact with the deep trench isolation regions (110); forming a second alignment mark (106 of 112) in the semiconductor substrate (101), wherein the second alignment mark (106 of 112) is formed from the backside (101b) of the semiconductor substrate (101), and the second alignment mark (106 of 112) physically contacts the dielectric layer (109); forming a conductive feature (115a) on the backside (101b) of the semiconductor substrate (101), wherein the conductive feature (115a) is formed using the second alignment mark (106 of 112) for aligning; and forming color filters (116) on the backside (101b) of the semiconductor substrate (101).
"The identical invention must be shown in as complete detail as is contained in the ... claim." Richardson v. Suzuki Motor Co., 868 F.2d 1226, 1236, 9 USPQ2d 1913, 1920 (Fed. Cir. 1989). The elements must be arranged as required by the claim, but this is not an ipsissimis verbis test, i.e., identity of terminology is not required. In re Bond, 910 F.2d 831, 15 USPQ2d 1566 (Fed. Cir. 1990). An “alignment mark” does not have a specific inherent structure but merely identified as such with a label based on an intended use of another structure(s) (i.e. a trench, a trench filled with a dielectric, a trench filled with a conductor, a dielectric, a conductor, a group of trenches, a mesa, a coated mesa, a group of mesas, etc.). The Examiner notes that a recitation of the intended use of the claimed invention must result in a structural difference between the claimed invention and the prior art in order to patentably distinguish the claimed invention from the prior art. If the prior art structure is capable of performing the intended use, then it meets the claim. See, e.g., In re Pearson, 181 USPQ 641 (CCPA); In re Minks, 169 USPQ 120 (Bd Appeals); In re Casey, 152 USPQ 235 (CCPA 1967); In re Otto, 136 USPQ 458, 459 (CCPA 1963). See MPEP §2114. The recitation does not distinguish the present invention over the prior art who teaches the structure as claimed.
Referring to Claim 15, Kao further teaches wherein a first sidewall of the second alignment mark (106 of 112) physically contacts a second sidewall of the dielectric layer (109) to form a vertical interface relative to each other.
As insofar as Claim 18 is supported and definite, Kao teaches a method comprising: forming a first alignment mark (111) extending into a semiconductor substrate (101) from a front side (101a) of the semiconductor substrate (101); at a time the first alignment mark (111) is formed, forming shallow trench isolation regions (111); forming image sensors (102a) in the semiconductor substrate (101); etching the semiconductor substrate (101) from a backside (101b) of the semiconductor substrate (101) to form a trench (105), wherein the trench (105) is formed by aligning to the first alignment mark (111), and the trench (105) is vertically misaligned (not on the same horizontal plane) from the first alignment mark (111); and filling an entirety of the trench (105) with a dielectric material (109) to form at least a part of a second alignment mark (110).
"The identical invention must be shown in as complete detail as is contained in the ... claim." Richardson v. Suzuki Motor Co., 868 F.2d 1226, 1236, 9 USPQ2d 1913, 1920 (Fed. Cir. 1989). The elements must be arranged as required by the claim, but this is not an ipsissimis verbis test, i.e., identity of terminology is not required. In re Bond, 910 F.2d 831, 15 USPQ2d 1566 (Fed. Cir. 1990). An “alignment mark” does not have a specific inherent structure but merely identified as such with a label based on an intended use of another structure(s) (i.e. a trench, a trench filled with a dielectric, a trench filled with a conductor, a dielectric, a conductor, a group of trenches, a mesa, a coated mesa, a group of mesas, etc.). The Examiner notes that a recitation of the intended use of the claimed invention must result in a structural difference between the claimed invention and the prior art in order to patentably distinguish the claimed invention from the prior art. If the prior art structure is capable of performing the intended use, then it meets the claim. See, e.g., In re Pearson, 181 USPQ 641 (CCPA); In re Minks, 169 USPQ 120 (Bd Appeals); In re Casey, 152 USPQ 235 (CCPA 1967); In re Otto, 136 USPQ 458, 459 (CCPA 1963). See MPEP §2114. The recitation does not distinguish the present invention over the prior art who teaches the structure as claimed.
Referring to Claim 19, Kao further teaches wherein the second alignment mark (110) is partially in the semiconductor substrate (101).
Allowable Subject Matter
Claims 3-6, 10, 11, 17, 13, 14, 16 and 20 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
Claims 17 and 20 would be allowable if rewritten to overcome the rejection(s) under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), 2nd paragraph, set forth in this Office action and to include all of the limitations of the base claim and any intervening claims.
The following is a statement of reasons for the indication of allowable subject matter:
Regarding Claim 3, the prior art of record alone or in combination neither teaches nor makes obvious the invention of the method further comprising depositing a second dielectric layer contacting a back surface of the semiconductor substrate; etching the second dielectric layer and the semiconductor substrate to form second trenches; and filling the second trenches with a third dielectric layer to form a third alignment mark in combination with all of the limitations of Claim 1 and 3. Claims 4-6 include the limitations of claim 3.
Regarding Claim 10, the prior art of record alone or in combination neither teaches nor makes obvious the invention of the method further comprising wherein the forming the backside high-absorption regions comprises: etching the semiconductor substrate to form openings having triangular cross-sectional view shapes; and filling the openings with a dielectric material in combination with all of the limitations of Claim 1 and 10. Claims 11 and 17 include the limitations of claim 10.
Regarding Claim 13, the prior art of record alone or in combination neither teaches nor makes obvious the invention of the method, wherein a top surface of the second alignment mark physically contacts a bottom surface of the dielectric layer to form a horizontal interface in combination with all of the limitations of Claim 12 and 13. Claim 14 includes the limitations of claim 13.
Regarding Claim 16, the prior art of record alone or in combination neither teaches nor makes obvious the invention of the method, wherein the forming the conductive feature comprises: etching the semiconductor substrate to form a through-opening penetrating through the semiconductor substrate; and forming a bond pad extending into the through-opening, wherein the bond pad is electrically connected to a metal feature on a front-side of the semiconductor substrate in combination with all of the limitations of Claim 12 and 16.
Regarding Claim 20, the prior art of record alone or in combination neither teaches nor makes obvious the invention of the method further comprising, before the semiconductor substrate is etched to form the trench, depositing a dielectric layer on the semiconductor substrate, wherein the trench also has a part in the dielectric layer, and wherein the second alignment mark is partially in the dielectric layer in combination with all of the limitations of Claim 18, 19 and 20.
Contact Information
Any inquiry concerning this communication or earlier communications from the examiner should be directed to EARL N TAYLOR whose telephone number is (571)272-8894. The examiner can normally be reached M-F, 9:00am-5:00pm.
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, William Kraig can be reached on (571) 272-8660. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/EARL N TAYLOR/Primary Examiner, Art Unit 2896
EARL N. TAYLOR
Primary Examiner
Art Unit 2896
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