DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claims 18-19 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
Claim 18; line 4-5, recited “the outer dielectric layer is located outside the second conductive layer and the inner dielectric layer is located inside the second conductive layer.”, whereas Fig. 8A-8B and Specification [0049], clearly shows that outer dielectric layer 203A is located inside of the outer second conductive layer 204A and the inner dielectric layer 203B is located outside of inner second conductive layer 204B, therefore these two claimed features are contradictory to the Specification and Fig. 8A-B. Accordingly, the boundaries of the claims are not reasonably clear and also language in the claims is ambiguous, vague, incoherent, opaque, or otherwise unclear in describing and defining the claimed invention.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 1-5, 8-15 are rejected under 35 U.S.C. 103 as being unpatentable over LU, US 2025/0308774, in view of DEGAI, US 2016/0196980.
Regarding claim 1, LU discloses; a semiconductor capacitor, comprising: a first conductive layer (Fig.1B and [0031]; first electrode 101); a second conductive layer (Fig.1B and [0031]; second electrode 103); and a dielectric layer formed between the first conductive layer and the second conductive layer (Fig.1B and [0031; dielectric layer 102 is disposed between the first electrode 101 and second electrode 103). LU substantially discloses the invention of cylindrical capacitor but is silent about the first conductive layer or the second conductive layer is performed by a plasma treatment to remove impurities and replace the impurities with nitrogen atoms. However, DEGAI teaches that TiN film containing an impurity is exposed in the plasma. By such a reduction reaction, C or Cl which is an impurity is removed from the TiN film. Also, N active species generated by exciting the nitrogen gas by plasma are added to the TiN film from which an impurity is removed [0040]. It would have been obvious to one with ordinary skill in the art before the effective filing date of the claimed invention to modify LU by providing the first conductive layer or the second conductive layer is performed by a plasma treatment to remove impurities and replace the impurities with nitrogen atoms, so that to provides a technique capable of removing an impurity remaining in a thin film when the film is formed and modifying a characteristic of the thin film according to a change in impurity concentration [0009].
Regarding claim 2, LU discloses; the first conductive layer is a bottom cell plate (Fig.1B and [0032];first electrode referred to as a bottom electrode of the cylindrical capacitor 100) and the second conductive layer is a top cell plate (Fig.1B and [0040]; second electrode 103 is referred to as a top electrode of the cylindrical capacitor 100).
Regarding claim 3, LU discloses; the bottom cell plate and the top cell plate comprise a titanium nitride film, a titanium silicon nitride film, a platinum film, a gold film, or combinations thereof (Fig. 1B and [0034, 0040]; the first metal-containing layers 105 and the second metal-containing layers 108 include titanium nitride, titanium silicon nitride, or a combination thereof).
Regarding claim 4, LU discloses; a thickness of the bottom cell plate is about 10 angstroms to 100 angstroms and a thickness of the top cell plate is about 10 angstroms to 100 angstroms (Fig. 1B and [0038, 0043]; the thickness T3 of the first electrode 101 is preferably from 40 Å to 100 Å and the thickness T6 of the outer second electrode 103B is from 40 Å to 100 Å).
Regarding claim 5, LU discloses; the dielectric layer comprises atomic layer deposition (ALD) films made of hafnium dioxide, zirconium dioxide, aluminum oxide, or combinations thereof (Fig. 1B and [0047, 0039]; forming the dielectric layer 102 includes any suitable deposition method, for example, atomic layer deposition (ALD) and the dielectric layer 102 includes hafnium zirconium oxide, zirconium oxide, hafnium oxide, aluminum oxide, rhodium oxide, ruthenium oxide, or combinations thereof.).
Regarding claim 8, LU discloses; the second conductive layer comprises: an outer second conductive layer formed outside the first conductive layer (Fig.1B and [0040]; outer second electrode 103B); and an inner second conductive layer formed inside the first conductive layer (Fig.1B and [0040]; inner second electrode 103A).
Regarding claim 9, LU discloses; the dielectric layer comprises: an outer dielectric layer formed between the outer second conductive layer and the first conductive layer (Fig.1B and [0039]; outer dielectric layer 102B); and an inner dielectric layer formed between the inner second conductive layer and the first conductive layer (Fig.1B and [0039]; inner dielectric layer 102A).
Regarding claim 10, LU discloses; the outer dielectric layer, the inner dielectric layer, the outer second conductive layer, the inner second conductive layer and the first conductive layer are hollow cylinders (Fig.1B and [0031,0039,0040]; first electrode 101 has a shape of a hollow cylinder, the dielectric layer 102 includes an inner dielectric layer 102A disposed on the inner oxidized surface portion 104A in a hollow cylindrical shape and an outer dielectric layer 102B disposed on the outer oxidized surface portion 104B in a hollow cylindrical shape).
Regarding claim 11, LU discloses; a method for forming a semiconductor capacitor, comprising: providing a first conductive layer (Fig.1B and [0031]; first electrode 101); forming a dielectric layer on the first conductive layer (Fig.1B and [0031; dielectric layer 102 is disposed between the first electrode 101 and second electrode 103); and forming a second conductive layer on the dielectric layer (Fig.1B and [0031]; second electrode 103). LU substantially discloses the invention of cylindrical capacitor but is silent about the first conductive layer or the second conductive layer is performed by a plasma treatment to remove impurities and replace the impurities with nitrogen atoms. However, DEGAI teaches that TiN film containing an impurity is exposed in the plasma. By such a reduction reaction, C or Cl which is an impurity is removed from the TiN film. Also, N active species generated by exciting the nitrogen gas by plasma are added to the TiN film from which an impurity is removed [0040] It would have been obvious to one with ordinary skill in the art before the effective filing date of the claimed invention to modify LU by providing the first conductive layer or the second conductive layer is performed by a plasma treatment to remove impurities and replace the impurities with nitrogen atoms, so that to provides a technique capable of removing an impurity remaining in a thin film when the film is formed and modifying a characteristic of the thin film according to a change in impurity concentration [0009].
Regarding claim 12, LU discloses; the first conductive layer is a bottom cell plate (Fig.1B and [0032];first electrode referred to as a bottom electrode of the cylindrical capacitor 100) and the second conductive layer is a top cell plate (Fig.1B and [0040]; second electrode 103 is referred to as a top electrode of the cylindrical capacitor 100).
Regarding claim 13, LU discloses; the bottom cell plate and the top cell plate comprise a titanium nitride film, a titanium silicon nitride film, a platinum film, a gold film, or combinations thereof (Fig. 1B and [0034, 0040]; the first metal-containing layers 105 and the second metal-containing layers 108 include titanium nitride, titanium silicon nitride, or a combination thereof).
Regarding claim 14, LU discloses; a thickness of the bottom cell plate is about 10 angstroms to 100 angstroms and a thickness of the top cell plate is about 10 angstroms to 100 angstroms (Fig. 1B and [0038, 0043]; the thickness T3 of the first electrode 101 is preferably from 40 Å to 100 Å and the thickness T6 of the outer second electrode 103B is from 40 Å to 100 Å).
Regarding claim 15, LU discloses; the dielectric layer comprises atomic layer deposition (ALD) films made of hafnium dioxide, zirconium dioxide, aluminum oxide, or combinations thereof (Fig. 1B and [0047, 0039]; forming the dielectric layer 102 includes any suitable deposition method, for example, atomic layer deposition (ALD) and the dielectric layer 102 includes hafnium zirconium oxide, zirconium oxide, hafnium oxide, aluminum oxide, rhodium oxide, ruthenium oxide, or combinations thereof.).
Claim(s) 7 and 17 are rejected under 35 U.S.C. 103 as being unpatentable over LU, US 2025/0308774, in view of DEGAI, US 2016/0196980 as applied to claims 1-5, 8-15 above, and further in view of LEMKIN, CN-103149964.
Regarding claims 7 and 17, LU in view of DEGAI substantially discloses the invention of cylindrical capacitor but is silent about a total thickness of hafnium dioxide films of the dielectric layer is less than or equal to 2.5 nm. However, LEMKIN teaches that a high-k dielectric material, a low k dielectric material, hafnium silicate, zirconium silicate, hafnium dioxide, hafnium dioxide, zirconium oxide or dielectric of other suitable type, the thickness of the ultra-thin dielectric layer is generally limited to less than 3nm (e.g., in the 3nm range, such as on the n-substrate thickness is 1.9nm or on the P-type substrate thickness is 2.1nm) (Page 4, [0038]). It would have been obvious to one with ordinary skill in the art before the effective filing date of the claimed invention to modify LU in view of DEGAI by providing a total thickness of hafnium dioxide films of the dielectric layer is less than or equal to 2.5 nm, so that to providing stable current and voltage reference is not sensitive to the change of the circuit working condition such as temperature (Page 4, [0034]).
Claims 11 and 20 are rejected under 35 U.S.C. 103 as being unpatentable over DEGAI, US 2016/0196980, in view of HOSODA, JP-2019181337.
Regarding claims 11 and 20, DEGAI discloses; a method for forming a semiconductor capacitor, comprising: providing a first conductive layer ([0099,0100,0107,0114]; forming a conductive thin film; TiN); forming a dielectric layer on the first conductive layer ([0099,0108]; substrate 200); and the first conductive layer is performed by a plasma treatment to remove impurities and replace the impurities with nitrogen atoms ([0040]; TiN film containing an impurity is exposed in the plasma. By such a reduction reaction, C or Cl which is an impurity is removed from the TiN film. Also, N active species generated by exciting the nitrogen gas by plasma are added to the TiN film from which an impurity is removed). DEGAI substantially discloses the invention including plasma treatment is performed on the wafer on which the TiN film containing an impurity is formed and a ratio of the N2 gas and the H2 gas is set to a predetermined ratio of from 1:10 to 10:1, but is silent about forming a second conductive layer on the dielectric layer in claim 11 and reaction gases for the plasma treatment comprises hydrogen, nitrogen and argon, and a ratio is 1-2 : 1-2 : 0.5-1 in claim 20. However, HOSODA teaches that a metal layer 24 provided on the surface of inorganic layer 20 ( Fig. 4) and gas used for the vacuum plasma treatment include hydrogen gas / nitrogen gas / argon gas may be 35/15/50 (volume ratio). It would have been obvious to one with ordinary skill in the art before the effective filing date of the claimed invention to modify DEGAI by forming a second conductive layer on the dielectric layer in claim 11 and providing reaction gases for the plasma treatment comprises hydrogen, nitrogen and argon, and a ratio is 1-2 : 1-2 : 0.5-1 in claim 20, so that to provide a method for manufacturing a laminate that can manufacture a laminate having excellent dimension stability and electric characteristics (abstract) and the laminated body provided with electronic components (resistors, inductors, capacitors, etc. (Page 11; Line 24).
Allowable Subject Matter
Claims 6 and 16 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
Conclusion
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/AZM PARVEZ/
Examiner
Art Unit 2892
/NORMAN D RICHARDS/Supervisory Patent Examiner, Art Unit 2892
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