Prosecution Insights
Last updated: October 22, 2026
Application No. 18/766,996

METHOD OF MANUFACTURING AN INTEGRATED FAN-OUT PACKAGE HAVING FAN-OUT REDISTRIBUTION LAYER (RDL) TO ACCOMMODATE ELECTRICAL CONNECTORS

Non-Final OA §102
Filed
Jul 09, 2024
Priority
Sep 21, 2015 — provisional 62/221,443 +4 more
Examiner
SEVEN, EVREN
Art Unit
2812
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Taiwan Semiconductor Manufacturing Company, Ltd.
OA Round
1 (Non-Final)
75%
Grant Probability
Favorable
1-2
OA Rounds
0m
Est. Remaining
84%
With Interview

Examiner Intelligence

Grants 75% — above average
75%
Career Allowance Rate
564 granted / 755 resolved
+6.7% vs TC avg
Moderate +9% lift
Without
With
+8.8%
Interview Lift
resolved cases with interview
Typical timeline
2y 3m
Avg Prosecution
28 currently pending
Career history
788
Total Applications
across all art units

Statute-Specific Performance

§101
2.7%
-37.3% vs TC avg
§103
53.4%
+13.4% vs TC avg
§102
20.6%
-19.4% vs TC avg
§112
21.1%
-18.9% vs TC avg
Black line = Tech Center average estimate • Based on career data from 755 resolved cases

Office Action

§102
Detailed Action The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Claim Rejections - 35 USC § 102 The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. Claim 1 is rejected under 35 U.S.C. 102(a)(1) as being anticipated by U.S. Pat. No. 6348728 to Aiba et al. (Aiba). Regarding Claim 1, Aiba teaches in Fig. 19 at least, a method comprising: encapsulating a first device die and a second device (not numbered) die in a first encapsulant 28; performing a first planarization process on the first encapsulant 7:42-51; forming a first through-via (not numbered, vias from both first and second device die) starting from the first device die; placing a third device die 82 over the first device die and the second device die through a die-attach film (not numbered, film under 82); and forming a redistribution structure over 32/36 and electrically coupling to the first device die, the second device die, and the third device die. Allowable Subject Matter Claims 2-9 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. The following is a statement of reasons for the indication of allowable subject matter: the cited prior art does not teach the specific limitations of the dependent claims.. Claims 11-20 are allowed. Regarding Claim 20, U.S. Pat. Pub. No. 20190074261 to Yu et al. teaches in Figs. 3A-3J method comprising: placing a first device die comprising: a first part comprising a first edge; a second part comprising a second edge opposite to the first edge; and a conductive pad in the first part; placing a second device die adjacent to the first device die; attaching a third device die on the first device die and the second device die through a die-attach film; and encapsulating the first device die, the second device die, and the third device die in an encapsulant, wherein a bottom surface of the die-attach film contacts a top surface of the encapsulant to form a horizontal interface, and wherein the second edge of the first device die overlaps a part of the encapsulant. However, Yu is not available as prior art. Regarding Claim 18, U.S. Pat. Pub. No. 20070126085 to Kawano et al. teaches in Figs. 3A-4C a method comprising: encapsulating a first device die in a first encapsulant; forming a first through-via contacting the first device die; adhering a second device die on the first device die; and encapsulating the second device die and the first through-via in a second encapsulant, but does not teach the through-via comprising a first bottom surface contacting the first device die. Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to EVREN SEVEN whose telephone number is (571)270-5666. The examiner can normally be reached Mon-Fri 8:00- 5:00 Pacific. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Christine Kim can be reached at (571) 272-8458. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /EVREN SEVEN/Primary Examiner, Art Unit 2812
Read full office action

Prosecution Timeline

Jul 09, 2024
Application Filed
Sep 30, 2026
Non-Final Rejection mailed — §102 (current)

Precedent Cases

Applications granted by this same examiner with similar technology

Patent 12772803
SEMICONDUCTOR WAFER HAVING CONTACT PADS CONFIGURED TO ACT AS PROBE PADS
3y 8m to grant Granted Oct 20, 2026
Patent 12772705
ORGANIC LIGHT EMITTING DISPLAY APPARATUS
2y 9m to grant Granted Oct 20, 2026
Patent 12772546
SEMICONDUCTOR DEVICE STRUCTURE AND METHODS OF FORMING THE SAME
2y 9m to grant Granted Oct 20, 2026
Patent 12772799
STRESS MANAGEMENT FOR PRECISE SUBSTRATE -TO- SUBSTRATE BONDING
2y 8m to grant Granted Oct 20, 2026
Patent 12772434
SEMICONDUCTOR DEVICE
3y 0m to grant Granted Oct 20, 2026
Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

1-2
Expected OA Rounds
75%
Grant Probability
84%
With Interview (+8.8%)
2y 3m (~0m remaining)
Median Time to Grant
Low
PTA Risk
Based on 755 resolved cases by this examiner. Grant probability derived from career allowance rate.

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