DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Status
Acknowledgment is made of the amendment filed on 4/16/2026, which amended claims 1, 9-10, and 15, cancelled claims 6-7 and 11-12, and added new claims 21-24. Claims are 1-5, 8-10, 13-24 are currently pending.
Claim Objections
Claim 9 is objected to because of the following informalities:
Claim 9, line 3, “a shell disposed over the substate stage and comprising an opening” should be deleted from the claim because line 6 repeats “a shell disposed over the substrate stage and comprising an opening” as part of the light receiver structure.
Appropriate correction is required to place claims in better form.
Claim Interpretation
The following is a quotation of 35 U.S.C. 112(f):
(f) Element in Claim for a Combination. – An element in a claim for a combination may be expressed as a means or step for performing a specified function without the recital of structure, material, or acts in support thereof, and such claim shall be construed to cover the corresponding structure, material, or acts described in the specification and equivalents thereof.
The following is a quotation of pre-AIA 35 U.S.C. 112, sixth paragraph:
An element in a claim for a combination may be expressed as a means or step for performing a specified function without the recital of structure, material, or acts in support thereof, and such claim shall be construed to cover the corresponding structure, material, or acts described in the specification and equivalents thereof.
The claims in this application are given their broadest reasonable interpretation using the plain meaning of the claim language in light of the specification as it would be understood by one of ordinary skill in the art. The broadest reasonable interpretation of a claim element (also commonly referred to as a claim limitation) is limited by the description in the specification when 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, is invoked.
As explained in MPEP § 2181, subsection I, claim limitations that meet the following three-prong test will be interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph:
(A) the claim limitation uses the term “means” or “step” or a term used as a substitute for “means” that is a generic placeholder (also called a nonce term or a non-structural term having no specific structural meaning) for performing the claimed function;
(B) the term “means” or “step” or the generic placeholder is modified by functional language, typically, but not always linked by the transition word “for” (e.g., “means for”) or another linking word or phrase, such as “configured to” or “so that”; and
(C) the term “means” or “step” or the generic placeholder is not modified by sufficient structure, material, or acts for performing the claimed function.
Use of the word “means” (or “step”) in a claim with functional language creates a rebuttable presumption that the claim limitation is to be treated in accordance with 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph. The presumption that the claim limitation is interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, is rebutted when the claim limitation recites sufficient structure, material, or acts to entirely perform the recited function.
Absence of the word “means” (or “step”) in a claim creates a rebuttable presumption that the claim limitation is not to be treated in accordance with 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph. The presumption that the claim limitation is not interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, is rebutted when the claim limitation recites function without reciting sufficient structure, material or acts to entirely perform the recited function.
Claim limitations in this application that use the word “means” (or “step”) are being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, except as otherwise indicated in an Office action. Conversely, claim limitations in this application that do not use the word “means” (or “step”) are not being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, except as otherwise indicated in an Office action.
This application includes one or more claim limitations that do not use the word “means,” but are nonetheless being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, because the claim limitation(s) uses a generic placeholder that is coupled with functional language without reciting sufficient structure to perform the recited function and the generic placeholder is not preceded by a structural modifier. Such claim limitation(s) is/are: “an optical module” in lines 8-9 in claim 1; “an optical module” in lines 12-13 in claim 9
Because this/these claim limitation(s) is/are being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, it/they is/are being interpreted to cover the corresponding structure described in the specification as performing the claimed function, and equivalents thereof.
If applicant does not intend to have this/these limitation(s) interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, applicant may: (1) amend the claim limitation(s) to avoid it/them being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph (e.g., by reciting sufficient structure to perform the claimed function); or (2) present a sufficient showing that the claim limitation(s) recite(s) sufficient structure to perform the claimed function so as to avoid it/them being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claims 1-2 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Ota et al. (US PGPub 2002/0041368, Ota hereinafter).
Regarding claim 1, Ota discloses a lithography apparatus (Figs. 1-7, 10, 11, 14, abstract, para. [0063], exposure apparatus 10), comprising:
a substrate stage having a first region configured to hold a semiconductor substrate and a second region surrounding the first region (Figs. 1-7, 10, 11, 14, paras. [0066], [0093]-[0100], substrate stage WST holds wafer W in a central region on a wafer holder and includes a region surrounding the region supporting the wafer W (see Figs. 1, 6));
a light receiver structure over the second region of the substrate stage (Figs. 1-7, 10, 11, 14, paras. [0096]-[0099], [0110], the wafer stage WST includes image space measuring instrument FM1 and image space measuring instrument FM2 over the regions surrounding the wafer holder);
a light source configured to provide an alignment light toward the second region of the substrate stage (Figs. 1-7, 10, 11, 14, paras. [0065]-[0067], [0069], [0080], [0096], [0099], [0107]-[0108], [0110]-[0112], [0130], a light source device 12 provides a wide bandwidth of light, including visible light AL used with image space measuring instrument FM2);
a mask stage configured to secure a mask (Figs. 1-7, 10, 11, 14, paras. [0066], [0076]-[0078], reticle stage RST holds the reticle R);
an optical module configured to direct an exposure light from the mask onto the semiconductor substrate (Figs. 1-7, 10, 11, 14, paras. [0063]-[0066], [0068]-[0071], [0082]-[0083], [0088], projection optics PO projects the exposure light patterned by reticle R onto wafer W), wherein a peak wavelength of the alignment light is in visible light spectrum, while a peak wavelength of the exposure light is in extreme ultraviolet (EUV) light (Figs. 1-7, 10, 11, 14, paras. [0065]-[0069], [0080], [0088], [0096], [0099], [0107]-[0108], [0110], [0130], the exposure light EL1 has an EUV wavelength, and the light AL is visible wavelength light).
Regarding claim 2, Ota discloses wherein the exposure light is directed onto the semiconductor substrate along a first direction, and the alignment light is provided toward the second region of the substrate stage along a second direction substantially parallel with the first direction (Figs. 1-7, 10, 11, 14, paras. [0065]-[0067], [0069], [0080], [0096], [0099], [0107]-[0108], [0110]-[0113], [0123]-[0127], [0130], the exposure light EL1 and the light AL are directed by the light source 12. The exposure light EL1 is incident on substrate W, and the light AL is incident on image space measuring instrument FM2 along parallel directions).
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 3 and 5 are rejected under 35 U.S.C. 103 as being unpatentable over Ota as applied to claim 1 above, and further in view of Goodwin et al. (US PGPub 2013/0208104, Goodwin hereinafter).
Regarding claim 3, although Ota discloses a photosensitive device layer comprising a plurality of photosensitive areas (Figs. 1-7, 10, 11, 14, paras. [0096]-[0099], [0110], the wafer stage WST includes image space measuring instrument FM1 and image space measuring instrument FM2 over the regions surrounding the wafer holder, and the imaging space measuring instrument FM2 includes CCD type imaging device 86), Ota does not appear to explicitly describe a color filter layer having a plurality of portions respectively over the photosensitive pixels, wherein the portions of the color filter layer have different transmittance spectrums.
Goodwin discloses wherein the light receiver structure comprises: a photosensitive device layer comprising a plurality of photosensitive pixels (Figs. 1-3, paras. [0032], [0034]-[0035], CCD detector component 102a comprises pixels sensing wavelengths); and
a color filter layer having a plurality of portions respectively over the photosensitive pixels, wherein the portions of the color filter layer have different transmittance spectrums (Figs. 1-3, paras. [0029], [0032], [0034], [0035], [0038]-[0039], a material layer is applied on the pixels of the CCD component to change the spectral response for different pixels).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have included a photosensitive device layer comprising a plurality of photosensitive pixels, a color filter layer having a plurality of portions respectively over the photosensitive pixels, wherein the portions of the color filter layer have different transmittance spectrums as taught by Goodwin in the light receiver structure in the lithography apparatus as taught by Ota since including a color filter layer having a plurality of portions respectively over the photosensitive pixels, wherein the portions of the color filter layer have different transmittance spectrums is commonly used to provide a CCD detector that is capable of facilitating the simplification of the illumination system and optics (Goodwin, para. [0047]).
Regarding claim 5, Ota as modified by Goodwin discloses wherein the photosensitive pixels of the photosensitive device layer are arranged along a plane substantially parallel with a top surface of the substrate stage (Ota, Fig. 6, para. [0099], the 2D imaging device 86 is CCD arranged in a plane parallel to the top surface of the stage WST).
Claim 4 is rejected under 35 U.S.C. 103 as being unpatentable over Ota as modified by Goodwin as applied to claim 3 above, and further in view of Tsuji (US PGPub 2002/0101574).
Regarding claim 4, although Ota as modified by Goodwin discloses the photosensitive device layer and the color filter layer (Ota, Figs. 1-7, 10, 11, 14, paras. [0096]-[0099], [0110], the wafer stage WST includes image space measuring instrument FM2 comprising CCD type imaging device 86, and as modified by Goodwin, Figs. 1-3, paras. [0029], [0038]-[0039], a material layer is applied on the pixels of the CCD component to change the spectral response for different pixels), Ota as modified by Goodwin does not appear to explicitly describe wherein the light receiver structure further comprises: a shell surrounding the photosensitive device layer and the color filter layer, wherein the shell has an opening facing away from the substrate stage.
Tsuji discloses wherein the light receiver structure further comprises: a shell surrounding the photosensitive device layer, wherein the shell has an opening facing away from the substrate stage (Figs. 1-9, paras. [0034]-[0036], [0040], [0044], [0046], [0049]-[0050], [0055]-[0059], [0067], [0079]-[0080], [0086], the irradiance photometer 7, 9, 10, 13, 16, 22 includes a chassis 2 disposed on the upper surface of the wafer stage WS. The chassis 2 surrounds the light detector 3 and includes an opening facing away from the wafer stage WS).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have included wherein the light receiver structure further comprises: a shell surrounding the photosensitive device layer, wherein the shell has an opening facing away from the substrate stage as taught by Tsuji light receiver structure with the photosensitive device layer and the color filter layer in the lithography apparatus as taught by Ota as modified by Goodwin since including wherein the light receiver structure further comprises: a shell surrounding the photosensitive device layer and the color filter layer, wherein the shell has an opening facing away from the substrate stage is commonly used to minimize the impact of stray light and heat on the measurement structure (Tsuji, paras. [0013]-[0014]).
Claim 8 is rejected under 35 U.S.C. 103 as being unpatentable over Ota as applied to claim 1 above, and further in view of Shiraishi (US PGPub 2007/0008509).
Regarding claim 8, Ota does not appear to explicitly describe further comprising: a wall surrounding the substrate stage, the light receiver structure, the light source, the mask stage, and the optical module.
Shiraishi discloses further comprising: a wall surrounding the substrate stage, the light receiver structure, the light source, the mask stage, and the optical module (Figs. 1, 8, paras. [0047]-[0048], [0096]-[0098], [0101], vacuum chamber surrounds the entirety of the optical path of the exposure apparatus, including the wafer stage WS, the EUV light source, the light quantity sensors 12’, 13’, the reticle stage RS, and the projection optical system 6).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have included a wall surrounding the substrate stage, the light receiver structure, the light source, the mask stage, and the optical module as taught by Shiraishi in the lithography apparatus as taught by Ota since including a wall surrounding the substrate stage, the light receiver structure, the light source, the mask stage, and the optical module is commonly used to maintain a vacuum for the optical path (Shiraishi, para. [0047]).
Claims 9, 10, 15-16, 19, 20, 23, and 24 are rejected under 35 U.S.C. 103 as being unpatentable over Ota in view of Goodwin in view of Tsuji.
Regarding claim 9, Ota discloses a lithography apparatus (Figs. 1-7, 10, 11, 14, abstract, para. [0063], exposure apparatus 10), comprising:
a substrate stage configured to hold a semiconductor substrate (Figs. 1-7, 10, 11, 14, paras. [0066], [0093]-[0100], substrate stage WST holds wafer W);
a light receiver structure over the substrate stage (Figs. 1-7, 10, 11, 14, paras. [0096]-[0099], [0110]-[0112], [0130], the wafer stage WST includes image space measuring instrument FM1 and image space measuring instrument FM2 over the regions surrounding the wafer holder), wherein the light receiver structure comprises:
a photosensitive device layer comprising a plurality of photosensitive pixels (Figs. 1-7, 10, 11, 14, paras. [0096]-[0099], [0110], the wafer stage WST includes image space measuring instrument FM1 and image space measuring instrument FM2 over the regions surrounding the wafer holder, and the imaging space measuring instrument FM2 includes CCD type imaging device 86); and
a mask stage configured to secure a mask (Figs. 1-7, 10, 11, 14, paras. [0066], [0076]-[0078], reticle stage RST holds the reticle R);
an optical module configured to direct an exposure light from the mask onto the semiconductor substrate (Figs. 1-7, 10, 11, 14, paras. [0063]-[0066], [0068]-[0071], [0082]-[0083], [0088], projection optics PO projects the exposure light patterned by reticle R onto wafer W). Ota does not appear to explicitly describe a shell disposed over the substrate stage and comprising an opening; wherein the opening of the shell vertically overlaps the photosensitive device layer; and a color filter layer having a plurality of portions respectively over the photosensitive pixels, wherein the portions of the color filter layer have different transmittance spectrums.
Goodwin discloses a photosensitive device layer comprising a plurality of photosensitive pixels (Figs. 1-3, paras. [0032], [0034]-[0035], CCD detector component 102a comprises pixels sensing wavelengths); and
a color filter layer having a plurality of portions respectively over the photosensitive pixels, wherein the portions of the color filter layer have different transmittance spectrums (Figs. 1-3, paras. [0029], [0032], [0034], [0035], [0038]-[0039], a material layer is applied on the pixels of the CCD component to change the spectral response for different pixels).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have included a color filter layer having a plurality of portions respectively over the photosensitive pixels, wherein the portions of the color filter layer have different transmittance spectrums as taught by Goodwin in the light receiver structure of the lithography apparatus as taught by Ota since including a color filter layer having a plurality of portions respectively over the photosensitive pixels, wherein the portions of the color filter layer have different transmittance spectrums is commonly used to provide a CCD detector that is capable of facilitating the simplification of the illumination system and optics (Goodwin, para. [0047]).
Ota as modified by Goodwin does not appear to explicitly describe a shell disposed over the substrate stage and comprising an opening; wherein the opening of the shell vertically overlaps the photosensitive device layer.
Tsuji discloses the light receiver structure comprises: a shell disposed over the substrate stage and comprising an opening (Figs. 1-9, paras. [0034]-[0036], [0040], [0044], [0046], [0049]-[0050], [0055]-[0059], [0067], [0079]-[0080], [0086], the irradiance photometer 7, 9, 10, 13, 16, 22 includes a chassis 2 disposed on the upper surface of the wafer stage WS and includes an opening);
a photosensitive device layer, wherein the opening of the shell vertically overlaps the photosensitive device layer (Figs. 1-9, paras. [0034]-[0036], [0040], [0044], [0046], [0049]-[0050], [0055]-[0059], [0067], [0079]-[0080], [0086], the irradiance photometer 7, 9, 10, 13, 16, 22 includes the opening in chassis 2 disposed vertically above the light detector 3).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have included a shell disposed over the substrate stage and comprising an opening; wherein the opening of the shell vertically overlaps the photosensitive device layer as taught by Tsuji in the light receiver structure in the lithography apparatus as taught by Ota as modified by Goodwin since including the light receiver structure comprises a shell disposed over the substrate stage and comprising an opening, wherein the opening of the shell vertically overlaps the photosensitive device layer is commonly used to minimize the impact of stray light and heat on the measurement structure (Tsuji, paras. [0013]-[0014]).
Regarding claim 10, Ota as modified by Goodwin in view of Tsuji discloses wherein the light receiver structure further comprises: a light shielding plate over the color filter layer (Goodwin, Figs. 1-3, paras. [0029], [0038]-[0039], a material layer is applied on the pixels of the CCD component to change the spectral response for different pixels, and as modified by Tsuji, Figs. 1-9, paras. [0034]-[0036], [0040], [0044]-[0046], [0048]-[0050], [0055]-[0059], [0067], [0079]-[0080], [0086], the irradiance photometer 7, 9, 10, 13, 16, 22 includes chassis 2 with a ceiling portion with a shading portion 8, thick ceiling portion 2b, cover 11, or cover 14 over the detector in the combination of Ota as modified by Goodwin in view of Tsuji).
Regarding claim 14, Ota as modified by Goodwin in view of Tsuji discloses wherein the color filter layer is a linear variable color filter (Goodwin, Figs. 1-3, paras. [0029], [0032], [0034], [0035], [0038]-[0039], [0044]-[0045], the material layer is applied on the pixels of the CCD component to linearly change the spectral response for different pixels).
Regarding claim 15, Ota discloses a method for operating a lithography apparatus (Figs. 1-7, 10, 11, 14, abstract, para. [0063], exposure apparatus 10 exposes a wafer W), comprising:
placing semiconductor substrate over a first region of a substrate stage (Figs. 1-7, 10, 11, 14, paras. [0066], [0093]-[0100], substrate stage WST holds wafer W in a central region on a wafer holder);
directing an alignment light to a second region of the substrate stage (Figs. 1-7, 10, 11, 14, paras. [0065]-[0067], [0069], [0080], [0096]-[0099], [0107]-[0108], [0110]-[0112], [0130], the wafer stage WST includes image space measuring instrument FM1 and image space measuring instrument FM2 over the regions surrounding the wafer holder, and visible AL light from light source 12 is directed to image space measuring instrument FM2);
using a light receiver structure over the second region of the substate stage (Figs. 1-7, 10, 11, 14, paras. [0096]-[0099], [0110], the wafer stage WST includes image space measuring instrument FM1 and image space measuring instrument FM2 over the regions surrounding the wafer holder); and
after detecting the light, directing an exposure light to the semiconductor substrate (Figs. Figs. 1-7, 10, 11, 14, paras. [0065]-[0067], [0069], [0080], [0096], [0099], [0107]-[0108], [0110]-[0113], [0123]-[0127], [0130], following detection of visible light AL with image space measurement instrument FM2 and detection of EUV light EL1 using image space measurement instrument FM1, the wafer W is exposed to EUV EL1 light). Although Ota discloses detecting a plurality of different wavelengths of light (Figs. 1-7, 10, 11, 14 paras. [0096]-[0099], [0110]-[0113], [0123]-[0127], the image space measuring instrument FM1 detects EUV light EL1, and image space measuring instrument FM2 detects visible light AL), Ota does not appear to explicitly describe using the light receiver structure detecting a plurality of different wavelengths of light, wherein the light receiver structure comprises a shell disposed on a top surface of the substrate stage and a light sensing device disposed in the shell, wherein the shell has an opening exposing the light sensing device.
Goodwin discloses using a light receiver structure (Figs. 1-3, paras. [0032], [0034]-[0035], CCD detector component 102a comprises pixels sensing wavelengths), detecting a plurality of different wavelengths of light (Figs. 1-3, paras. [0029], [0032], [0034], [0035], [0038]-[0039], a material layer is applied on the pixels of the CCD component to change the spectral response for different pixels).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have included using a light receiver structure, detecting a plurality of different wavelengths of light as taught by Goodwin with the light receiver structure over the second region of the substrate stage prior to exposure in the method as taught by Ota such that the exposure is performed after detecting the different wavelengths of light since including using a light receiver structure over the second region of the substrate stage, detecting a plurality of different wavelengths of light is commonly used to provide a CCD detector that is capable of facilitating the simplification of the illumination system and optics (Goodwin, para. [0047]).
Ota as modified by Goodwin does not appear to explicitly describe a shell disposed on a top surface of the substrate stage and a light sensing device disposed in the shell, wherein the shell has an opening exposing the light sensing device.
Tsuji discloses wherein the light receiver structure comprises a shell disposed on a top surface of the substrate stage and a light sensing device disposed in the shell (Figs. 1-9, paras. [0034]-[0036], [0040], [0044], [0046], [0049]-[0050], [0055]-[0059], [0067], [0079]-[0080], [0086], the irradiance photometer 7, 9, 10, 13, 16, 22 includes the light detector 3 inside chassis 2), wherein the shell has an opening exposing the light sensing device (Figs. 1-9, paras. [0034]-[0036], [0040], [0044], [0046], [0049]-[0050], [0055]-[0059], [0067], [0079]-[0080], [0086], the irradiance photometer 7, 9, 10, 13, 16, 22 includes a chassis 2 disposed on the upper surface of the wafer stage WS and includes an opening above the light detector 3).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have included wherein the light receiver structure comprises a shell disposed on a top surface of the substrate stage and a light sensing device disposed in the shell, wherein the shell has an opening exposing the light sensing device as taught by Tsuji in the light receiver structure in the method as taught by Ota as modified by Goodwin since including wherein the light receiver structure comprises a shell disposed on a top surface of the substrate stage and a light sensing device disposed in the shell, wherein the shell has an opening exposing the light sensing device is commonly used to minimize the impact of stray light and heat on the measurement structure (Tsuji, paras. [0013]-[0014]).
Regarding claim 16, Ota as modified by Goodwin in view of Tsuji discloses wherein directing the alignment light to the second region of the substrate stage is performed along a first direction, and directing the exposure light to the semiconductor substrate is performed along a second direction substantially parallel with the first direction (Ota, Figs. 1-7, 10, 11, 14, paras. [0065]-[0067], [0069], [0080], [0096], [0099], [0107]-[0108], [0110]-[0113], [0123]-[0127], [0130], the exposure light EL1 and the light AL are directed by the light source 12. The exposure light EL1 is incident on substrate W or FM1, and the light AL is incident on image space measuring instrument FM2 along parallel directions).
Regarding claim 19, Ota as modified by Goodwin in view of Tsuji discloses wherein a peak wavelength of the alignment light is different from a peak wavelength of the exposure light (Ota, Figs. 1-7, 10, 11, 14, paras. [0065]-[0069], [0080], [0088], [0096], [0099], [0107]-[0108], [0110], [0130], the exposure light EL1 has an EUV wavelength, and the light AL is visible wavelength light).
Regarding claim 20, Ota as modified by Goodwin in view of Tsuji discloses wherein the different wavelengths of light are longer than a peak wavelength of the exposure light (Ota, Figs. 1-7, 10, 11, 14, paras. [0065]-[0069], [0080], [0088], [0096], [0099], [0107]-[0108], [0110], [0130], the exposure light EL1 has an EUV wavelength, and the light AL is visible wavelength light, and as modified by Goodwin, Figs. 1-3, paras. [0017], [0026], [0029], [0032]-[0034], [0035], [0038]-[0039], [0042], a material layer is applied on the pixels of the CCD detector such that the CCD detector component detects multiple wavelengths in the visible spectrum).
Regarding claim 23, Ota as modified by Goodwin in view of Tsuji discloses wherein the opening of the shell vertically overlaps the light sensing device (Tsuji, Figs. 1-9, paras. [0034]-[0036], [0040], [0044], [0046], [0049]-[0050], [0055]-[0059], [0067], [0079]-[0080], [0086], the irradiance photometer 7, 9, 10, 13, 16, 22 includes the opening in chassis 2 disposed vertically above the light detector 3).
Regarding claim 24, Ota as modified by Goodwin in view of Tsuji discloses wherein the light sensing device is disposed on an inner surface of the shell (Tsuji, Figs. 1-9, paras. [0034]-[0036], [0040], [0044], [0046], [0049]-[0050], [0055]-[0059], [0067], [0079]-[0080], [0086], the light detector 3 is on an inner surface of chassis 2 in the irradiance photometer 7, 9, 10, 13, 16, 22).
Claim 13 is rejected under 35 U.S.C. 103 as being unpatentable over Ota as modified by Goodwin in view of Tsuji as applied to claim 9 above, and further in view of Shiraishi (US PGPub 2007/0008509).
Regarding claim 13, Ota as modified by Goodwin in view of Tsuji does not appear to explicitly describe further comprising: a wall surrounding the substrate stage, the light receiver structure, the light source, the mask stage, and the optical module.
Shiraishi discloses further comprising: a wall surrounding the substrate stage, the light receiver structure, the light source, the mask stage, and the optical module (Figs. 1, 8, paras. [0047]-[0048], [0096]-[0098], [0101], vacuum chamber surrounds the entirety of the optical path of the exposure apparatus, including the wafer stage WS, the EUV light source, the light quantity sensors 12’, 13’, the reticle stage RS, and the projection optical system 6).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have included a wall surrounding the substrate stage, the light receiver structure, the light source, the mask stage, and the optical module as taught by Shiraishi in the lithography apparatus as taught by Ota as modified by Goodwin in view of Tsuji since including a wall surrounding the substrate stage, the light receiver structure, the light source, the mask stage, and the optical module is commonly used to maintain a vacuum for the optical path (Shiraishi, para. [0047]).
Claims 17 and 18 are rejected under 35 U.S.C. 103 as being unpatentable over Ota as modified by Goodwin in view of Tsuji as applied to claim 15 above, and further in view of Nishinaga et al. (US PGPub 2006/0170891, Nishinaga hereinafter).
Regarding claim 17, Ota as modified by Goodwin in view of Tsuji does not appear to explicitly describe determining a tilt of the substrate stage is acceptable based on a result of detecting the alignment light; and in response the determination determines that the tilt of the substrate stage is not acceptable, adjusting a position and a tilt angle of the substrate stage, wherein directing the exposure light to the semiconductor substrate is performed in response the determination determines that the tilt of the substrate stage is acceptable.
Nishinaga discloses further comprising: determining whether a tilt of the substrate stage is acceptable based on a result of detecting the alignment light (Figs. Figs. 21, 23, 24, 25, 32, 33, paras. [0223], [0233], [0241], [0262]-[0264], [0277]-[0281], [0318], the control unit CONT determines the best focus position using the spatial image-measuring unit 270 while scanning the substrate stage PST, and controls the tilt of the substrate stage PST based on the measurement); and
in response the determination determines that the tilt of the substrate stage is not acceptable, adjusting a position and a tilt angle of the substrate stage, wherein directing the exposure light to the semiconductor substrate is performed in response the determination determines that the tilt of the substrate stage is acceptable (the limitation “in response the determination determines that the tilt of the substrate stage is not acceptable, adjusting a position and a tilt angle of the substrate stage, wherein directing the exposure light to the semiconductor substrate is performed in response the determination determines that the tilt of the substrate stage is acceptable” recites a contingent limitation in a method claim. “The broadest reasonable interpretation of a method (or process) claim having contingent limitations requires only those steps that must be performed and does not include steps that are not required to be performed because the condition(s) precedent are not met.” See MPEP 2111.04, subsection II. For instance, the claim language does not require “adjusting a position and a tilt angle of the substrate stage” when the determination determines the tilt of the substrate stage is acceptable. Figs. 21, 23, 24, 25, 32, 33, paras. [0223], [0233], [0239], [0241], [0262]-[0264], [0277]-[0281], [0318], the control unit CONT determines the best focus position using the spatial image-measuring unit 270 while scanning the substrate stage PST, and controls the tilt of the substrate stage PST based on the measurement).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have included determining whether a tilt of the substrate stage is acceptable based on a result of detecting the alignment light; and in response the determination determines that the tilt of the substrate stage is not acceptable, adjusting a position and a tilt angle of the substrate stage, wherein directing the exposure light to the semiconductor substrate is performed in response the determination determines that the tilt of the substrate stage is acceptable as taught by Nishinaga in the method as taught by Ota as modified by Goodwin in view of Tsuji since including determining whether a tilt of the substrate stage is acceptable based on a result of detecting the alignment light; and in response the determination determines that the tilt of the substrate stage is not acceptable, adjusting a position and a tilt angle of the substrate stage, wherein directing the exposure light to the semiconductor substrate is performed in response the determination determines that the tilt of the substrate stage is acceptable is commonly used to quickly control the position of the substrate stage to arrange the substrate at the best focus position of the projection optical system to improve exposure (Nishinaga, para. [0262]).
Regarding claim 18, Ota as modified by Goodwin in view of Tsuji does not appear to explicitly describe further comprising: determining whether a position of the substrate stage is acceptable based on a result of detecting the alignment light; and in response the determination determines that the position of the substrate stage is not acceptable, adjusting a position of the substrate stage, wherein directing the exposure light to the semiconductor substrate is performed in response that determination determines that the position of the substrate stage is acceptable.
Nishinaga discloses further comprising: determining whether a position of the substrate stage is acceptable based on a result of detecting the alignment light (Figs. Figs. 21, 23, 24, 25, 32, 33, paras. [0218], [0223], [0233], [0239], [0241], [0259]-[0260], [0262]-[0264], [0277]-[0281], [0318], the control unit CONT determines the best focus position using the spatial image-measuring unit 270 while scanning the substrate stage PST, and controls the movement in the z-axis direction and tilt of the substrate stage PST based on the measurement); and
in response the determination determines that the position of the substrate stage is not acceptable, adjusting a position of the substrate stage, wherein directing the exposure light to the semiconductor substrate is performed in response the determination determines that the position of the substrate stage is acceptable (the limitation “in response the determination determines that the position of the substrate stage is not acceptable, adjusting a position of the substrate stage, wherein directing the exposure light to the semiconductor substrate is performed in response the determination determines that the position of the substrate stage is acceptable” recites a contingent limitation in a method claim. “The broadest reasonable interpretation of a method (or process) claim having contingent limitations requires only those steps that must be performed and does not include steps that are not required to be performed because the condition(s) precedent are not met.” See MPEP 2111.04, subsection II. For instance, the claim language does not require “adjusting a position of the substrate stage” when the determination determines the position of the substrate stage is acceptable. Figs. 21, 23, 24, 25, 32, 33, paras. [0218], [0223], [0233], [0239], [0241], [0259]-[0260], [0262]-[0264], [0277]-[0281], [0318], the control unit CONT determines the best focus position using the spatial image-measuring unit 270 while scanning the substrate stage PST, and controls the z-axis position and tilt of the substrate stage PST based on the measurement).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have included determining whether a position of the substrate stage is acceptable based on a result of detecting the alignment light; and in response the determination determines that the position of the substrate stage is not acceptable, adjusting a position of the substrate stage, wherein directing the exposure light to the semiconductor substrate is performed in response that determination determines that the position of the substrate stage is acceptable as taught by Nishinaga in the method as taught by Ota as modified by Goodwin in view of Tsuji since including determining whether a position of the substrate stage is acceptable based on a result of detecting the alignment light; and in response the determination determines that the position of the substrate stage is not acceptable, adjusting a position of the substrate stage, wherein directing the exposure light to the semiconductor substrate is performed in response that determination determines that the position of the substrate stage is acceptable is commonly used to quickly control the position of the substrate stage to arrange the substrate at the best focus position of the projection optical system to improve exposure (Nishinaga, para. [0262]).
Claims 21-22 are rejected under 35 U.S.C. 103 as being unpatentable over Ota as applied to claim 1 above, and further in view of Tsuji (US PGPub 2002/0101574).
Regarding claim 21, Ota does not appear to explicitly describe wherein the light receiver structure comprises a shell disposed on a top surface of the substrate stage, wherein the shell comprises a bottom plate, a side plate, and a top plate that define a space.
Tsuji discloses wherein the light receiver structure comprises a shell disposed on a top surface of the substrate stage, wherein the shell comprises a bottom plate, a side plate, and a top plate that define a space (Figs. 1-9, paras. [0034]-[0035], [0040], [0044], [0049]-[0050], [0055]-[0059], [0067], [0079]-[0080], [0086], the irradiance photometer 7, 9, 10, 13, 16, 22 includes a chassis 2 disposed on the upper surface of the wafer stage WS. The chassis 2 includes a bottom surface, side surfaces and a ceiling portion 2b or cover 11, 14 that define a space).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have included wherein the light receiver structure comprises a shell disposed on a top surface of the substrate stage, wherein the shell comprises a bottom plate, a side plate, and a top plate that define a space as taught by Tsuji in the light receiver structure in the lithography apparatus as taught by Ota since including wherein the light receiver structure comprises a shell disposed on a top surface of the substrate stage, wherein the shell comprises a bottom plate, a side plate, and a top plate that define a space is commonly used to minimize the impact of stray light and heat on the measurement structure (Tsuji, paras. [0013]-[0014]).
Regarding claim 22, Ota as modified by Tsuji discloses wherein a light sensing device of the light receiver structure is disposed in the space (Ota, Figs. 1, 6, para. [0099], imaging device 86 is arranged within image space measuring instrument FM2, and as modified by Tsuji, Figs. 1-9, paras. [0034], [0055]-[0059], [0067], [0079]-[0080], [0086], the light detector 3 is inside the chassis 2).
Response to Arguments
Applicant’s arguments with respect to claims 1-5, 8-10, and 13-20 have been considered but are moot because the new ground of rejection does not rely on any reference applied in the prior rejection of record for any teaching or matter specifically challenged in the argument.
Conclusion
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
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/CHRISTINA A RIDDLE/Primary Examiner, Art Unit 2882
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