Prosecution Insights
Last updated: August 17, 2026
Application No. 18/767,418

LATERAL BIPOLAR TRANSISTORS

Non-Final OA §DP
Filed
Jul 09, 2024
Priority
Jul 25, 2022 — continuation of 12/074,211
Examiner
GHEYAS, SYED I
Art Unit
Tech Center
Assignee
Globalfoundries U S Inc.
OA Round
1 (Non-Final)
82%
Grant Probability
Favorable
1-2
OA Rounds
0m
Est. Remaining
86%
With Interview

Examiner Intelligence

Grants 82% — above average
82%
Career Allowance Rate
560 granted / 679 resolved
+22.5% vs TC avg
Minimal +4% lift
Without
With
+3.9%
Interview Lift
resolved cases with interview
Fast prosecutor
2y 0m
Avg Prosecution
42 currently pending
Career history
701
Total Applications
across all art units

Statute-Specific Performance

§101
0.5%
-39.5% vs TC avg
§103
55.5%
+15.5% vs TC avg
§102
27.0%
-13.0% vs TC avg
§112
11.6%
-28.4% vs TC avg
Black line = Tech Center average estimate • Based on career data from 679 resolved cases

Office Action

§DP
Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Information Disclosure Statement The information disclosure statement (IDS) submitted on July 9, 2024 was in compliance with the provisions of 37 CFR 1.97. Accordingly, the information disclosure statement is being considered by the examiner. Double Patenting The nonstatutory double patenting rejection is based on a judicially created doctrine grounded in public policy (a policy reflected in the statute) so as to prevent the unjustified or improper timewise extension of the “right to exclude” granted by a patent and to prevent possible harassment by multiple assignees. A nonstatutory double patenting rejection is appropriate where the claims at issue are not identical, but at least one examined application claim is not patentably distinct from the reference claim(s) because the examined application claim is either anticipated by, or would have been obvious over, the reference claim(s). See, e.g., In re Berg, 140 F.3d 1428, 46 USPQ2d 1226 (Fed. Cir. 1998); In re Goodman, 11 F.3d 1046, 29 USPQ2d 2010 (Fed. Cir. 1993); In re Longi, 759 F.2d 887, 225 USPQ 645 (Fed. Cir. 1985); In re Van Ornum, 686 F.2d 937, 214 USPQ 761 (CCPA 1982); In re Vogel, 422 F.2d 438, 164 USPQ 619 (CCPA 1970); and In re Thorington, 418 F.2d 528, 163 USPQ 644 (CCPA 1969). A timely filed terminal disclaimer in compliance with 37 CFR 1.321(c) or 1.321(d) may be used to overcome an actual or provisional rejection based on a nonstatutory double patenting ground provided the reference application or patent either is shown to be commonly owned with this application, or claims an invention made as a result of activities undertaken within the scope of a joint research agreement. A terminal disclaimer must be signed in compliance with 37 CFR 1.321(b). The USPTO internet Web site contains terminal disclaimer forms which may be used. Please visit http://www.uspto.gov/forms/. The filing date of the application will determine what form should be used. A web-based e-Terminal Disclaimer may be filled out completely online using web-screens. An e-Terminal Disclaimer that meets all requirements is auto-processed and approved immediately upon submission. For more information about e-Terminal Disclaimers, refer to http://www.uspto.gov/patents/process/file/efs/guidance/eTD-info-I.jsp. Claims 1-20 are rejected on the ground of nonstatutory double patenting as being unpatentable over claims 1-20 of Patent No. US 12,074,211 B2. Although the claims at issue are not identical, they are not patentably distinct from each other. Conclusion The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. Yang et al. (Pub. No.: US 2010/0289058 A1) – this prior art teaches some of the limitations recited by the independent claims of the instant application except that it does not teach a shallow trench isolation structure overlapping the base contact region and separating the base contact region from the emitter and the collector (Fig. 2) Lin et al. (Pub. No.: US 2015/0097265 A1) – this prior art teaches some of the limitations recited by the independent claims of the instant application except that it does not teach a shallow trench isolation structure overlapping the base contact region and separating the base contact region from the emitter and the collector (Fig. 1) Any inquiry concerning this communication or earlier communications from the examiner should be directed to SYED I GHEYAS whose telephone number is (571)272-0592. The examiner can normally be reached on Monday-Friday from 8:30 AM - 5:30 PM EST. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Britt Hanley, can be reached at telephone number (571)270-3042. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of an application may be obtained from the Patent Application Information Retrieval (PAIR) system. Status information for published applications may be obtained from either Private PAIR or Public PAIR. Status information for unpublished applications is available through Private PAIR only. For more information about the PAIR system, see http://portal.uspto.gov/external/portal. Should you have questions about access to the Private PAIR system, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. 07/10/2026 /SYED I GHEYAS/ Primary Examiner, Art Unit 2893
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Prosecution Timeline

Jul 09, 2024
Application Filed
Jul 15, 2026
Non-Final Rejection mailed — §DP (current)

Precedent Cases

Applications granted by this same examiner with similar technology

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STRUCTURES AND METHODS FOR REDUCING THERMAL EXPANSION MISMATCH DURING INTEGRATED CIRCUIT PACKAGING
3y 4m to grant Granted Aug 11, 2026
Patent 12701766
REPLACEMENT SIDEWALL SPACERS
4y 3m to grant Granted Aug 04, 2026
Patent 12696518
SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME
3y 0m to grant Granted Jul 28, 2026
Patent 12696642
DISPLAY PANEL
2y 9m to grant Granted Jul 28, 2026
Patent 12696757
ANTIFUSE AND RESISTOR
2y 10m to grant Granted Jul 28, 2026
Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

1-2
Expected OA Rounds
82%
Grant Probability
86%
With Interview (+3.9%)
2y 0m (~0m remaining)
Median Time to Grant
Low
PTA Risk
Based on 679 resolved cases by this examiner. Grant probability derived from career allowance rate.

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