DETAILED ACTION
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Double Patenting
The nonstatutory double patenting rejection is based on a judicially created doctrine grounded in public policy (a policy reflected in the statute) so as to prevent the unjustified or improper timewise extension of the “right to exclude” granted by a patent and to prevent possible harassment by multiple assignees. A nonstatutory double patenting rejection is appropriate where the conflicting claims are not identical, but at least one examined application claim is not patentably distinct from the reference claim(s) because the examined application claim is either anticipated by, or would have been obvious over, the reference claim(s). See, e.g., In re Berg, 140 F.3d 1428, 46 USPQ2d 1226 (Fed. Cir. 1998); In re Goodman, 11 F.3d 1046, 29 USPQ2d 2010 (Fed. Cir. 1993); In re Longi, 759 F.2d 887, 225 USPQ 645 (Fed. Cir. 1985); In re Van Ornum, 686 F.2d 937, 214 USPQ 761 (CCPA 1982); In re Vogel, 422 F.2d 438, 164 USPQ 619 (CCPA 1970); In re Thorington, 418 F.2d 528, 163 USPQ 644 (CCPA 1969).
A timely filed terminal disclaimer in compliance with 37 CFR 1.321(c) or 1.321(d) may be used to overcome an actual or provisional rejection based on nonstatutory double patenting provided the reference application or patent either is shown to be commonly owned with the examined application, or claims an invention made as a result of activities undertaken within the scope of a joint research agreement. See MPEP § 717.02 for applications subject to examination under the first inventor to file provisions of the AIA as explained in MPEP § 2159. See MPEP § 2146 et seq. for applications not subject to examination under the first inventor to file provisions of the AIA . A terminal disclaimer must be signed in compliance with 37 CFR 1.321(b).
The filing of a terminal disclaimer by itself is not a complete reply to a nonstatutory double patenting (NSDP) rejection. A complete reply requires that the terminal disclaimer be accompanied by a reply requesting reconsideration of the prior Office action. Even where the NSDP rejection is provisional the reply must be complete. See MPEP § 804, subsection I.B.1. For a reply to a non-final Office action, see 37 CFR 1.111(a). For a reply to final Office action, see 37 CFR 1.113(c). A request for reconsideration while not provided for in 37 CFR 1.113(c) may be filed after final for consideration. See MPEP §§ 706.07(e) and 714.13.
The USPTO Internet website contains terminal disclaimer forms which may be used. Please visit www.uspto.gov/patent/patents-forms. The actual filing date of the application in which the form is filed determines what form (e.g., PTO/SB/25, PTO/SB/26, PTO/AIA /25, or PTO/AIA /26) should be used. A web-based eTerminal Disclaimer may be filled out completely online using web-screens. An eTerminal Disclaimer that meets all requirements is auto-processed and approved immediately upon submission. For more information about eTerminal Disclaimers, refer to www.uspto.gov/patents/apply/applying-online/eterminal-disclaimer.
Claims 1-20 are rejected on the ground of nonstatutory double patenting as being unpatentable over claims 1-20 of U.S. Patent No. 12, 132, 091. Although the claims at issue are not identical, they are not patentably distinct from each other because claims 1-20 of the present Applications are anticipated by claims 1-20 of U.S. Patent No. 12, 132, 091.
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 1-20 is/are rejected under 35 U.S.C. 103 as being unpatentable over Cheng (US 2020/0118891) in view of Bao (US 2020/0043808) and Lee (US 2018/0342596).
Regarding claim 1, Cheng discloses a semiconductor structure, comprising: a fin structure (Fig.8B, numeral 102) on a substrate (104); nano-sheet layers (108) disposed above the fin structure, wherein the nano-sheet layers are spaced-apart; and a gate structure (Fig.8C, numeral 802) on the fin structure (102) and surrounding the nano-sheet layers (108), wherein the gate structure comprises: a dielectric stack (804) wrapped around the nano-sheet layers (108); a work- function stack wrapped around the dielectric stack ([0074]); a metal layer (802) formed around the work function layer and between each of the nano-sheet layers ([0075]).
Cheng does not disclose (1) that the work function stack is a p-type and an n-type work function layer in contact with the p- type work function stack and wrapped around the nano-sheet layers and that metal layer is formed around the n-type work function layer; (2) that n-type work function layer is aluminum-free.
Regarding element (1), Bao however discloses that the work function stack is a p-type (Fig.5, numeral 512; [0032]); and an n-type work function layer (502) ([0032]) in contact with the p- type work function stack (512) and wrapped around the nano-sheet layers (108a)-(108c) and that metal layer is formed around the n-type work function layer ([0004].
It would have been therefore obvious to one of ordinary skill in the art at the time the invention was filed to modify Bao with Cheng to have the work function stack is a p-type and an n-type work function layer in contact with the p- type work function stack and wrapped around the nano-sheet layers and that metal layer is formed around the n-type work function layer for the purpose of modifying the outer work function metal so as to cause an outer threshold voltage of an outer channel to be within a predefined amount of an inner threshold voltage of an inner channel in the at least one stack. (Bao, [0007]).
Regarding element (2), Lee discloses that n-type work function layer is aluminum free ([0039]; note: NiSi and CoSi).
It would have been therefore obvious to one of ordinary skill in the art at the time the invention was file to modify Bai with Lee to have n-type work function layer as aluminum free for the purpose of achieving a desired work function (Lee, [0039])).
Regarding claim 9, Cheng discloses a semiconductor structure, comprising: a nano-sheet channel portion (Fig.8b, numeral 108) disposed between two source/drain stacks (402), wherein the nano-sheet channel portion comprises a plurality of nano-sheet layers (108); a dielectric layer (804)wrapped around each of the plurality of nano-sheet layers (108); a work function layer wrapped around the dielectric layer ([0074]); and a metal fill (802) between two of the plurality of nano-sheet layers (108)
Cheng does not disclose (1) that the work function layer is a p-type and an n-type work function layer in contact with the p- type work function stack and wrapped around the plurality of nano-sheet layers; (2) that n-type work function layer is aluminum-free.
Regarding element (1), Bao however discloses that the work function layer is a p-type (Fig.5, numeral 512; [0032]); and an n-type work function layer (502) ([0032]) in contact with the p- type work function layer (512) and wrapped around the nano-sheet layers (108a)-(108c).
It would have been therefore obvious to one of ordinary skill in the art at the time the invention was filed to modify Bao with Cheng to have the work function layer is a p-type and an n-type work function layer in contact with the p- type work function layer and wrapped around the nano-sheet layers for the purpose of modifying the outer work function metal so as to cause an outer threshold voltage of an outer channel to be within a predefined amount of an inner threshold voltage of an inner channel in the at least one stack. (Bao, [0007]).
Regarding element (2), Lee discloses that n-type work function layer is aluminum free ([0039]; note: NiSi and CoSi).
It would have been therefore obvious to one of ordinary skill in the art at the time the invention was file to modify Bai with Lee to have n-type work function layer as aluminum free for the purpose of achieving a desired work function (Lee, [0039])).
Regarding claim 15, Cheng discloses a semiconductor device, comprising: source/drain regions (Fig.8B, numeral 402) on a fin structure (104); a channel portion (108) above the film structure and between the source/drain regions (402), wherein the channel portion comprises nano-sheet layers (108) in contact with the source/drain regions (402); and a gate stack between the source/darin regions, wherein the gate stack comprises a dielectric layer (Fig.8B, numeral 804) wraps around each of the nano-sheet layers (108); a work function layer wrapped around the dielectric layer ([0074]); and a metal fill (802) between two of the nano-sheet layers (108).
Cheng does not disclose (1) that the work function layer is a p-type and an n-type work function layer in contact with the p- type work function stack and wrapped around the plurality of nano-sheet layers; (2) that n-type work function layer is aluminum-free.
Regarding element (1), Bao however discloses that the work function layer is a p-type (Fig.5, numeral 512; [0032]); and an n-type work function layer (502) ([0032]) in contact with the p- type work function layer (512) and wrapped around the nano-sheet layers (108a)-(108c).
It would have been therefore obvious to one of ordinary skill in the art at the time the invention was filed to modify Bao with Cheng to have the work function layer is a p-type and an n-type work function layer in contact with the p- type work function layer and wrapped around the nano-sheet layers for the purpose of modifying the outer work function metal so as to cause an outer threshold voltage of an outer channel to be within a predefined amount of an inner threshold voltage of an inner channel in the at least one stack (Bao, [0007]).
Regarding claim 2, Cheng discloses an insulating layer (604) surrounding the gate structure; and a spacer (Fig.8B, numeral 302) interposed between the gate structure (802) and the insulating layer, wherein the spacer (302) surrounds a portion of the nano-sheet layers (108).
Regarding claim 3, Boa discloses wherein the p-type work function stack (512) comprises one p-type work function layers ([0037]).
Regarding claims 4 ,10, and 16, Lee discloses wherein the aluminum-free n- type work function layer comprises a metal silicide ([0039]).
Regarding claims 5, 11, and 17, Lee discloses wherein the aluminum-free n- type work function layer comprises a cobalt silicide, or a nickel silicide ([0039]).
Regarding claims 6, 14, and 20, Cheng does not disclose wherein the aluminum-free n- type work function layer has a thickness between about 5 A and about 15 A.
Boa however discloses that the thickness of function layers affects the threshold voltage ([0040]).
It would have been therefore obvious to one of ordinary skill in the art at the time the invention was field to have that thickness of aluminum-free n-type work function layer to be in the claimed range for the purpose of optimization threshold voltage of a channel (Boa, [0040]).
Regarding claim 7, Cheng discloses wherein the nano-sheet layers comprise silicon ([0039]).
Regarding claims 8 ,13, and 19, Cheng discloses wherein a spacing between the nano- sheet layers is between about 8 nm and about 12 nm ([0040]).
Regarding claims 12 and 18, Bao discloses wherein the p-type work function layer (Fig. 5, numeral 412) comprises titanium nitride ([0032]).
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to JULIA SLUTSKER whose telephone number is (571)270-3849. The examiner can normally be reached Monday-Friday, 9 am-6 pm.
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/JULIA SLUTSKER/Primary Examiner, Art Unit 2891
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