DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claims 1, 7-8, 11-12 and 14 are rejected under 35 U.S.C. 102 (a)(1) as being anticipated by Lai (US 20230328970), hereinafter Lai.
Regarding claim 1, Lai (US 20230328970) teaches a method of manufacturing a semiconductor device, comprising:
forming an insulating layer (313 and 307 of Figure 15, which is formed from 613 of Figure 13, described in para 81 as “capping material 613” that is a “metal oxide” or “silicon oxide”) on a substrate (100);
forming a multilayer mask (701, 73, 705, 707 and 709 – see NOTE1 below) on the insulating layer (313);
etching (in Figures 15-19) the insulating layer (313 and 307, only part of 307 remains in Figure 19) with the multilayer mask; and
forming a plurality of lower electrodes (401 formed in Figure 19 as remaining part of 617 of Figure 18 – 401 is “bit line contact” – see para 83) in the insulating layer (307).
Regarding claim 7, Lai teaches the method of claim 1, further comprising: etching the multilayer mask in at least three etching operations (first etching operation is etching to get to structure of Figure 15 with opening in 709, second etching is to get from structure of Figure 15 using 709 to get to structure of Figure 16- described in para 93, third etching operation is etching structure of Figure 16 to get to structure of Figure 17 - described in para 94).
Regarding claim 8, Lai teaches the method of claim 7, further comprising: forming a plurality of contact holes (hole corresponding to 909 of Figure 17, noting that there a one such contact hole corresponding to each of plurality of lower electrodes 401 that are shown in Figure 19) in a first silicon-containing layer (any of 703, 705, 707, which are disclosed as containing silicon in para 90) of the multilayer mask (comprising 701, 703, 705, 707 and 709-see Figure 15).
Regarding claim 11, Lai teaches the method of claim 7, further comprising: forming a plurality of contact holes (hole corresponding to 909 of Figure 17, noting that there a one such contact hole corresponding to each of plurality of lower electrodes 401 that are shown in Figure 19) in a first silicon-containing layer and a second silicon-containing layer (any two of 703, 705, 707, which are disclosed as containing silicon in para 90) of the multilayer mask (comprising 701, 703, 705, 707 and 709-see Figure 15).
Regarding claim 12, Lai teaches the method of claim 11, wherein a lateral surface of the first silicon-containing layer (703) is substantially aligned with a lateral surface of the second silicon-containing layer (705).
Regarding claim 14, Lai teaches the method of claim 1, further comprising: performing a surface treatment {such as "planarization process" of Figure 19 - see para 96, which planarizes the surface leading to forming of lower electrode 401 of Figure 19) before forming the plurality of lower electrodes (401).
Allowable Subject Matter
Claims 2-6, 9-10 and 13 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. The following is a statement of reasons for the indication of allowable subject matter:
Claims 2-6 are allowable because the prior art of record does not teach or suggest, singularly or in combination, at least the limitations of base claim 2 that requires “the multilayer mask includes a first silicon-containing layer, a second silicon-containing layer, and a metal-containing layer disposed between the first silicon-containing layer and the second silicon-containing layer”.
Claims 9-10 are allowable because the prior art of record does not teach or suggest, singularly or in combination, at least the limitations of base claim 9 that requires “a metal-containing layer of the multilayer mask is exposed through the plurality of contact holes”.
Claims 13 is allowable because the prior art of record does not teach or suggest, singularly or in combination, at least the limitations “multilayer mask includes a metal-containing layer disposed between the first silicon-containing layer and the second silicon-containing layer, wherein the metal-containing layer is configured to support the multilayer mask”.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to AJAY ARORA whose telephone number is (571)272-8347. The examiner can normally be reached 9 AM - 5 PM.
Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Drew Richards can be reached at 5712721736. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000.
/AJAY ARORA/Primary Examiner, Art Unit 2892
Prosecution Insights