DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claims 18 and 20 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Huang (US Pub. 2018/0151439).
Regarding Claim 18, Huang discloses a device comprising: a first fin-group (first and second fins 111i, 111o from left side) and a second fin-group (first and second fins 111i, 111o from right side) (see fig. 4A), each comprising a plurality of semiconductor fins (111i, 111o) (page 2, paragraph 13); fin spacers (121a, 121b, 121c) on sidewalls of the plurality of semiconductor fins (111i, 111o) (page 4, paragraph 32) in the first fin-group (left side fins); a first epitaxy region (125, 129) (page 6, paragraph 53) over and contacting the first fin-group (left side fins) to form interfaces with the plurality of semiconductor fins (111i, 111o) (see fig. 4A), wherein topmost points of the interfaces are higher than topmost ends of the fin spacers (121a, 121b, 121c) (see fig. 4A); and a second epitaxy region (125, 129) over and contacting the second fin-group (right side fins) (see fig. 4A).
Regarding Claim 20, Huang discloses further comprising: a source/drain contact plug 181’ (page 8, paragraph 76) electrically connecting the first epitaxy region (125, 129) (epitaxy regions formed over the first and second fins 111i, 111o from left side) to the second epitaxy region (125, 129) (epitaxy regions formed over the first and second fins 111i, 111o from right side) (see fig. 8A).
Allowable Subject Matter
Claim 19 is objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
The following is a statement of reasons for the indication of allowable subject matter:
Claim 19 recites the fin spacers comprise: a first outer fin spacer facing toward the second fin-group, wherein the first outer fin spacer has a first height; a second outer fin spacer facing away from the second fin-group, wherein the second outer fin spacer has a second height greater than the first height.
These features in combination with the other elements of the base claim are neither disclosed nor suggested by the prior art of record.
Claims 1-17 are allowed.
The following is an examiner’s statement of reasons for allowance:
Claim 1 recites first portions having first top surfaces; and second portions having second top surfaces that are lower than the first top surfaces and higher than the dielectric isolation regions; a second fin-group comprising a fourth semiconductor fin, wherein inner-fin spacings in the first fin-group are smaller than an inter-fin spacing that separates the first fin-group from the second fin-group; and an epitaxy region contacting: an outer sidewall of the third semiconductor fin to form a first vertical interface; and an inner sidewall of the third semiconductor fin to form a second vertical interface, wherein the first vertical interface is shorter than the second vertical interface.
Claim 13 recites each of the first fin-group and the second fin-group comprises a plurality of semiconductor fins having inner-group spacings, and wherein the first fin-group and the second fin-group are spaced apart from each other by an inter-group spacing greater than the inner-group spacings; the epitaxy region contacting the second semiconductor fin to form: a first vertical interface; and a second vertical interface, wherein the second vertical interface is between the first vertical interface and the first semiconductor fin, and wherein a first bottom end of the first vertical interface is higher than a second bottom end of the second vertical interface.
These features in combination with the other elements of the claim are neither disclosed nor suggested by the prior art of record.
Claims 2-12 and 14-17 variously depend from claim 1 or 13, so they are allowed for the same reason.
Conclusion
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/CHEUNG LEE/Primary Examiner, Art Unit 2812 August 21, 2026
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