Prosecution Insights
Last updated: October 01, 2026
Application No. 18/770,372

Gate Isolation for Multigate Device

Non-Final OA §102§DOUBLEPATENT
Filed
Jul 11, 2024
Priority
Mar 30, 2021 — provisional 63/167,899 +1 more
Examiner
NGUYEN, NIKI HOANG
Art Unit
Tech Center
Assignee
Taiwan Semiconductor Manufacturing Company, Ltd.
OA Round
1 (Non-Final)
91%
Grant Probability
Favorable
1-2
OA Rounds
0m
Est. Remaining
96%
With Interview

Examiner Intelligence

Grants 91% — above average
91%
Career Allowance Rate
862 granted / 948 resolved
+30.9% vs TC avg
Moderate +5% lift
Without
With
+5.1%
Interview Lift
resolved cases with interview
Fast prosecutor
2y 1m
Avg Prosecution
15 currently pending
Career history
956
Total Applications
across all art units

Statute-Specific Performance

§101
1.1%
-38.9% vs TC avg
§103
41.8%
+1.8% vs TC avg
§102
34.7%
-5.3% vs TC avg
§112
11.0%
-29.0% vs TC avg
Black line = Tech Center average estimate • Based on career data from 948 resolved cases

Office Action

§102 §DOUBLEPATENT
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Information Disclosure Statement The information disclosure statement (IDS) submitted on 07/11/2024 and 02/25/2026 have been considered by the examiner. Specification The lengthy specification has not been checked to the extent necessary to determine the presence of all possible minor errors. Applicant’s cooperation is requested in correcting any errors of which applicant may become aware in the specification. Double Patenting The nonstatutory double patenting rejection is based on a judicially created doctrine grounded in public policy (a policy reflected in the statute) so as to prevent the unjustified or improper timewise extension of the “right to exclude” granted by a patent and to prevent possible harassment by multiple assignees. A nonstatutory double patenting rejection is appropriate where the conflicting claims are not identical, but at least one examined application claim is not patentably distinct from the reference claim(s) because the examined application claim is either anticipated by, or would have been obvious over, the reference claim(s). See, e.g., In re Berg, 140 F.3d 1428, 46 USPQ2d 1226 (Fed. Cir. 1998); In re Goodman, 11 F.3d 1046, 29 USPQ2d 2010 (Fed. Cir. 1993); In re Longi, 759 F.2d 887, 225 USPQ 645 (Fed. Cir. 1985); In re Van Ornum, 686 F.2d 937, 214 USPQ 761 (CCPA 1982); In re Vogel, 422 F.2d 438, 164 USPQ 619 (CCPA 1970); In re Thorington, 418 F.2d 528, 163 USPQ 644 (CCPA 1969). A timely filed terminal disclaimer in compliance with 37 CFR 1.321(c) or 1.321(d) may be used to overcome an actual or provisional rejection based on nonstatutory double patenting provided the reference application or patent either is shown to be commonly owned with the examined application, or claims an invention made as a result of activities undertaken within the scope of a joint research agreement. See MPEP § 717.02 for applications subject to examination under the first inventor to file provisions of the AIA as explained in MPEP § 2159. See MPEP § 2146 et seq. for applications not subject to examination under the first inventor to file provisions of the AIA . A terminal disclaimer must be signed in compliance with 37 CFR 1.321(b). The filing of a terminal disclaimer by itself is not a complete reply to a nonstatutory double patenting (NSDP) rejection. A complete reply requires that the terminal disclaimer be accompanied by a reply requesting reconsideration of the prior Office action. Even where the NSDP rejection is provisional the reply must be complete. See MPEP § 804, subsection I.B.1. For a reply to a non-final Office action, see 37 CFR 1.111(a). For a reply to final Office action, see 37 CFR 1.113(c). A request for reconsideration while not provided for in 37 CFR 1.113(c) may be filed after final for consideration. See MPEP §§ 706.07(e) and 714.13. The USPTO Internet website contains terminal disclaimer forms which may be used. Please visit www.uspto.gov/patent/patents-forms. The actual filing date of the application in which the form is filed determines what form (e.g., PTO/SB/25, PTO/SB/26, PTO/AIA /25, or PTO/AIA /26) should be used. A web-based eTerminal Disclaimer may be filled out completely online using web-screens. An eTerminal Disclaimer that meets all requirements is auto-processed and approved immediately upon submission. For more information about eTerminal Disclaimers, refer to www.uspto.gov/patents/apply/applying-online/eterminal-disclaimer. Claims 1 and 7 are rejected on the ground of nonstatutory double patenting as being unpatentable over claim 1 of U.S. Patent No. 12,068,320 in view of Lee (US 20177/0148914). Regarding claim 1, US Patent teaches a device structure (see claim 1’sd preamble) comprising: a first source/drain and a second source/drain (refer to first and source/drain features of a first device and a second device); a dielectric structure (reefer to gate isolation fin) disposed between the first source/drain and the second source/drain (refer to source/drain features of the first and the second devices), wherein the dielectric structure includes: a lower portion (refer to a first dielectric feature) having a first dielectric layer and a second dielectric layer (refer to second dielectric layer and the first dielectric layer of the first dielectric feature respectively), wherein the first dielectric layer wraps the second dielectric layer (refer to second dielectric layer surrounds the first dielectric layer of the first dielectric feature), and an upper portion disposed over the lower portion, wherein the upper portion (refer to a second dielectric feature) includes a third dielectric layer and a fourth dielectric layer (refer to the third and fourth dielectric layers of the second dielectric feature respectively), wherein the third dielectric layer wraps the fourth dielectric layer. US Patent does not mention a source/drain contact connected to a first source/drain and a second source/drain; and wherein the source/drain contact is disposed over the upper portion. Lee teaches the same field of an endeavor wherein a source/drain contact (CA) connected to a first source/drain (SD1) and a second source/drain (SD2); and wherein the source/drain contact (CA) is disposed over the upper portion (206 and CS) (see fig. 5 of Lee). Thus, it would have been obvious to one having ordinary skills in the art before the invention was made to include a source/drain contact connected to a first source/drain and a second source/drain; and wherein the source/drain contact is disposed over the upper portion as taught by Lee in the teaching of US Patent in order to increase the device density by forming the source/drain contact vertically over the STI region. Regarding claim 7, US Patent and Lee teach all the limitations of claimed inventio for the same reasons as set forth above. Besides, US Patent teaches the first dielectric layer has a first dielectric constant; the second dielectric layer has a second dielectric constant; the third dielectric layer has a third dielectric constant; the fourth dielectric layer has a fourth dielectric constant; and the first dielectric constant is greater than the second dielectric constant and the fourth dielectric constant is less than the first dielectric constant (see claim 1’s feature). Claim Rejections - 35 USC § 102 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. Claims 1-3,9,10, 17, 19 and 20 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Lee (US 20170148914). Regarding claim 1, Lee teaches a device structure in fig. 5 comprising: a source/drain contact (CA) connected to a first source/drain (SD1) and a second source/drain (SD2); in a cross-sectional view along a lengthwise direction of the source/drain contact, a dielectric structure (201/ST1/206/second spacer CS) disposed between the first source/drain (SD1) and the second source/drain (SD2), wherein the dielectric structure includes: a lower portion (201 and ST1) having a first dielectric layer (201) and a second dielectric layer (ST1), wherein the first dielectric layer (201) wraps the second dielectric layer (ST1) (see fig. 5), and an upper portion (refer to second spacer CS and 206) disposed over the lower portion (201/ST1), wherein the upper portion (206 and CS) includes a third dielectric layer (206) and a fourth dielectric layer (CS), wherein the third dielectric layer (206) wraps the fourth dielectric layer (CS), and wherein the source/drain contact (CA) is disposed over the upper portion (206 and CS). PNG media_image1.png 806 799 media_image1.png Greyscale Regarding claim 2, Lee teaches all the limitations of the claimed invention for the same reasons as set forth above. Besides, Lee teaches the upper portion (206 and CS) has a first sidewall formed by the third dielectric layer (refer to sidewalls of 206), a second sidewall formed by the third dielectric layer (refer to sidewalls of CS), and a top formed by the third dielectric layer and the fourth dielectric layer (refer to upper surface of 206 and CS); and the source/drain contact (refer to CA) is disposed on the first sidewall, the second sidewall, and the top (see fig. 5). Regarding claim 3, Lee teaches all the limitations of the claimed invention for the same reasons as set forth above. Besides, fig. 5 of Lee teaches the lower portion has a first height, the upper portion has a second height, and the second height is less than the first height (see the notation below). PNG media_image1.png 806 799 media_image1.png Greyscale Regarding claim 9, Lee teaches all the limitations of the claimed invention for the same reasons as set forth above. Besides, Lee teaches a substrate isolation structure, wherein the dielectric structure is disposed on the substrate isolation structure (see par. 81). Regarding claim 10, Lee teaches all the limitations of the claimed invention for the same reasons as set forth above. Besides, Lee teaches the dielectric structure has a first width along the lengthwise direction of the source/drain contact, the substrate isolation structure has a second width along the lengthwise direction of the source/drain contact, and the second width is greater than the first width (see notation below) PNG media_image2.png 806 799 media_image2.png Greyscale Regarding claim 17, Lee teaches a method in fig. 5 comprising: forming an isolation structure (201/ST1/206/CS) that includes: a lower portion disposed on a substrate isolation structure, wherein the lower portion (201 and ST1) has a first dielectric layer and a second dielectric layer, wherein the first dielectric layer (201) wraps the second dielectric layer (ST1), and an upper portion(206 and CS) disposed over the lower portion (201 and ST1), wherein the upper portion(206 and CS) includes a third dielectric layer (206) and a fourth dielectric layer (CS), wherein the third dielectric layer (206) wraps the fourth dielectric layer (CS); after forming the isolation structure, forming a first source/drain (SD1) and a second source/drain (SD2), wherein the isolation structure is disposed between the first source/drain and the second source/drain (see par. 76); and forming a source/drain contact (CA) connected to the first source/drain and the second source/drain (SD1 and SD2), wherein the source/drain contact (CA) is disposed over the isolation structure (201/ST1/206 and CS). PNG media_image1.png 806 799 media_image1.png Greyscale Regarding claim 19, Lee teaches all the limitations of the claimed invention for the same reasons as set forth above. Besides, Lee the upper portion of the isolation structure has a first height; and the first height is reduced to a second height when forming the first source/drain and the second source/drain (see notation above in claim 17). Regarding claim 20, Lee teaches all the limitations of the claimed invention for the same reasons as set forth above. Besides, Lee teaches the isolation structure has a first width; and the substrate isolation structure has a second width that is greater than the first width. PNG media_image2.png 806 799 media_image2.png Greyscale Allowable Subject Matter Claim 4 is objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims, since the prior art of record and considered pertinent to the applicant’s disclosure does not teach or suggest “in a cross-sectional view along a widthwise direction of the source/drain contact: the upper portion further includes a fifth dielectric layer, wherein the fourth dielectric layer is disposed between the fifth dielectric layer and the third dielectric layer; and the source/drain contact extends through the fifth dielectric layer and into the fourth dielectric layer, wherein the fourth dielectric layer wraps an end of the source/drain contact.” Claims 5-6 includes all the limitations of claim 4. Claim 8 is objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims, since the prior art of record and considered pertinent to the applicant’s disclosure does not teach or suggest “in a cross-sectional view along a widthwise direction of the source/drain contact, the source/drain contact is disposed between a first gate stack and a second gate stack, wherein the fourth dielectric layer extends from the first gate stack to the source/drain contact and from the second gate stack to the source/drain contact.” Claim 18 is objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims, since the prior art of record and considered pertinent to the applicant’s disclosure does not teach or suggest “the isolation structure further includes a fifth dielectric layer disposed over the fourth dielectric layer, wherein a portion of the fifth dielectric layer is removed when forming the first source/drain and the second source/drain.” Claims 11-16 are allowed for the following reasons: Regarding claim 11, the prior art of record alone or in combination neither teaches nor makes obvious the invention of a device structure comprising: “the isolation structure includes: a lower portion that includes an oxide core and a silicon-comprising dielectric liner, wherein the silicon-comprising dielectric liner is between the oxide core and the first source/drain and the silicon-comprising dielectric liner is between the oxide core and the second source/drain, and an upper portion disposed over the lower portion, wherein the upper portion includes a silicon-comprising dielectric core and a metal-comprising dielectric liner, wherein the metal-comprising dielectric liner is between the silicon-comprising dielectric core and the first source/drain, the metal-comprising dielectric liner is between the silicon-comprising dielectric core and the second source/drain, and the metal-comprising dielectric liner is between the silicon-comprising dielectric core and the lower portion, and wherein the source/drain contact is disposed over the upper portion” in combination of all of the limitations of claim 11. Claims 12-16 include all of the limitations of claim 11. Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to Niki Tram Nguyen whose telephone number is (571) 272-5526. The examiner can normally be reached on 6:00am-4:00pm. If attempts to reach the examiner by telephone are unsuccessful, the examiner's supervisor, Steven Loke can be reached on (703)872-9306. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of an application may be obtained from the Patent Application Information Retrieval (PAIR) system. Status information for published applications may be obtained from either Private PAIR or Public PAIR. Status information for unpublished applications is available through Private PAIR only. For more information about the PAIR system, see http://pair-direct.uspto.gov. Should you have questions on access to the Private PAIR system, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative or access to the automated information system, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /NIKI H NGUYEN/ Primary Examiner, Art Unit 2818
Read full office action

Prosecution Timeline

Jul 11, 2024
Application Filed
Aug 26, 2026
Non-Final Rejection mailed — §102, §DOUBLEPATENT (current)

Precedent Cases

Applications granted by this same examiner with similar technology

Patent 12751323
DIRECT BONDING METHODS AND STRUCTURES
3y 6m to grant Granted Sep 29, 2026
Patent 12751293
PACKAGE STRUCTURE WITH TRANSMISSION LINE AND METHOD FOR MANUFACTURING THE SAME
3y 3m to grant Granted Sep 29, 2026
Patent 12751330
SEMICONDUCTOR PACKAGE
3y 2m to grant Granted Sep 29, 2026
Patent 12740185
METHOD FOR MANUFACTURING LIGHT-EMITTING DEVICE
2y 11m to grant Granted Sep 15, 2026
Patent 12740074
SEMICONDUCTOR DEVICE
2y 6m to grant Granted Sep 15, 2026
Study what changed to get past this examiner. Based on 5 most recent grants.

Strategy Recommendation AI-generated — please review before filing

Get a prosecution strategy drawn from examiner precedents, rejection analysis, and claim mapping.
Typically takes 5-10 seconds — AI-generated, attorney review required before filing

Prosecution Projections

1-2
Expected OA Rounds
91%
Grant Probability
96%
With Interview (+5.1%)
2y 1m (~0m remaining)
Median Time to Grant
Low
PTA Risk
Based on 948 resolved cases by this examiner. Grant probability derived from career allowance rate.

Sign in with your work email

Enter your email to receive a magic link. No password needed.

Personal email addresses (Gmail, Yahoo, etc.) are not accepted.

Free tier: 3 strategy analyses per month