Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
Priority
Receipt is acknowledged of certified copies of papers required by 37 CFR 1.55.
Information Disclosure Statement
The information disclosure statement (IDS) submitted on 08/20/2024 and 08/04/2025 have been considered by the examiner.
Oath/Declaration
Oath/Declaration as file 07/12/2024 is noted by the Examiner.
Title Objection
The title of the invention is not descriptive. A new title is required that is clearly indicative of the invention to which the claims are directed.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
Claim(s) 1-22 are rejected under 35 U.S.C. 103 as being unpatentable over Sasajima US 2010/0176835 (Provided by Applicant; Hereinafter Sasajima) in view of Masuda KR 10-2013-0042225 (Provided by Applicant; Hereinafter Masuda).
Regarding claim 1, Sasajima teaches a testing apparatus (Figs. 1, 2), comprising:
a driver (Figs. 1, 2; [0011]; main driving section; 32) connected electrically to a device under test (Figs. 1, 2; DUT; 200) and arranged to provide a test signal (Figs. 1, 2; [0033]; test signal) to the device under test (Figs. 1, 2; [0033]; main driving section, DUT; 32, 200); and
a test signal providing section (Figs. 1, 2; test signal generating section; 12) arranged to provide the test signal to the driver (Figs. 1, 2; main driving section; 32), wherein
the driver (Figs. 1, 2; main driving section; 32) is closer than the test signal providing section (Figs. 1, 2; test signal generating section; 12) to the device under test (Figs. 1, 2; DUT; 200).
Sasajima does not specifically teach a bandwidth of communication between the driver and the test signal providing section is broader than a bandwidth of communication between the driver and the device under test.
However, Masuda does teach a bandwidth of communication (Fig. 1; Pages 6-8) between the driver (Fig. 1; Pages 6-8) and the test signal providing section (Fig. 1; Pages 6-8; test signal generator; 112) is broader than a bandwidth of communication between the driver (Fig. 1; Pages 6-8) and the device under test (Fig. 1; Pages 6-8; device under test; 10).
It would have been obvious before the effective filing date of the claimed invention to modify the test apparatus and transmission apparatus of Sasajima by implementing the teachings of Masuda regarding a bandwidth of communication between the driver and the test signal providing section is broader than a bandwidth of communication between the driver and the device under test; in order to “ process signals including the generation of test signals and optical signal conversion to prevent testing costs from increasing due to the decline of a processing rate caused by using additional measuring devices when testing a device comprising an optical interface” (See Masuda; Abstract).
Regarding claim 2, the combination of Sasajima and Masuda teaches the testing apparatus according to claim 1, wherein Masuda does teach wherein the driver (Fig. 1; Pages 6-8) and the test signal providing section (Fig. 1; Pages 6-8; test signal generator; 112) employ optical transmission therebetween (Fig. 1; Pages 6-8).
Regarding claim 3, the combination of Sasajima and Masuda teaches the testing apparatus according to claim 2, wherein Masuda further teaches wherein the driver and the test signal providing section are connected through an optical transmission path (Fig. 1; Pages 6-8).
Regarding claim 4, the combination of Sasajima and Masuda teaches the testing apparatus according to claim 1, wherein Masuda further teaches wherein the driver and the test signal providing section employ wireless transmission therebetween (Fig. 1; Pages 6-8).
Regarding claim 5, the combination of Sasajima and Masuda teaches the testing apparatus according to claim 1, wherein Masuda further teaches further comprising a switch (Fig. 1; Pages 6-8; first optical switch unit; 140) arranged to switch whether the device under test and the driver are connected (Fig. 1; Pages 6-8; first optical switch unit; 140), wherein the switch is closer than the test signal providing section to the device under test (Fig. 1; Pages 6-8; first optical switch unit; 140).
Regarding claim 6, the combination of Sasajima and Masuda teaches the testing apparatus according to claim 5, wherein Masuda further teaches wherein the switch connects the device under test and a direct-current measuring unit arranged to conduct a direct-current test on the device under test (Fig. 1; Pages 6-8; first optical switch unit; 140).
Regarding claim 7, the combination of Sasajima and Masuda teaches the testing apparatus according to claim 1, wherein Sasajima further teaches further comprising a receiver (Figs. 1, 2; [0040, 0044]; comparing sections; 42, 50) arranged to receive an output signal (Figs. 1, 2; [0040, 0044]) from the device under test (Figs. 1, 2; DUT; 200) and provide an output based on the output signal (Figs. 1, 2; [0040, 0044]; comparing sections, DUT; 42, 50, 200), wherein the driver (Figs. 1, 2; [0011]; main driving section; 32) is closer than the receiver (Figs. 1, 2; [0040, 0044]; comparing sections; 42, 50) to the device under test (Figs. 1, 2; DUT; 200).
Sasjima does not specifically teach a bandwidth of communication between the receiver and the device under test is broader than the bandwidth of communication between the driver and the device under test.
However, Masuda does teach a bandwidth of communication between the receiver and the device under test is broader than the bandwidth of communication between the driver and the device under test (Fig. 1; Pages 6-8).
It would have been obvious before the effective filing date of the claimed invention to modify the test apparatus and transmission apparatus of Sasajima by implementing the teachings of Masuda regarding a bandwidth of communication between the receiver and the device under test is broader than the bandwidth of communication between the driver and the device under test; in order to “ process signals including the generation of test signals and optical signal conversion to prevent testing costs from increasing due to the decline of a processing rate caused by using additional measuring devices when testing a device comprising an optical interface” (See Masuda; Abstract).
Regarding claim 8, the combination of Sasajima and Masuda teaches the testing apparatus according to claim 1, wherein Sasajima further teaches wherein the device under test (Figs. 1, 2; DUT; 200) and the driver (Figs. 1, 2; [0011]; main driving section; 32) are on a same substrate (Fig. 2).
Regarding claim 9, the combination of Sasajima and Masuda teaches the testing apparatus according to claim 1, wherein Sasajima further teaches wherein the device under test (Figs. 1, 2; DUT; 200) and the driver (Figs. 1, 2; [0011]; main driving section; 32) are, respectively, on separate substrates (Fig. 2).
Regarding claim 10, the combination of Sasajima and Masuda teaches the testing apparatus according to claim 9, wherein Sasajima further teaches wherein the substrate on which is the device under test is at a position higher than that of the substrate on which is the driver (Fig. 2).
Regarding claim 11, Sasajima teaches a testing apparatus (Figs. 1, 2), comprising:
a receiver (Figs. 1, 2; [0040, 0044]; comparing sections; 42, 50) connected electrically to a device under test (Figs. 1, 2; DUT; 200) and arranged to receive an output signal (Figs. 1, 2; [0040, 0044]) from the device under test and provide an output based on the output signal (Figs. 1, 2; [0040, 0044]; comparing sections, DUT; 42, 50, 200); and
a signal under test receiving section (Figs. 1, 2; [0029]; judging section; 16) arranged to receive the output from the receiver (Figs. 1, 2; [0040, 0044]; comparing sections; 42, 50), wherein
the receiver (Figs. 1, 2; [0040, 0044]; comparing sections; 42, 50) is closer than the signal under test receiving section (Figs. 1, 2; [0029]; judging section; 16) to the device under test (Figs. 1, 2; DUT; 200).
Sasajima does not specifically teach a bandwidth of communication between the receiver and the signal under test receiving section is broader than a bandwidth of communication between the receiver and the device under test.
However, Masuda does teach a bandwidth of communication (Fig. 1; Pages 6-8) between the receiver (Fig. 1; Pages 6-8) and the signal under test receiving section (Fig. 1; Pages 6-8; signal receiving unit; 112) is broader than a bandwidth of communication between the receiver (Fig. 1; Pages 6-8) and the device under test (Fig. 1; Pages 6-8; device under test; 10).
It would have been obvious before the effective filing date of the claimed invention to modify the test apparatus and transmission apparatus of Sasajima by implementing the teachings of Masuda regarding a bandwidth of communication between the receiver and the signal under test receiving section is broader than a bandwidth of communication between the receiver and the device under test; in order to “ process signals including the generation of test signals and optical signal conversion to prevent testing costs from increasing due to the decline of a processing rate caused by using additional measuring devices when testing a device comprising an optical interface” (See Masuda; Abstract).
Regarding claim 12, the combination of Sasajima and Masuda teaches the testing apparatus according to claim 11, wherein Masuda further teaches wherein the receiver (Fig. 1; Pages 6-8) and the signal under test receiving section Fig. 1; Pages 6-8; signal receiving unit; 112) employ optical transmission therebetween (Fig. 1; Pages 6-8).
Regarding claim 13, the combination of Sasajima and Masuda teaches the testing apparatus according to claim 12, wherein Masuda further teaches wherein the receiver and the signal under test receiving section are connected through an optical transmission path (Fig. 1; Pages 6-8).
Regarding claim 14, the combination of Sasajima and Masuda teaches the testing apparatus according to claim 11, wherein Masuda further teaches wherein the receiver and the signal under test receiving section employ wireless transmission therebetween (Fig. 1; Pages 6-8).
Regarding claim 15, the combination of Sasajima and Masuda teaches the testing apparatus according to claim 11, wherein Masuda further teaches further comprising a switch (Fig. 1; Pages 6-8; first optical switch unit; 140) arranged to switch whether the device under test and the receiver are connected (Fig. 1; Pages 6-8; first optical switch unit; 140), wherein the switch is closer than the signal under test receiving section to the device under test (Fig. 1; Pages 6-8; first optical switch unit; 140).
Regarding claim 16, the combination of Sasajima and Masuda teaches the testing apparatus according to claim 15, wherein Masuda further teaches wherein the switch connects the device under test and a direct-current measuring unit arranged to conduct a direct-current test on the device under test (Fig. 1; Pages 6-8; first optical switch unit; 140).
Regarding claim 17, the combination of Sasajima and Masuda teaches the testing apparatus according to claim 11, wherein Sasajima further teaches further comprising a driver (Figs. 1, 2; [0011]; main driving section; 32) arranged to provide a test signal (Figs. 1, 2; [0033]; test signal) to the device under test (Figs. 1, 2; DUT; 200), wherein the receiver (Figs. 1, 2; [0040, 0044]; comparing sections; 42, 50) is closer than the driver (Figs. 1, 2; [0011]; main driving section; 32) to the device under test (Figs. 1, 2; DUT; 200).
Sasajima does not specifically teach a bandwidth of communication between the driver and the device under test is broader than the bandwidth of communication between the receiver and the device under test.
However, Masuda does teach a bandwidth of communication between the driver and the device under test is broader than the bandwidth of communication between the receiver and the device under test (Fig. 1; Pages 6-8).
It would have been obvious before the effective filing date of the claimed invention to modify the test apparatus and transmission apparatus of Sasajima by implementing the teachings of Masuda regarding a bandwidth of communication between the driver and the device under test is broader than the bandwidth of communication between the receiver and the device under test; in order to “ process signals including the generation of test signals and optical signal conversion to prevent testing costs from increasing due to the decline of a processing rate caused by using additional measuring devices when testing a device comprising an optical interface” (See Masuda; Abstract).
Regarding claim 18, the combination of Sasajima and Masuda teaches the testing apparatus according to claim 11, wherein Sasajima further teaches wherein the device under test (Figs. 1, 2; DUT; 200) and the receiver (Figs. 1, 2; [0040, 0044]; comparing sections; 42, 50) are on a same substrate (Fig. 2).
Regarding claim 19, the combination of Sasajima and Masuda teaches the testing apparatus according to claim 11, wherein Sasajima further teaches wherein the device under test (Figs. 1, 2; DUT; 200) and the receiver (Figs. 1, 2; [0040, 0044]; comparing sections; 42, 50) are, respectively, on separate substrates (Fig. 2).
Regarding claim 20, the combination of Sasajima and Masuda teaches the testing apparatus according to claim 19, wherein Sasajima further teaches wherein the substrate on which is the device under test is at a position higher than that of the substrate on which is the receiver (Fig. 2).
Regarding claim 21, Sasajima teaches a testing apparatus (Figs. 1, 2), comprising:
a driver (Figs. 1, 2; [0011]; main driving section; 32) connected electrically to a device under test (Figs. 1, 2; DUT; 200) and arranged to provide a test signal (Figs. 1, 2; [0033]; test signal) to the device under test (Figs. 1, 2; [0033]; main driving section, DUT; 32, 200);
a receiver (Figs. 1, 2; [0040, 0044]; comparing sections; 42, 50) connected electrically to the device under test (Figs. 1, 2; DUT; 200) and arranged to receive an output signal (Figs. 1, 2; [0040, 0044]) from the device under test (Figs. 1, 2; DUT; 200) and provide an output based on the output signal (Figs. 1, 2; [0040, 0044]; comparing sections, DUT; 42, 50, 200);
a test signal providing section (Figs. 1, 2; test signal generating section; 12) arranged to provide the test signal to the driver (Figs. 1, 2; main driving section; 32); and
a signal under test receiving section (Figs. 1, 2; [0029]; judging section; 16) arranged to receive the output from the receiver (Figs. 1, 2; [0040, 0044]; comparing sections; 42, 50), wherein
the driver (Figs. 1, 2; main driving section; 32) is closer than the test signal providing section (Figs. 1, 2; test signal generating section; 12) to the device under test (Figs. 1, 2; DUT; 200),
the receiver (Figs. 1, 2; [0040, 0044]; comparing sections; 42, 50) is closer than the signal under test receiving section (Figs. 1, 2; [0029]; judging section; 16) to the device under test (Figs. 1, 2; DUT; 200).
Sasajima does not specifically teach a bandwidth of communication between the driver and the test signal providing section is broader than a bandwidth of communication between the driver and the device under test, and a bandwidth of communication between the receiver and the signal under test receiving section is broader than a bandwidth of communication between the receiver and the device under test.
However, Masuda does teach a bandwidth of communication (Fig. 1; Pages 6-8) between the driver (Fig. 1; Pages 6-8) and the test signal providing section (Fig. 1; Pages 6-8; test signal generator; 112) is broader than a bandwidth of communication between the driver and the device under test (Fig. 1; Pages 6-8; device under test; 10), and a bandwidth of communication (Fig. 1; Pages 6-8) between the receiver (Fig. 1; Pages 6-8; signal receiver; 114) and the signal under test (Fig. 1; Pages 6-8) receiving section (Fig. 1; Pages 6-8; signal receiving unit; 112) is broader than a bandwidth of communication between the receiver (Fig. 1; Pages 6-8; signal receiver; 114) and the device under test (Fig. 1; Pages 6-8; device under test; 10).
It would have been obvious before the effective filing date of the claimed invention to modify the test apparatus and transmission apparatus of Sasajima by implementing the teachings of Masuda regarding a bandwidth of communication between the driver and the test signal providing section is broader than a bandwidth of communication between the driver and the device under test, and a bandwidth of communication between the receiver and the signal under test receiving section is broader than a bandwidth of communication between the receiver and the device under test; in order to “ process signals including the generation of test signals and optical signal conversion to prevent testing costs from increasing due to the decline of a processing rate caused by using additional measuring devices when testing a device comprising an optical interface” (See Masuda; Abstract).
Regarding claim 22, the combination of Sasajima and Masuda teaches the testing apparatus according to claim 21, wherein Masuda further teaches further comprising a switch that connects the driver or the receiver to the device under test (Fig. 1; Pages 6-8; first optical switch unit; 140).
Claim(s) 23-26 are rejected under 35 U.S.C. 103 as being unpatentable over Sasajima in view of Masuda in further view of Watanabe et al. KR 2009-0054448 (Provided by Applicant; Hereinafter Watanabe; Machine Translation Provided by Examiner).
Regarding claim 23, the combination of Sasajima and Masuda teaches the testing apparatus according to claim 1, but not specifically wherein the test signal providing section has: a pattern generator arranged to generate a pattern of the test signal; and a timing generator arranged to generate output timing for the test signal.
However, Watanabe does teach wherein the test signal providing section (Figs. 1, 3; Page 5, line 33 to Page 6, line 2; test signal generator; 1100) has: a pattern generator (Figs. 1, 3; Page 5, line 33 to Page 6, line 2; pattern generator; 1030) arranged to generate a pattern of the test signal (Figs. 1, 3; Page 5, line 33 to Page 6, line 2; pattern generator; 1030); and a timing generator arranged to generate output timing for the test signal (Figs. 1, 3; Page 5, line 33 to Page 6, line 2; timing generator; 1020).
It would have been obvious before the effective filing date of the claimed invention to modify the combination of Sasajima and Masuda by implementing the teachings of Watanabe regarding wherein the test signal providing section has: a pattern generator arranged to generate a pattern of the test signal; and a timing generator arranged to generate output timing for the test signal; so that it “generates a correction signal for compensating for the loss of a test signal applied to a device under test” (See Watanabe; Page 2, lines 3-5).
Regarding claim 24, the combination of Sasajima and Masuda teaches the testing apparatus according to claim 11 but not specifically, wherein the signal under test receiving section has: an expectation pattern generating section arranged to generate an expectation pattern; an expectation comparison timing generating section arranged to output a timing signal that provides timing for comparison of the expectation pattern; and an expectation comparing section arranged to compare an output signal from the receiver and the expectation pattern.
However, Watanabe does teach wherein the signal under test receiving section (Figs. 1, 3; Page 5, line 33 to Page 6, line 2; test signal generator; 1100) has: an expectation pattern generating section (Figs. 1, 3; Page 5, line 33 to Page 6, line 2; pattern generator; 1030) arranged to generate an expectation pattern (Figs. 1, 3; Page 5, line 33 to Page 6, line 2; pattern generator; 1030); an expectation comparison timing generating section (Figs. 1, 3; Page 5, line 33 to Page 6, line 2; timing generator; 1020) arranged to output a timing signal that provides timing for comparison of the expectation pattern (Figs. 1, 3; Page 5, line 33 to Page 6, line 2; pattern generator; 1030); and an expectation comparing (Figs. 1, 3; Page 5, line 33 to Page 6, line 2; correction signal generator unit; 1200) section arranged to compare an output signal from the receiver and the expectation pattern (Figs. 1, 3; Page 5, line 33 to Page 6, line 2; correction signal generator unit; 1200).
It would have been obvious before the effective filing date of the claimed invention to modify the combination of Sasajima and Masuda by implementing the teachings of Watanabe regarding wherein the signal under test receiving section has: an expectation pattern generating section arranged to generate an expectation pattern; an expectation comparison timing generating section arranged to output a timing signal that provides timing for comparison of the expectation pattern; and an expectation comparing section arranged to compare an output signal from the receiver and the expectation pattern; so that it “generates a correction signal for compensating for the loss of a test signal applied to a device under test” (See Watanabe; Page 2, lines 3-5).
Regarding claim 25, the combination of Sasajima and Masuda teaches the testing apparatus according to claim 21, but not specifically wherein the test signal providing section has: a pattern generator arranged to generate a pattern of the test signal; and a timing generator arranged to generate output timing for the test signal.
However, Watanabe does teach wherein the test signal providing section (Figs. 1, 3; Page 5, line 33 to Page 6, line 2; test signal generator; 1100) has: a pattern generator (Figs. 1, 3; Page 5, line 33 to Page 6, line 2; pattern generator; 1030) arranged to generate a pattern of the test signal (Figs. 1, 3; Page 5, line 33 to Page 6, line 2; pattern generator; 1030); and a timing generator (Figs. 1, 3; Page 5, line 33 to Page 6, line 2; timing generator; 1020) arranged to generate output timing for the test signal (Figs. 1, 3; Page 5, line 33 to Page 6, line 2; timing generator; 1020).
It would have been obvious before the effective filing date of the claimed invention to modify the combination of Sasajima and Masuda by implementing the teachings of Watanabe regarding wherein the test signal providing section has: a pattern generator arranged to generate a pattern of the test signal; and a timing generator arranged to generate output timing for the test signal; so that it “generates a correction signal for compensating for the loss of a test signal applied to a device under test” (See Watanabe; Page 2, lines 3-5).
Regarding claim 26, the combination of Sasajima and Masuda teaches the testing apparatus according to claim 21, but not specifically wherein the signal under test receiving section has: an expectation pattern generating section arranged to generate an expectation pattern; an expectation comparison timing generating section arranged to output a timing signal that provides timing for comparison of the expectation pattern; and an expectation comparing section arranged to compare an output signal from the receiver and the expectation pattern.
However, Watanabe does teach wherein the signal under test receiving section (Figs. 1, 3; Page 5, line 33 to Page 6, line 2; test signal generator; 1100) has: an expectation pattern generating section (Figs. 1, 3; Page 5, line 33 to Page 6, line 2; pattern generator; 1030) arranged to generate an expectation pattern (Figs. 1, 3; Page 5, line 33 to Page 6, line 2; pattern generator; 1030); an expectation comparison timing generating section (Figs. 1, 3; Page 5, line 33 to Page 6, line 2; timing generator; 1020) arranged to output a timing signal that provides timing for comparison of the expectation pattern (Figs. 1, 3; Page 5, line 33 to Page 6, line 2; timing generator; 1020); and an expectation comparing section (Figs. 1, 3; Page 5, line 33 to Page 6, line 2; correction signal generator unit; 1200) arranged to compare an output signal from the receiver and the expectation pattern (Figs. 1, 3; Page 5, line 33 to Page 6, line 2; correction signal generator unit; 1200).
It would have been obvious before the effective filing date of the claimed invention to modify the combination of Sasajima and Masuda by implementing the teachings of Watanabe regarding wherein the signal under test receiving section has: an expectation pattern generating section arranged to generate an expectation pattern; an expectation comparison timing generating section arranged to output a timing signal that provides timing for comparison of the expectation pattern; and an expectation comparing section arranged to compare an output signal from the receiver and the expectation pattern; so that it “generates a correction signal for compensating for the loss of a test signal applied to a device under test” (See Watanabe; Page 2, lines 3-5).
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure.
Cowan US 2004/0059971 - The present invention concerns an apparatus comprising a first plurality of contacts, a second plurality of contacts, one or more sockets, and a programmable processor.
Watanabe US 2008/0218178 - There is provided a test apparatus for testing a device under test including a pre-emphasis circuit.
Wu US 2009/0102496 - An integrated circuit test system includes a probe card, a driver, a receiver, and a first switch.
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/RAUL J RIOS RUSSO/Examiner, Art Unit 2858