DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Election/Restrictions
Applicant’s election without traverse of Species 1 in the reply filed on 12/29/25 is acknowledged.
Newly submitted claims 21-30 are directed to an invention that is independent or distinct from the invention originally claimed for the following reasons: Claims 21-30 pertain to a separate and distinct species from that of the originally elected claims. An exhaustive search has been conducted and the additional species would require a second burdensome search to determine the best applicable prior art.
Since applicant has received an action on the merits for the originally presented invention, this invention has been constructively elected by original presentation for prosecution on the merits. Accordingly, claims 21-30 are withdrawn from consideration as being directed to a non-elected invention. See 37 CFR 1.142(b) and MPEP § 821.03.
To preserve a right to petition, the reply to this action must distinctly and specifically point out supposed errors in the restriction requirement. Otherwise, the election shall be treated as a final election without traverse. Traversal must be timely. Failure to timely traverse the requirement will result in the loss of right to petition under 37 CFR 1.144. If claims are subsequently added, applicant must indicate which of the subsequently added claims are readable upon the elected invention.
Should applicant traverse on the ground that the inventions are not patentably distinct, applicant should submit evidence or identify such evidence now of record showing the inventions to be obvious variants or clearly admit on the record that this is the case. In either instance, if the examiner finds one of the inventions unpatentable over the prior art, the evidence or admission may be used in a rejection under 35 U.S.C. 103 or pre-AIA 35 U.S.C. 103(a) of the other invention.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claim(s) 1 and 7 is/are rejected under 35 U.S.C. 102a1 as being anticipated by Yu et al (US 2006/0121717).
(Original) A semiconductor device structure, comprising:
one or more bonding pads (Fig.6 (118/116/114 ) and [0026]) disposed over a substrate (not depicted in drawings but described [0019]); and
a first passivation layer (Fig.6 (124) and [0029]) disposed over the one or more bonding pads (Fig.6 (118/116/114) and [0026]), wherein the first passivation layer (Fig.6 (124) and [0029]) comprises:
a first passivation sublayer (Fig.6 (124) and [0029]) comprising a first dielectric material (Fig.6 (124) and [0029-0030- SiC]);
a second passivation sublayer (Fig.6 (120) and [0027]) disposed over the first passivation sublayer (Fig.6 (124) and [0029]), wherein the second passivation sublayer (Fig.6 (120) and [0027]) comprises a second dielectric material (Fig.6 (120) and [0027- silicon oxide or oxynitride]); and
a third passivation sublayer (Fig.6 (122) and [0027]) disposed over the second passivation sublayer (Fig.6 (120) and [0027]), wherein the third passivation sublayer (Fig.6 (122) and [0027]) comprises a third dielectric material (Fig.6 (122) and [0027- silicon nitride]) different from the first ([0030-SiC]) and second dielectric materials [0027- silicon oxide or oxynitride].
7. (Original) The semiconductor device structure of claim 1, wherein the third passivation sublayer (Fig.6 (122) and [0027]) further comprises a trench (Fig.6 (trench unlabeled but depicted).
Claim(s) 1-3 is/are rejected under 35 U.S.C. 102a1 as being anticipated by Kim et al (US 2007/0023860).
A semiconductor device structure, comprising:
one or more bonding pads (Fig.4B (120b) and [0050]) disposed over a substrate (Fig.4B (100) and [0047]); and
a first passivation layer (Fig.4B (P) and [0050]) disposed over the one or more bonding pads (Fig.4B (120b) and [0050]), wherein the first passivation layer (Fig.4B (P) and [0050]) comprises: a first passivation sublayer (Fig. 4B (125) and [0050]) comprising a first dielectric material ([0050- note 125 is a multilayer because it dis taught to comprise “at least one material”- thus teaching it could be more than one material]);
a second passivation sublayer (Fig. 4B (125) and [0050]) disposed over the first passivation sublayer (Fig. 4B (125) and [0050]), wherein the second passivation sublayer (Fig. 4B (125) and [0050]) comprises a second dielectric material ([0050- note 125 is a multilayer because it dis taught to comprise “at least one material”- thus teaching it could be more than one material]); and a third passivation sublayer (Fig.4B (130) and [0050]) disposed over the second passivation sublayer (Fig. 4B (125) and [0050]), wherein the third passivation sublayer (Fig.4B (130) and [0050]) comprises a third dielectric material [0050- silicon nitride] different from the first and second dielectric materials [0050-oxides].
2. (Original) The semiconductor device structure of claim 1, wherein the first dielectric material (Fig. 4B (125) and [0050]) comprises a first oxide [0050- teaching layer 125 can be a multilayer including USG], the second dielectric material (Fig. 4B (125) and [0050]) comprises a second oxide [0050- teaching 125 can be a multilayer including HDP oxide], and the third dielectric material (Fig. 4B (130) and [0050])comprises a first nitride [0050- teaching 130 includes silicon nitride].
3. (Original) The semiconductor device structure of claim 2, wherein the first oxide (Fig. 4B (125) and [0050- teaching layer 125 can be a multilayer including USG]) is undoped silica glass, and the second oxide (Fig. 4B (125) and [0050- teaching 125 can be a multilayer including HDP oxide]) is a high density plasma oxide, and the first nitride (Fig. 4B (130) and [0050- teaching 130 includes silicon nitride]) is silicon nitride.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 4 is/are rejected under 35 U.S.C. 103 as being unpatentable over Yu et al (US 2006/0121717) in further view of Kim et al (US 2007/0023860).
Yu teaches the limitations of claim 1 as cited above, and further teaches the limitations of claim 4 as cited below:
4. (Original) The semiconductor device structure, wherein the first passivation sublayer (Fig.6 (124) and [0029]) has a first thickness [0029- thickness starting at 300 A], the second passivation sublayer (Fig.6 (120) and [0027]) has a second thickness substantially greater than the first thickness [0027- thickness starting at 1000 A], and the third passivation sublayer (Fig.6 (122) and [0027]) has a third thickness substantially greater than the first thickness [0027- thickness starting at 1000 A].
However claim 4 depends upon claim 2.
Yu teaches the second sublayer is an oxide and the third is a nitride [0027]; however Yu does not teach the first passivation sublayer is an oxide as required in claim 2.
Claim 2 recites:
2. (Original) The semiconductor device structure of claim 1, wherein the first dielectric material comprises a first oxide, the second dielectric material comprises a second oxide, and the third dielectric material comprises a first nitride.
Kim teaches the limitations of claim 2 as follows:
2. (Original) The semiconductor device structure of claim 1, wherein the first dielectric material (Fig. 4B (125) and [0050]) comprises a first oxide [0050- teaching layer 125 can be a multilayer including USG], the second dielectric material (Fig. 4B (125) and [0050]) comprises a second oxide [0050- teaching 125 can be a multilayer including HDP oxide], and the third dielectric material (Fig. 4B (130) and [0050])comprises a first nitride [0050- teaching 130 includes silicon nitride].
It would have been obvious to one of ordinary skill in the art at the time the invention was filed to modify Yu’s teachings to include a first passivation sublayer including an oxide because as Kim teaches oxide materials are effective passivators [0050] for contact pad applications. Moreover oxides are well-known recognized passivating materials as known in the art and a passivation layer can theoretically be divided into a multitude of sublayers. Therefore the combination of claims 1-2 and 4 is considered obvious.
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. Walter et al (US 2013/0234300); Tsai et al (US 6017614); and Hsiao (US 6277725) teach similar structures.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to LAURA M MENZ whose telephone number is (571)272-1697. The examiner can normally be reached Monday-Friday 7:00-3:30.
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/LAURA M MENZ/Primary Examiner, Art Unit 2813
3/4/26
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