DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Double Patenting
The nonstatutory double patenting rejection is based on a judicially created doctrine grounded in public policy (a policy reflected in the statute) so as to prevent the unjustified or improper timewise extension of the “right to exclude” granted by a patent and to prevent possible harassment by multiple assignees. A nonstatutory double patenting rejection is appropriate where the conflicting claims are not identical, but at least one examined application claim is not patentably distinct from the reference claim(s) because the examined application claim is either anticipated by, or would have been obvious over, the reference claim(s). See, e.g., In re Berg, 140 F.3d 1428, 46 USPQ2d 1226 (Fed. Cir. 1998); In re Goodman, 11 F.3d 1046, 29 USPQ2d 2010 (Fed. Cir. 1993); In re Longi, 759 F.2d 887, 225 USPQ 645 (Fed. Cir. 1985); In re Van Ornum, 686 F.2d 937, 214 USPQ 761 (CCPA 1982); In re Vogel, 422 F.2d 438, 164 USPQ 619 (CCPA 1970); In re Thorington, 418 F.2d 528, 163 USPQ 644 (CCPA 1969).
A timely filed terminal disclaimer in compliance with 37 CFR 1.321(c) or 1.321(d) may be used to overcome an actual or provisional rejection based on nonstatutory double patenting provided the reference application or patent either is shown to be commonly owned with the examined application, or claims an invention made as a result of activities undertaken within the scope of a joint research agreement. See MPEP § 717.02 for applications subject to examination under the first inventor to file provisions of the AIA as explained in MPEP § 2159. See MPEP § 2146 et seq. for applications not subject to examination under the first inventor to file provisions of the AIA . A terminal disclaimer must be signed in compliance with 37 CFR 1.321(b).
The filing of a terminal disclaimer by itself is not a complete reply to a nonstatutory double patenting (NSDP) rejection. A complete reply requires that the terminal disclaimer be accompanied by a reply requesting reconsideration of the prior Office action. Even where the NSDP rejection is provisional the reply must be complete. See MPEP § 804, subsection I.B.1. For a reply to a non-final Office action, see 37 CFR 1.111(a). For a reply to final Office action, see 37 CFR 1.113(c). A request for reconsideration while not provided for in 37 CFR 1.113(c) may be filed after final for consideration. See MPEP §§ 706.07(e) and 714.13.
The USPTO Internet website contains terminal disclaimer forms which may be used. Please visit www.uspto.gov/patent/patents-forms. The actual filing date of the application in which the form is filed determines what form (e.g., PTO/SB/25, PTO/SB/26, PTO/AIA /25, or PTO/AIA /26) should be used. A web-based eTerminal Disclaimer may be filled out completely online using web-screens. An eTerminal Disclaimer that meets all requirements is auto-processed and approved immediately upon submission. For more information about eTerminal Disclaimers, refer to www.uspto.gov/patents/apply/applying-online/eterminal-disclaimer.
Claims 1-20 are rejected on the ground of nonstatutory double patenting as being unpatentable over claims 1-20 of U.S. Patent No. 11527518. Although the claims at issue are not identical, they are not patentably distinct from each other because applicant merely claims the same elements as US11527518, but describes a different interface to be level with a top surface of the first encapsulant and removing limitations related to a second encapsulant for a second package.
A semiconductor package comprises:
a first package component comprising:
a first semiconductor die
a first encapsulant around the first semiconductor die
a through via extending through the first encapsulant
a first redistribution structure over the first encapsulant, the first redistribution structure comprising a contact pad electrically connected to the through via
a second package component directly bonded to the contact pad by a solder connection
a heat dissipation feature between the first semiconductor die and the second package component, wherein the heat dissipation feature extends through the first redistribution structure and is attached to the first semiconductor die by a first film, and wherein an interface between the first film and the heat dissipation feature is level with a top surface of the first encapsulant
A semiconductor package comprises:
a first package component comprising:
a first semiconductor die
a first encapsulant around the first semiconductor die
a through via extending through the first encapsulant
a contact pad over the through via
a second package component over and directly bonded to the contact pad by a solder connection
a heat dissipation feature between the first semiconductor die and the second package component wherein the heat dissipation feature is attached to the first semiconductor die by a film, wherein an interface between a top surface of the first semiconductor die and a bottom surface of the film is level with an interface between a bottom surface of the contact pad and a top surface of the first encapsulant
Claims 1-20 are rejected on the ground of nonstatutory double patenting as being unpatentable over claims 1-20 of U.S. Patent No. 12074148. Although the claims at issue are not identical, they are not patentably distinct from each other because applicant merely claims the same elements as US12074148, but describes a different interface to be level with a top surface of the first encapsulant.
A semiconductor package comprises:
a first package component comprising:
a first semiconductor die
a first encapsulant around the first semiconductor die
a through via extending through the first encapsulant
a first redistribution structure over the first encapsulant, the first redistribution structure comprising a contact pad electrically connected to the through via
a second package component directly bonded to the contact pad by a solder connection
a heat dissipation feature between the first semiconductor die and the second package component, wherein the heat dissipation feature extends through the first redistribution structure and is attached to the first semiconductor die by a first film, and wherein an interface between the first film and the heat dissipation feature is level with a top surface of the first encapsulant
A semiconductor package comprises:
a first package component comprising:
a first semiconductor die
a first encapsulant around the first semiconductor die
a first redistribution structure electrically connected to the first semiconductor die
a contact pad on a surface of the first encapsulant opposite to the first redistribution structure
a second package component bonded to the first package component, wherein the second package component comprises a second semiconductor die, wherein the second package component is directly bonded to the contact pad
a heat spreader between the first semiconductor die and the second package component wherein the heat spreader is attached to a semiconductor substrate of the first semiconductor die by a film
a second encapsulant between the first package component and the second package component, wherein the second encapsulant has a lower thermal conductivity than the heat spreader
wherein an interface between the semiconductor substrate of the first semiconductor die and the film is level with an interface between the second encapsulant and the first encapsulant, and wherein the interface between the semiconductor substrate of the first semiconductor die and the film is level with an interface between the contact pad and the first encapsulant
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claims 1 and 3-9 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Lin et al. (US Publication No. 2019/0333836).
Regarding claim 1, Lin discloses a semiconductor package comprises:
a first package component comprising:
a first semiconductor die (110)
a first encapsulant (126) around the first semiconductor die (110)
a through via (106) extending through the first encapsulant (126)
a first redistribution structure (240) over the first encapsulant (126), the first redistribution structure comprising a contact pad (214) electrically connected to the through via (106)
a second package component (210) directly bonded to the contact pad by a solder connection (212 ball)
a heat dissipation (150) feature between the first semiconductor die (110) and the second package component, wherein the heat dissipation feature extends through the first redistribution structure and is attached to the first semiconductor die by a first film (124) , and wherein an interface between the first film and the heat dissipation feature is level with a top surface of the first encapsulant (126) (Figure 3)
Regarding claim 3, Lin discloses the first package component further comprises a second semiconductor die (110 right), wherein the first encapsulant (126) is disposed around the second semiconductor die (110 right), and wherein the heat dissipation (150) feature overlaps and is thermally coupled to the second semiconductor die (Figure 2D).
Regarding claim 4, Lin discloses the heat dissipation feature (150) is attached to the second semiconductor die (122 right) by a second film, and wherein the second film is physically separated from the first film (Figure 2D).
Regarding claim 5, Lin discloses the first encapsulant extends continuously from a sidewall of the first film to a sidewall of the second film (Figure 2D).
Regarding claim 6, Lin discloses a second semiconductor die (122 right), wherein the first encapsulant (126) is disposed around the second semiconductor die, and semiconductor package further comprises: a second heat dissipation feature (150 right) between the second semiconductor die (110 right) and the second package component, wherein the second heat dissipation feature extends through the first redistribution structure (240) and is attached to the second semiconductor die by a second film (Figure 2D).
Regarding claim 7, Lin discloses an interface between the second film (122) and the second heat dissipation feature (150) is level with the top surface of the first encapsulant (Figure 2D).
Regarding claim 8, Lin discloses top surfaces of the heat dissipation feature (150) and the second heat dissipation feature (150) are level (Figure 2D).
Regarding claim 9, Lin discloses the first package component further comprises a second redistribution structure (132) electrically connected to the first redistribution structure (240) by the through via (106).
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim 2 is rejected under 35 U.S.C. 103 as being unpatentable over Lin et al. (US Publication No. 2019/0333836).
Regarding claim 2, Lin discloses the limitations as discussed in the rejection of claim 1 above. Lin does not disclose the heat dissipation feature has a thermal conductivity of at least 149 W/m*K. However, it would have been obvious to one of ordinary skill in the art at a time before the effective filing date of the invention to have modified the thermal conductivity of Lin’s heat spreader to be in this range since it is a metal and can improve heat dissipation, thereby improving reliability and performance of the device, since it has been held that where the general conditions of a claim are disclosed in the prior art, discovering the optimum or workable ranges involves only routine skill in the art. In re Aller, 105 USPQ 233.
Claims 10-16 are rejected under 35 U.S.C. 103 as being unpatentable over Yu et al. (US Publication No. 2019/0088581) in view of Lin et al. (US Publication No. 2019/0333836).
Regarding claim 10, Yu discloses a semiconductor package comprises:
a first package component comprising
a first semiconductor die (65A) directly bonded to a second semiconductor die (168) by dielectric-to-dielectric (75A) and metal-to-metal bonds (71A)
a first encapsulant (180) around the first semiconductor die and the second semiconductor die (Figure 19)
a through via (162) extending through the first encapsulant (180)
a second package component (140) bonded to the first package component by a solder connection (192)
Yu does not disclose a heat dissipation feature between the first semiconductor die and the second package component wherein the heat dissipation feature is attached to the first semiconductor die by a film, the film further contacting a lateral surface of the first encapsulant. However, Lin discloses a heat dissipation feature (150) on a first semiconductor die (110) attached by a film (124) surrounded by encapsulant (126) and between a second package (210). It would have been obvious to one of ordinary skill in the art at a time before the effective filing date of the invention to have modified the package of Yu to include the heat dissipation feature and film, as taught by Lin, since it can mitigate hot spots in the package, thereby improving performance and lifetime of the package (paragraph 26).
Regarding claim 11, Yu discloses a conductive via (134) in the first encapsulant (130) and laterally spaced apart from the first semiconductor die (104), wherein the conductive via is disposed on a conductive contact of the second semiconductor die (140) (Figure 37).
Regarding claim 12, Lin discloses the conductive via (106) extends from the conductive contact to the film (124). As discussed above, it would have been obvious to one of ordinary skill in the art at a time before the effective filing date of the invention to have modified Yu in view of Lin.
Regarding claim 13, Lin discloses the film (124) comprises a high-k polymer, indium, tin, a thermal interface material (TIM), or solder paste (paragraph 36). As discussed above, it would have been obvious to one of ordinary skill in the art at a time before the effective filing date of the invention to have modified Yu in view of Lin.
Regarding claim 14, Lin discloses a second encapsulant (250) extending continuously from a bottom surface of the second package component (210) to the lateral surface of the first encapsulant (126). As discussed above, it would have been obvious to one of ordinary skill in the art at a time before the effective filing date of the invention to have modified Yu in view of Lin.
Regarding claim 15, Lin discloses the second encapsulant (250) further contacts a sidewall of the film (150) (Figure 1F). As discussed above, it would have been obvious to one of ordinary skill in the art at a time before the effective filing date of the invention to have modified Yu in view of Lin.
Regarding claim 16, Lin discloses the second encapsulant (250) further contacts a top surface of the heat dissipation feature (Figure 2D). As discussed above, it would have been obvious to one of ordinary skill in the art at a time before the effective filing date of the invention to have modified Yu in view of Lin.
Claims 17 and 19-20 are rejected under 35 U.S.C. 103 as being unpatentable over Hung et al. (US Publication No. 2014/0252646) in view of Lin et al. (US Publication No. 2019/0333836).
Regarding claim 17, Huang discloses a method comprising:
forming a redistribution structure (412) directly on a carrier (102), wherein the redistribution structure comprises a first contact pad (208 left) and a second contact pad (208 right) in an insulating layer (310)
patterning an opening through the insulating layer, the opening being disposed between the first contact pad and the second contact pad (Figure 5)
attaching a first die (614) to the heat spreader with a film (616), the film contacting the first die and the heat spreader
forming a first through via (412 left) on the first contact pad (208) and a second through via (412 right) on the second contact pad
after attaching the first die (614), encapsulating (716) the first die, the first through via, and the second through via with a molding compound (716) (Figure 7)
bonding a package component comprising a second die (1130) to the through via, wherein the heat spreader is between the first die and the package component (Figure 11)
Huang does not disclose forming a heat spreader in the opening contacting the first die via a film. However, Lin discloses forming a heat spreading layer (122) in an opening over a film (124) on a carrier (102). It would have been obvious to one of ordinary skill in the art at a time before the effective filing date of the invention to have modified the method of Huang to include forming a heat spreading layer, as taught by Lin, since it can mitigate hot spots in the package, thereby improving performance and lifetime of the package (paragraph 26).
Regarding claim 19, Hung discloses the film comprises a high-k polymer, indium, tin, a thermal interface material (TIM), or solder paste (paragraphs 16 and 22).
Regarding claim 20, Huang discloses encapsulating the film (616) with the molding compound (716).
Claim 18 is rejected under 35 U.S.C. 103 as being unpatentable over Hung et al. (US Publication No. 2014/0252646) in view of Lin et al. (US Publication No. 2019/0333836), and further in view of Huang et al. (US Publication No. 2020/0365486).
Regarding claim 18, Hung/Lin discloses the limitations as discussed in the rejection of claim 17 above. Hung/Lin does not disclose forming the heat spreader in the opening comprises a plating process. However, Huang discloses forming a heat spreader (128) by a plating process (paragraph 41). It would have been obvious to one of ordinary skill in the art at a time before the effective filing date of the invention to have modified the method of Hung/Lin to include forming the heat spreader by a plating process, as taught by Hung, since it can provide a more uniform and constant thickness, thereby improving uniform heat dissipation from the device (paragraphs 41-42).
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to NEIL R PRASAD whose telephone number is (571) 270-3129. The examiner can normally be reached M-F 9am-5pm.
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/N.R.P/ 9/4/2026Examiner, Art Unit 2897
/JACOB Y CHOI/Supervisory Patent Examiner, Art Unit 2897
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