Prosecution Insights
Last updated: October 22, 2026
Application No. 18/772,736

Image Sensors With Dummy Pixel Structures

Non-Final OA §DOUBLEPATENT
Filed
Jul 15, 2024
Priority
Feb 27, 2020 — provisional 62/982,457 +2 more
Examiner
ZARNEKE, DAVID A
Art Unit
2891
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Taiwan Semiconductor Manufacturing Company, Ltd.
OA Round
1 (Non-Final)
71%
Grant Probability
Favorable
1-2
OA Rounds
6m
Est. Remaining
82%
With Interview

Examiner Intelligence

Grants 71% — above average
71%
Career Allowance Rate
585 granted / 823 resolved
+3.1% vs TC avg
Moderate +11% lift
Without
With
+11.1%
Interview Lift
resolved cases with interview
Typical timeline
2y 9m
Avg Prosecution
57 currently pending
Career history
868
Total Applications
across all art units

Statute-Specific Performance

§101
0.2%
-39.8% vs TC avg
§103
63.4%
+23.4% vs TC avg
§102
22.5%
-17.5% vs TC avg
§112
4.3%
-35.7% vs TC avg
Black line = Tech Center average estimate • Based on career data from 823 resolved cases

Office Action

§DOUBLEPATENT
DETAILED ACTION Election/Restrictions Applicant’s election without traverse of Group I and Species 1a and 2a, corresponding to claims 1-6, 9, and 21-33 in the reply filed on 9/28/26 is acknowledged. Double Patenting The nonstatutory double patenting rejection is based on a judicially created doctrine grounded in public policy (a policy reflected in the statute) so as to prevent the unjustified or improper timewise extension of the “right to exclude” granted by a patent and to prevent possible harassment by multiple assignees. A nonstatutory double patenting rejection is appropriate where the conflicting claims are not identical, but at least one examined application claim is not patentably distinct from the reference claim(s) because the examined application claim is either anticipated by, or would have been obvious over, the reference claim(s). See, e.g., In re Berg, 140 F.3d 1428, 46 USPQ2d 1226 (Fed. Cir. 1998); In re Goodman, 11 F.3d 1046, 29 USPQ2d 2010 (Fed. Cir. 1993); In re Longi, 759 F.2d 887, 225 USPQ 645 (Fed. Cir. 1985); In re Van Ornum, 686 F.2d 937, 214 USPQ 761 (CCPA 1982); In re Vogel, 422 F.2d 438, 164 USPQ 619 (CCPA 1970); In re Thorington, 418 F.2d 528, 163 USPQ 644 (CCPA 1969). A timely filed terminal disclaimer in compliance with 37 CFR 1.321(c) or 1.321(d) may be used to overcome an actual or provisional rejection based on nonstatutory double patenting provided the reference application or patent either is shown to be commonly owned with the examined application, or claims an invention made as a result of activities undertaken within the scope of a joint research agreement. See MPEP § 717.02 for applications subject to examination under the first inventor to file provisions of the AIA as explained in MPEP § 2159. See MPEP § 2146 et seq. for applications not subject to examination under the first inventor to file provisions of the AIA . A terminal disclaimer must be signed in compliance with 37 CFR 1.321(b). The filing of a terminal disclaimer by itself is not a complete reply to a nonstatutory double patenting (NSDP) rejection. A complete reply requires that the terminal disclaimer be accompanied by a reply requesting reconsideration of the prior Office action. Even where the NSDP rejection is provisional the reply must be complete. See MPEP § 804, subsection I.B.1. For a reply to a non-final Office action, see 37 CFR 1.111(a). For a reply to final Office action, see 37 CFR 1.113(c). A request for reconsideration while not provided for in 37 CFR 1.113(c) may be filed after final for consideration. See MPEP §§ 706.07(e) and 714.13. The USPTO Internet website contains terminal disclaimer forms which may be used. Please visit www.uspto.gov/patent/patents-forms. The actual filing date of the application in which the form is filed determines what form (e.g., PTO/SB/25, PTO/SB/26, PTO/AIA /25, or PTO/AIA /26) should be used. A web-based eTerminal Disclaimer may be filled out completely online using web-screens. An eTerminal Disclaimer that meets all requirements is auto-processed and approved immediately upon submission. For more information about eTerminal Disclaimers, refer to www.uspto.gov/patents/apply/applying-online/eterminal-disclaimer. Claims 1-6, 9, and 21-33 are rejected on the ground of nonstatutory double patenting as being unpatentable over claims 1-20 of U.S. Patent No. 11,626,444, hereafter referred to as the patent. Although the claims at issue are not identical, they are not patentably distinct from each other because the current claims are broader. Regarding claim 1, the patent claims a semiconductor device, comprising: a substrate (column 16, lines 30-31); an active pixel structure, disposed in the substrate (column 16, lines 32-33), comprising: a first epitaxial structure disposed in the substrate (column 16, lines 34-37), and a first capping layer disposed on the first epitaxial structure (column 16, lines 34-37); and a dummy pixel structure, adjacent to the active pixel structure (column 16, lines 40-43 wherein an electrically isolated pixel is a dummy pixel), comprising: a second epitaxial structure disposed in the substrate (column 16, lines 44-47); and a second capping layer disposed on the second epitaxial structure (column 16, lines 44-47), wherein a top surface of the second capping layer is substantially coplanar with a top surface of the first capping layer (claim 8). With respect to claim 2, the patent (claim 6) claims vertical dimensions of the first and second epitaxial structures are substantially equal to each other. As to claim 3, the patent (column 16, lines 48-50) claims a top surface of the first epitaxial structure is substantially coplanar with a top surface of the second epitaxial structure. In re claim 4, the patent (claim 7) claims the first and second capping layers comprise a same semiconductor material. Concerning claim 5, the patent (claim 7) claims the first and second capping layers comprise a semiconductor material that is different from a semiconductor material of the first and second epitaxial structures. Pertaining to claim 6, the patent (claim 2) claims the second epitaxial structure comprises a top surface area that is equal to or greater than about half of a top surface area of the first epitaxial structure. In claim 9, the patent (claim 4) claims the second epitaxial structure comprises an array of epitaxial structures surrounding the first epitaxial structure. Regarding claim 21, the patent claims a semiconductor device, comprising: a substrate (column 16, lines 30-31); an active radiation-sensing structure, disposed in the substrate (column 16, lines 32-33), comprising: an active epitaxial structure disposed in the substrate (column 16, lines 34-37), and an active capping layer disposed on the active epitaxial structure (column 16, lines 34-37); and a dummy radiation-sensing structure, disposed in the substrate and electrically isolated from the active radiation-sensing structure (column 16, lines 40-43), comprising: a dummy epitaxial structure disposed in the substrate (column 16, lines 44-47); and a dummy capping layer disposed on the dummy epitaxial structure (column 16, lines 44-47), wherein the active and dummy epitaxial structures comprise the same semiconductor material (column 16, lines 51-52). With respect to claim 22, the patent (claim 4) claims the dummy epitaxial structure comprises an array of epitaxial structures surrounding the active epitaxial structure. As to claim 23, the patent (claim 9) claims the active and dummy capping layers comprise the same semiconductor material. In re claim 24, though the patent fails to claim the dummy epitaxial structure comprises an undoped semiconductor material, it would have been obvious to one of ordinary skill in the art at the time of the invention to use undoped semiconductor material in the invention of the patent because undoped semiconductor material is conventionally known and used in the art. The use of conventional materials to perform their known functions is obvious (MPEP 2144.07). Concerning claim 25, the patent (column 16, lines 48-50) claims a top surface of the active epitaxial structure is substantially coplanar with a top surface of the dummy epitaxial structure. Pertaining to claim 26, the patent (claim 7) claims the active epitaxial structure comprises an array of germanium epitaxial structures or silicon germanium epitaxial structures. In claim 27, the patent claims a semiconductor device, comprising: a substrate (column 16, lines 30-31); an active region (column 16, lines 32-33), comprising: a first germanium-based (claim 7) structure disposed in the substrate (column 16, lines 34-37), and a first capping layer disposed on the first germanium-based structure (column 16, lines 34-37); and a dummy region, surrounding the active region (column 16, lines 40-43 wherein electrically isolated equals dummy), comprising: a second germanium-based (claim 7) structure disposed in the substrate (column 16, lines 44-47); and a second capping layer disposed on the second germanium-based structure (column 16, lines 44-47), wherein a top surface of the first germanium-based structure is substantially coplanar with a top surface of the second germanium-based structure (column 16, lines 48-50). Regarding claim 28, the patent (claims 2-3) claims the second germanium-based structure comprises a top surface area that is equal to or greater than about half of a top surface area of the first germanium-based structure. With respect to claim 29, though the patent fails to claim the first germanium-based structure comprises an array of active epitaxial structures,it would have been obvious to one of ordinary skill in the art at the time of the invention to use an array in the invention of the patent because the mere duplication of parts has no patentable significance unless a new and unexpected result is produced (In re Harza, 124 USPQ 378 (CCPA 1960)). Also, though the patent, which teaches an array of second germanium-based structures in claim 4, wherein the second germanium-based structure comprises: a first array of dummy epitaxial structures disposed on a first side the array of active epitaxial structures; and a second array of dummy epitaxial structures disposed on a second side the array of active epitaxial structures, it would have been obvious to one of ordinary skill in the art at the time of the invention to use this configuration in the invention of the patent because it is conventionally known and used in the art. The use of conventional materials to perform their known functions is obvious (MPEP 2144.07). As to claim 30, the patent (claim 10) claims the first and second capping layers comprise materials different from the first and second germanium-based structures. In re claim 31, though the patent fails to claim the active pixel structure further comprises: a doped region disposed in the first epitaxial structure; a silicide layer disposed on the doped region; and a conductive plug disposed on the silicide layer, it would have been obvious to one of ordinary skill in the art at the time of the invention to use this configuration in the invention of the patent because it is conventionally known and used in the art. The use of conventional materials to perform their known functions is obvious (MPEP 2144.07). Concerning claim 32, though the patent fails to claim the first epitaxial structure comprises a two-dimensional array of active epitaxial structures, and wherein the second epitaxial structure comprises: a first array of dummy epitaxial structures disposed on a first side the two- dimensional array of active epitaxial structures; and a second array of dummy epitaxial structures disposed on a second side the two- dimensional array of active epitaxial structures, it would have been obvious to one of ordinary skill in the art at the time of the invention to use this configuration in the invention of the patent because it is conventionally known and used in the art. The use of conventional materials to perform their known functions is obvious (MPEP 2144.07). Pertaining to claim 33, the patent (claim 7) claims the first and second epitaxial structures comprise the same semiconductor material. Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to DAVID A ZARNEKE whose telephone number is (571)272-1937. The examiner can normally be reached M-F. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Matt Landau can be reached at 571-272-1731. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /DAVID A ZARNEKE/Primary Examiner, Art Unit 2891 10/14/2026
Read full office action

Prosecution Timeline

Jul 15, 2024
Application Filed
Oct 16, 2026
Non-Final Rejection mailed — §DOUBLEPATENT (current)

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

1-2
Expected OA Rounds
71%
Grant Probability
82%
With Interview (+11.1%)
2y 9m (~6m remaining)
Median Time to Grant
Low
PTA Risk
Based on 823 resolved cases by this examiner. Grant probability derived from career allowance rate.

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