Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Information Disclosure Statement
The information disclosure statement (IDS) submitted on 07/15/2024 was filed before the mailing date of the first action on the merits. The submission is in compliance with the provisions of 37 CFR 1.97. Accordingly, the information disclosure statement is being considered by the examiner.
Double Patenting
The nonstatutory double patenting rejection is based on a judicially created doctrine grounded in public policy (a policy reflected in the statute) so as to prevent the unjustified or improper timewise extension of the “right to exclude” granted by a patent and to prevent possible harassment by multiple assignees. A nonstatutory double patenting rejection is appropriate where the conflicting claims are not identical, but at least one examined application claim is not patentably distinct from the reference claim(s) because the examined application claim is either anticipated by, or would have been obvious over, the reference claim(s). See, e.g., In re Berg, 140 F.3d 1428, 46 USPQ2d 1226 (Fed. Cir. 1998); In re Goodman, 11 F.3d 1046, 29 USPQ2d 2010 (Fed. Cir. 1993); In re Longi, 759 F.2d 887, 225 USPQ 645 (Fed. Cir. 1985); In re Van Ornum, 686 F.2d 937, 214 USPQ 761 (CCPA 1982); In re Vogel, 422 F.2d 438, 164 USPQ 619 (CCPA 1970); In re Thorington, 418 F.2d 528, 163 USPQ 644 (CCPA 1969).
A timely filed terminal disclaimer in compliance with 37 CFR 1.321(c) or 1.321(d) may be used to overcome an actual or provisional rejection based on nonstatutory double patenting provided the reference application or patent either is shown to be commonly owned with the examined application, or claims an invention made as a result of activities undertaken within the scope of a joint research agreement. See MPEP § 717.02 for applications subject to examination under the first inventor to file provisions of the AIA as explained in MPEP § 2159. See MPEP § 2146 et seq. for applications not subject to examination under the first inventor to file provisions of the AIA . A terminal disclaimer must be signed in compliance with 37 CFR 1.321(b).
The filing of a terminal disclaimer by itself is not a complete reply to a nonstatutory double patenting (NSDP) rejection. A complete reply requires that the terminal disclaimer be accompanied by a reply requesting reconsideration of the prior Office action. Even where the NSDP rejection is provisional the reply must be complete. See MPEP § 804, subsection I.B.1. For a reply to a non-final Office action, see 37 CFR 1.111(a). For a reply to final Office action, see 37 CFR 1.113(c). A request for reconsideration while not provided for in 37 CFR 1.113(c) may be filed after final for consideration. See MPEP §§ 706.07(e) and 714.13.
The USPTO Internet website contains terminal disclaimer forms which may be used. Please visit www.uspto.gov/patent/patents-forms. The actual filing date of the application in which the form is filed determines what form (e.g., PTO/SB/25, PTO/SB/26, PTO/AIA /25, or PTO/AIA /26) should be used. A web-based eTerminal Disclaimer may be filled out completely online using web-screens. An eTerminal Disclaimer that meets all requirements is auto-processed and approved immediately upon submission. For more information about eTerminal Disclaimers, refer to www.uspto.gov/patents/apply/applying-online/eterminal-disclaimer.
Claims 1-20 are rejected on the ground of nonstatutory double patenting as being unpatentable over claims 1-20 of U.S. Patent No. 12,087,705. Although the claims at issue are not identical, they are not patentably distinct from each other because similar subject matter is claimed:
Instant application:
1. A package structure, comprising: a substrate;
a chip-containing structure over the substrate; and
a warpage-control element laterally surrounding the chip-containing structure, wherein the warpage-control element has a protruding portions extending into the substrate.
2. The package structure as claimed in claim 1, wherein the warpage-control element surrounds a region of the substrate, and the chip-containing structure is positioned over the region.
3. The package structure as claimed in claim 2, wherein the protruding portion partially surrounds a corner of the region surrounded by the warpage-control element.
4. The package structure as claimed in claim 3, wherein the chip-containing structure has a first side extending in a first direction, the chip-containing structure has a second side extending in a second direction, the first side is longer than the second side, the protruding portion has a first part extending in the first direction, the protruding portion has a second part extending in the second direction, and the first part and the second part have different lengths.
5. The package structure as claimed in claim 4, wherein the first part is longer than the second part.
6. The package structure as claimed in claim 2, wherein the protruding portion comprises a plurality of protruding elements extending into the substrate, and the protruding elements together partially surround a corner of the region surrounded by the warpage-control element.
7. The package structure as claimed in claim 2, wherein the warpage-control element has a second protruding portion extending into the substrate, and the second protruding portion partially surrounds a second corner of the region surrounded by the warpage-control element.
8. The package structure as claimed in claim 2, wherein the protruding portion comprises a plurality of protruding elements extending into the substrate, and the protruding elements together surround the region of the substrate surrounded by the warpage-control element.
9. The package structure as claimed in claim 2, wherein the chip-containing structure has a first side extending in a first direction, the chip-containing structure has a second side extending in a second direction, the first side is longer than the second side, the warpage-control element has a first portion extending in the first direction, the warpage-control element has a second portion extending in the second direction, and thefirst portion of the warpage-control element is wider than the second portion of the warpage-control element.
10. The package structure as claimed in claim 1, wherein the protruding portion of the warpage-control element comprises a ring structure surrounding a region of the substrate, and the chip-containing structure is positioned over the region.
11. A package structure, comprising:
a substrate;
a chip-containing structure over the substrate; and
a warpage-control element at least partially surrounding the chip-containing structure, wherein the warpage-control element has a protruding portion extending towards a bottom surface of the substrate.
12. The package structure as claimed in claim 11, wherein the protruding portion is in direct contact with the substrate.
13. The package structure as claimed in claim 11, wherein the warpage- control element has a second protruding portion extending through a top surface of the substrate.
14. The package structure as claimed in claim 11, wherein the protruding portion continuously surrounds the chip-containing structure.
15. The package structure as claimed in claim 11, wherein the warpage- control element surrounds a region of the substrate where the chip-containing structure is positioned, and the protruding portion partially surrounds a corner of the region surrounded by the warpage-control element.
16. A package structure, comprising:
a chip-containing structure over a substrate;
a warpage-control element beside the chip-containing structure, wherein the warpage-control element has a protruding portion in direct contact with the substrate; and
a adhesive layer between the warpage-control element and the substrate.
17. The package structure as claimed in claim 16, wherein the protruding portion extends through opposite surfaces of the adhesive layer.
18. The package structure as claimed in claim 16, wherein the warpage- control element laterally surrounds the chip-containing structure.
19. The package structure as claimed in claim 16, further comprising: a second chip-containing structure over the substrate, wherein the warpage- control clement laterally surrounds the second chip-containing structure. .
20. The package structure as claimed in claim 19, further comprising: a protective layer laterally surrounding the chip-containing structure and the second chip-containing structure, wherein the warpage-control element laterally surrounds the protective layer.
‘705:
1. A package structure, comprising: a substrate; a chip-containing structure bonded to the substrate; and a warpage-control element attached to the substrate, wherein the warpage-control element has a protruding portion extending into the substrate.
2. The package structure as claimed in claim 1, wherein the warpage-control element surrounds a region of the substrate, and the chip-containing structure is positioned over the region.
3. The package structure as claimed in claim 2, wherein the protruding portion partially surrounds a corner of the region surrounded by the warpage-control element.
4. The package structure as claimed in claim 3, wherein the chip-containing structure has a first side extending in a first direction, the chip-containing structure has a second side extending in a second direction, the first side is longer than the second side, the protruding portion has a first part extending in the first direction, the protruding portion has a second part extending in the second direction, and the first part and the second part have different lengths.
5. The package structure as claimed in claim 4, wherein the first part is longer than the second part.
6. The package structure as claimed in claim 3, wherein the protruding portion is adjacent to the corner of the region surrounded by the warpage-control element.
7. The package structure as claimed in claim 2, wherein the protruding portion comprises a plurality of protruding elements extending into the substrate, and the protruding elements together partially surround a corner of the region surrounded by the warpage-control element.
8. The package structure as claimed in claim 2, wherein the warpage-control element has a second protruding portion extending into the substrate, and the second protruding portion partially surrounds a second corner of the region surrounded by the warpage-control element.
9. The package structure as claimed in claim 2, wherein the protruding portion comprises a plurality of protruding elements extending into the substrate, and the protruding elements together surround the region of the substrate surrounded by the warpage-control element.
10. The package structure as claimed in claim 2, wherein the chip-containing structure has a first side extending in a first direction, the chip-containing structure has a second side extending in a second direction, the first side is longer than the second side, the warpage-control element has a first portion extending in the first direction, the warpage-control element has a second portion extending in the second direction, and the first portion of the warpage-control element is wider than the second portion of the warpage-control element.
11. The package structure as claimed in claim 1, wherein the protruding portion of the warpage-control element comprises a ring structure surrounding a region of the substrate, and the chip-containing structure is positioned over the region.
12. A package structure, comprising: a substrate; a chip-containing structure over the substrate; and a warpage-control element penetrating into the substrate, wherein the warpage-control element has a protruding portion extending towards a bottom surface of the substrate.
13. The package structure as claimed in claim 12, wherein the warpage-control element has a second protruding portion extending through a top surface of the substrate.
14. The package structure as claimed in claim 12, wherein the protruding portion continuously surrounds the chip-containing structure.
15. The package structure as claimed in claim 12, wherein the warpage-control element surrounds a region of the substrate where the chip-containing structure is positioned, and the protruding portion partially surrounds a corner of the region surrounded by the warpage-control element.
16. A package structure, comprising: a chip-containing structure bonded to a substrate; and a warpage-control element beside the chip-containing structure, wherein a topmost surface of the substrate is vertically between a topmost surface of the warpage-control element and a bottommost surface of the warpage-control element.
17. The package structure as claimed in claim 16, further comprising: an adhesive layer between the warpage-control element and the substrate.
18. The package structure as claimed in claim 17, wherein the warpage-control element has a protruding portion in direct contact with the substrate.
19. The package structure as claimed in claim 17, wherein the warpage-control element has a protruding portion separated from the substrate by the adhesive layer.
20. The package structure as claimed in claim 16, wherein the warpage-control element laterally surrounds the chip-containing structure.
In regards to the above claims, it is well known in the art that when a chip containing structure is formed it is bonded over (on top) a substrate.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to MICHAEL LEBENTRITT whose telephone number is (571)272-1873. The examiner can normally be reached IFP Mon- Fri 8:30 am- 6 pm.
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Sue Purvis can be reached at (571)272-1236. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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MICHAEL . LEBENTRITT
Primary Examiner
Art Unit 2893
/MICHAEL LEBENTRITT/ Primary Examiner, Art Unit 2893
Prosecution Insights