DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Information Disclosure Statement
The information disclosure statements (IDS) submitted on 07/16/2024 and 09/04/2024 were filed before the first action on the merits. The submissions are in compliance with the provisions of 37 CFR 1.97. Accordingly, the information disclosure statements are being considered by the examiner.
Double Patenting
The nonstatutory double patenting rejection is based on a judicially created doctrine grounded in public policy (a policy reflected in the statute) so as to prevent the unjustified or improper timewise extension of the “right to exclude” granted by a patent and to prevent possible harassment by multiple assignees. A nonstatutory double patenting rejection is appropriate where the conflicting claims are not identical, but at least one examined application claim is not patentably distinct from the reference claim(s) because the examined application claim is either anticipated by, or would have been obvious over, the reference claim(s). See, e.g., In re Berg, 140 F.3d 1428, 46 USPQ2d 1226 (Fed. Cir. 1998); In re Goodman, 11 F.3d 1046, 29 USPQ2d 2010 (Fed. Cir. 1993); In re Longi, 759 F.2d 887, 225 USPQ 645 (Fed. Cir. 1985); In re Van Ornum, 686 F.2d 937, 214 USPQ 761 (CCPA 1982); In re Vogel, 422 F.2d 438, 164 USPQ 619 (CCPA 1970); In re Thorington, 418 F.2d 528, 163 USPQ 644 (CCPA 1969). A timely filed terminal disclaimer in compliance with 37 CFR 1.321(c) or 1.321(d) may be used to overcome an actual or provisional rejection based on nonstatutory double patenting provided the reference application or patent either is shown to be commonly owned with the examined application, or claims an invention made as a result of activities undertaken within the scope of a joint research agreement. See MPEP § 717.02 for applications subject to examination under the first inventor to file provisions of the AIA as explained in MPEP § 2159. See MPEP § 2146 et seq. for applications not subject to examination under the first inventor to file provisions of the AIA . A terminal disclaimer must be signed in compliance with 37 CFR 1.321(b).
The filing of a terminal disclaimer by itself is not a complete reply to a nonstatutory double patenting (NSDP) rejection. A complete reply requires that the terminal disclaimer be accompanied by a reply requesting reconsideration of the prior Office action. Even where the NSDP rejection is provisional the reply must be complete. See MPEP § 804, subsection I.B.1. For a reply to a non-final Office action, see 37 CFR 1.111(a). For a reply to final Office action, see 37 CFR 1.113(c). A request for reconsideration while not provided for in 37 CFR 1.113(c) may be filed after final for consideration. See MPEP §§ 706.07(e) and 714.13.
The USPTO Internet website contains terminal disclaimer forms which may be used. Please visit www.uspto.gov/patent/patents-forms. The actual filing date of the application in which the form is filed determines what form (e.g., PTO/SB/25, PTO/SB/26, PTO/AIA /25, or PTO/AIA /26) should be used. A web-based eTerminal Disclaimer may be filled out completely online using web-screens. An eTerminal Disclaimer that meets all requirements is auto-processed and approved immediately upon submission. For more information about eTerminal Disclaimers, refer to www.uspto.gov/patents/apply/applying-online/eterminal-disclaimer. Claim 1 is rejected on the ground of nonstatutory double patenting as being unpatentable over claim 1 of U.S. Patent No. 12,112,990. Although the claims at issue are not identical, they are not patentably distinct from each other because claim 1 of U.S. Patent No. 12,112,990 recites all of the limitations in claim 1 of the instant application.
Claim 2 is rejected on the ground of nonstatutory double patenting as being unpatentable over claim 3 of U.S. Patent No. 12,112,990. Although the claims at issue are not identical, they are not patentably distinct from each other because claim 3 of U.S. Patent No. 12,112,990 recites all of the limitations in claim 2 of the instant application.
Claim 3 is rejected on the ground of nonstatutory double patenting as being unpatentable over claim 4 of U.S. Patent No. 12,112,990. Although the claims at issue are not identical, they are not patentably distinct from each other because claim 4 of U.S. Patent No. 12,112,990 recites all of the limitations in claim 3 of the instant application.
Claim 4 is rejected on the ground of nonstatutory double patenting as being unpatentable over claim 5 of U.S. Patent No. 12,112,990. Although the claims at issue are not identical, they are not patentably distinct from each other because claim 5 of U.S. Patent No. 12,112,990 recites all of the limitations in claim 4 of the instant application. Claim 5 is rejected on the ground of nonstatutory double patenting as being unpatentable over claim 6 of U.S. Patent No. 12,112,990. Although the claims at issue are not identical, they are not patentably distinct from each other because claim 6 of U.S. Patent No. 12,112,990 recites all of the limitations in claim 5 of the instant application. Claim 6 is rejected on the ground of nonstatutory double patenting as being unpatentable over claim 7 of U.S. Patent No. 12,112,990. Although the claims at issue are not identical, they are not patentably distinct from each other because claim 7 of U.S. Patent No. 12,112,990 recites all of the limitations in claim 6 of the instant application. Claim 7 is rejected on the ground of nonstatutory double patenting as being unpatentable over claim 1 of U.S. Patent No. 12,112,990. Although the claims at issue are not identical, they are not patentably distinct from each other because claim 1 of U.S. Patent No. 12,112,990 recites all of the limitations in claim 7 of the instant application.
Claim 8 is rejected on the ground of nonstatutory double patenting as being unpatentable over claim 8 of U.S. Patent No. 12,112,990. Although the claims at issue are not identical, they are not patentably distinct from each other because claim 8 of U.S. Patent No. 12,112,990 recites all of the limitations in claim 8 of the instant application.
Claim 9 is rejected on the ground of nonstatutory double patenting as being unpatentable over claim 9 of U.S. Patent No. 12,112,990. Although the claims at issue are not identical, they are not patentably distinct from each other because claim 9 of U.S. Patent No. 12,112,990 recites all of the limitations in claim 9 of the instant application.
Claim 10 is rejected on the ground of nonstatutory double patenting as being unpatentable over claim 10 of U.S. Patent No. 12,112,990. Although the claims at issue are not identical, they are not patentably distinct from each other because claim 10 of U.S. Patent No. 12,112,990 recites all of the limitations in claim 10 of the instant application. Claim 11 is rejected on the ground of nonstatutory double patenting as being unpatentable over claim 12 of U.S. Patent No. 12,112,990. Although the claims at issue are not identical, they are not patentably distinct from each other because claim 12 of U.S. Patent No. 12,112,990 recites all of the limitations in claim 11 of the instant application.
Claim 12 is rejected on the ground of nonstatutory double patenting as being unpatentable over claim 10 of U.S. Patent No. 12,112,990. Although the claims at issue are not identical, they are not patentably distinct from each other because claim 10 of U.S. Patent No. 12,112,990 recites all of the limitations in claim 12 of the instant application.
Claim 14 is rejected on the ground of nonstatutory double patenting as being unpatentable over claim 13 of U.S. Patent No. 12,112,990. Although the claims at issue are not identical, they are not patentably distinct from each other because claim 13 of U.S. Patent No. 12,112,990 recites all of the limitations in claim 14 of the instant application.
Claim 15 is rejected on the ground of nonstatutory double patenting as being unpatentable over claim 14 of U.S. Patent No. 12,112,990. Although the claims at issue are not identical, they are not patentably distinct from each other because claim 14 of U.S. Patent No. 12,112,990 recites all of the limitations in claim 15 of the instant application.
Claim 16 is rejected on the ground of nonstatutory double patenting as being unpatentable over claim 15 of U.S. Patent No. 12,112,990. Although the claims at issue are not identical, they are not patentably distinct from each other because claim 15 of U.S. Patent No. 12,112,990 recites all of the limitations in claim 16 of the instant application.
Claim 19 is rejected on the ground of nonstatutory double patenting as being unpatentable over claim 17 of U.S. Patent No. 12,112,990. Although the claims at issue are not identical, they are not patentably distinct from each other because claim 17 of U.S. Patent No. 12,112,990 recites all of the limitations in claim 19 of the instant application.
Claim 20 is rejected on the ground of nonstatutory double patenting as being unpatentable over claim 18 of U.S. Patent No. 12,112,990. Although the claims at issue are not identical, they are not patentably distinct from each other because claim 18 of U.S. Patent No. 12,112,990 recites all of the limitations in claim 20 of the instant application.
Prior art of record
Re claim 1, Zhu (2018/0033699) teaches a semiconductor device (Figs. 1-21) comprising: a semiconductor substrate (1002) comprising a p-well (p well) and an n-well (n well), the p-well being (p well) adjacent to the n-well (n well); an isolation region (1003) over the semiconductor substrate (1002); a first metal gate structure (1040) over the isolation region (1003); a second metal gate structure (1040) over the isolation region (1003) and adjacent to the first metal gate structure (1040) in a first cross-sectional view (Fig. 21); and a gate plug (1046, 1002-2) separating the first metal gate structure (1040) and the second metal gate structure (1040) in the first cross-sectional view (Fig. 21), wherein the gate plug (1046, 1002-2) is disposed between the p-well (p well) and the n-well (n well) in the first cross-sectional view (Fig. 21).
Zhu does not explicitly teach wherein a portion of the semiconductor substrate is in physical contact with and disposed between a first sidewall of a first portion of the gate plug and a second sidewall of a second portion of the gate plug in a second cross-sectional view, and wherein the second cross-sectional view is perpendicular to the first cross-sectional view. Re claim 8, Zhu (2018/0033699) teaches a semiconductor device (Figs. 1-21) comprising: a first source/drain region (“region beside F”); a second source/drain region (“region beside F”); an interlayer dielectric (ILD) (1036) around the first source/drain region (“region beside F”) and the second source/drain region (“region beside F”); a dielectric plug (1046) extending through a lower portion of the ILD (1036) between the first source/drain region (“region beside F”) and the second source/drain region (“region beside F”); and a source/drain contact (1048) electrically connected to the first source/drain region (“region beside F”) and the second source/drain region (“region beside F”), wherein the source/drain contact overlaps the dielectric plug.
Zhu does not explicitly teach wherein the source/drain contact overlaps the dielectric plug.
Re claim 15, Zang (US Pat. 9,911,736) teaches a semiconductor device (Figs. 1-12D) comprising: a semiconductor substrate (202); a shallow trench isolation (STI) region (203) over the semiconductor substrate (202); a first metal gate (216) and a second metal gate (256) over the STI region (203); and a dielectric plug (292) separating the first metal gate (216) from the second metal gate (256).
Zang does not explicitly teach wherein the dielectric plug extends along a top surface and sidewalls the semiconductor substrate in a first cross-sectional view, and wherein the dielectric plug narrows in a direction towards the semiconductor substrate in a second cross-sectional view that is perpendicular to the first cross-sectional view.
Allowable Subject Matter
The following is a statement of reasons for the indication of allowable subject matter: The prior art of record does not anticipate or make obvious the device of claim 1, including each of the limitations and specifically wherein a portion of the semiconductor substrate is in physical contact with and disposed between a first sidewall of a first portion of the gate plug and a second sidewall of a second portion of the gate plug in a second cross-sectional view, and wherein the second cross-sectional view is perpendicular to the first cross-sectional view, for the same reasons as mentioned for claim 1 in the prior art of record above. The prior art of record does not anticipate or make obvious the device of claim 8, including each of the limitations and specifically wherein the source/drain contact overlaps the dielectric plug, for the same reasons as mentioned for claim 8 in the prior art of record above.
The prior art of record does not anticipate or make obvious the device of claim 15, including each of the limitations and specifically wherein the dielectric plug extends along a top surface and sidewalls the semiconductor substrate in a first cross-sectional view, and wherein the dielectric plug narrows in a direction towards the semiconductor substrate in a second cross-sectional view that is perpendicular to the first cross-sectional view, for the same reasons as mentioned for claim 15 in the prior art of record above.
Conclusion
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/FERNANDO L TOLEDO/Supervisory Patent Examiner, Art Unit 2897
/ADAM S BOWEN/Examiner, Art Unit 2897