DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Status of the Application
Claims 21-40 remain pending in this application. Acknowledgement is made of the amendment received 09/18/2024. Claims 1-20 are canceled and claims 21-40 are added for consideration.
Specification
The title of the invention is not descriptive. A new title is required that is clearly indicative of the invention to which the claims are directed.
Priority
Applicant’s claim for the benefit of a prior-filed application under 35 U.S.C. 119(e) or under 35 U.S.C. 120, 121, 365(c), or 386(c) is acknowledged. Applicant has not complied with one or more conditions for receiving the benefit of an earlier filing date under 35 U.S.C. 119(e) as follows:
The later-filed application must be an application for a patent for an invention which is also disclosed in the prior application (the parent or original nonprovisional application or provisional application). The disclosure of the invention in the parent application and in the later-filed application must be sufficient to comply with the requirements of 35 U.S.C. 112(a) or the first paragraph of pre-AIA 35 U.S.C. 112, except for the best mode requirement. See Transco Products, Inc. v. Performance Contracting, Inc., 38 F.3d 551, 32 USPQ2d 1077 (Fed. Cir. 1994).
The disclosure of the prior-filed application, Application No. 63/255564, fails to provide adequate support or enablement in the manner provided by 35 U.S.C. 112(a) or pre-AIA 35 U.S.C. 112, first paragraph for one or more claims of this application.
Accordingly, claims 21-29, and 31-40 are not entitled to the benefit of the prior application:
Regarding claims 21-29, claim 21 recites the limitation “a second metal that is not a magnetic shielding material and has a higher conductivity than the first metal”, which is unsupported by the prior-filed application, and are therefore not entitled to the benefit. Claims 22-29 are dependent on claim 21 and are therefore not entitled to the benefit.
Regarding claim 31, claim 31 recites the limitation “wire of the first layer set have a composition that provides a higher conductivity than a composition of vias in the second layer set”, which is unsupported by the prior-filed application, and are therefore not entitled to the benefit.
Regarding claim 32, claim 32 recites the limitation “wires of the third layer set have a composition that provides a higher conductivity than a composition of vias in the second layer set”, which is unsupported by the prior-filed application, and are therefore not entitled to the benefit.
Regarding claim 33, claim 33 recites the limitation “wherein the magnetic shielding structure comprises wires or vias that … are coupled to ground, or dangle off electrically functional structures without connecting the electrically functional structures to other electrically functional structures”, which is unsupported by the prior-filed application, and are therefore not entitled to the benefit.
Regarding claims 34 and 35, claim 34 recites the limitation “the magnetic shielding material has a magnetic permeability greater than or equal to the magnetic permeability of cobalt”, which is unsupported by the prior-filed application, and are therefore not entitled to the benefit. Claim 35 is dependent on claim 34 and is therefore not entitled to the benefit.
Regarding claims 36-40, claim 36 recites the limitation “the second metal is not a magnetic shielding material and has a higher conductivity than the magnetic shielding material”, which is unsupported by the prior-filed application, and are therefore not entitled to the benefit. Claims 37-40 are dependent on claim 36 and are therefore not entitled to the benefit.
Claim Objections
Claims 21, 23, and 30 are objected to because of the following informalities:
Regarding claim 21, the claim recites “and lateral to MRAM cell block.”, it should read “and lateral to the MRAM cell block;”.
Regarding claim 23, the claim recites “and second one of the metallization layers”, it should read “and a second one of the metallization layers”.
Regarding claim 30, the claim recites “two or more of the metallization layer”, it should read “two or more of the metallization layers”.
Appropriate corrections are required.
Claim Rejections - 35 USC § 112
The following is a quotation of the first paragraph of 35 U.S.C. 112(a):
(a) IN GENERAL.—The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor or joint inventor of carrying out the invention.
The following is a quotation of the first paragraph of pre-AIA 35 U.S.C. 112:
The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor of carrying out his invention.
Claim 38 rejected under 35 U.S.C. 112(a) or 35 U.S.C. 112 (pre-AIA ), first paragraph, as failing to comply with the written description requirement. The claim(s) contains subject matter which was not described in the specification in such a way as to reasonably convey to one skilled in the relevant art that the inventor or a joint inventor, or for applications subject to pre-AIA 35 U.S.C. 112, the inventor(s), at the time the application was filed, had possession of the claimed invention.
Regarding claim 38, the claim recites the limitation "wherein the layer of the second metal forms a liner around the layer of the first metal within an individual one of the wires". The examiner is unable to find written support in the specification in such a way as to reasonably convey to one skilled in the relevant art, at the time the application was filed, that the applicant had possession of the claimed invention. Claim 36, from which claim 38 depends, requires “the first metal is a magnetic shielding material and the second metal is not a magnetic shielding material”, therefore, in order for the second metal to form a liner, as claimed, the liner must also not be a magnetic shielding material. However, it appears that only the opposite is supported, wherein a liner is only formed from a magnetic shielding material (Applicant Spec ¶0023, 0037, 0065).
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claim 26 and 27 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
Regarding claim 26, the claim recites the limitation "the first metal layer" in line 1 and “the second metal layer” in line 2. There is insufficient antecedent basis for these limitations in the claim. The examiner interprets the claim to have intended to state, “the first layer of the first metal” and “the second layer of the second metal”, respectively, in which case proper antecedent basis is established. The claim will be examined on the basis of this interpretation hereafter. Appropriate correction is required.
Regarding claim 27, the claim recites the limitation "the second metal layer" in line 1 and “the first metal layer” in line 2. There is insufficient antecedent basis for these limitations in the claim. The examiner interprets the claim to have intended to state, “the second layer of the second metal” and “the first layer of the first metal”, respectively, in which case proper antecedent basis is established. The claim will be examined on the basis of this interpretation hereafter. Appropriate correction is required.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 21, 22, 30-32, 34, and 35 are rejected under 35 U.S.C. 103 as being unpatentable over Wu et al (US 20230031478 A1, hereafter Wu) in view of Jiang et al (US 20160351792 A1, as cited in IDS dated 07/21/2024, hereafter Jiang).
Regarding claim 21, Wu teaches: An integrated circuit (IC) device (Wu 100, fig 7A, 7B, ¶0081-0084), comprising:
a semiconductor substrate (Wu 102, ¶0084);
a metal interconnect (Wu 103, 104, 106, 108, 110, 200, 730, ¶0084, 0085, 0109, fig 7A, 7B, ¶0109, “interconnect structures”, “metal layer”, ¶0109, “conductive materials … include high permeability (m) metals”, ¶0110) above the semiconductor substrate (Wu fig 7A, 7B);
a magnetoresistive random access memory (MRAM) cell block (Wu 124, 114, 116, 118, 120, ¶0080, 0090, 0095) disposed within the metal interconnect (Wu fig 7A, 7B, ¶0081, 0084-0085, 0099); and
a magnetic shielding structure (Wu 108, 110, 730, “cobalt”, ¶0110, “cobalt … as the magnetic shield”, ¶0081) for the MRAM cell block (Wu fig 7A, ¶0081, 0109-0111), wherein the magnetic shielding structure is within the metal interconnect (Wu fig 7A, 7B, ¶0081, 0109) and comprises portions above (Wu 730 filling 610), below (Wu 108, 110), and lateral (Wu 730 filling 410, 420) to MRAM cell block (as best understood to mean “the MRAM cell block;”)(Wu fig 7A, 7B, ¶0109-0111).
wherein the metal interconnect comprises metallization layers (Wu 104, 108, 110, 730 filling 610, under a broadest reasonable interpretation (BRI) of “metallization”, at least includes metal) having wires (Wu 104, Wu 730 filling 610, fig 7A-C, under a BRI of a “wire”) and via layers comprising vias (Wu 730, vertical portions filling 410 and 420, figs 7A, 7B, under a BRI of “vias”), wherein the via layers are between adjacent pairs of the metallization layers (Wu fig 7A, 7B), the magnetic shielding structure is provided by the wires and the vias (Wu 730, “cobalt”, ¶0110, “cobalt … as the magnetic shield”, ¶0081), the magnetic shielding structure comprises a first metal (Wu 730, “cobalt”, ¶0110) that is a magnetic shielding material (Wu 730, “cobalt”, ¶0110, “cobalt … as the magnetic shield”, ¶0081).
Wu does not explicitly teach: the metal interconnect comprises a second metal that is not a magnetic shielding material and has a higher conductivity than the first metal.
Jiang, in the same field of endeavor of semiconductor device manufacturing, teaches: a semiconductor substrate (Jiang 105, ¶0027);
a magnetoresistive random access memory (MRAM) cell block (Jiang 163, 164, 164a-d, ¶0026, “a plurality of MRAM cell regions”);
wherein a metal interconnect (Jiang M1-3, V1, V2, MTJ level, ¶0032-0033) comprises metallization layers (Jiang M1-M3, ¶0032, 0033) having wires (Jiang 133, 135, under a BRI of a “wire”) and via layers comprising vias (Jiang V1, V2, ¶0033)(Jiang fig 1, 2f), wherein the via layers are between adjacent pairs of the metallization layers (Jiang fig 1, V1 is between M1 and M2, V2 is between M2 and M3, respectively), and
a magnetic shielding structure (Jiang 200a-f, ¶0052) comprises a first metal (Jiang ¶0045, “Ni, Fe”) that is a magnetic shielding material (Jiang ¶0045) and
the metal interconnect comprises a second metal (Jiang ¶0029, “copper, copper alloy, aluminum”) that is not a magnetic shielding material (at least capable thereof; see MPEP 2112 and/or 2114, the applicant does not disclose copper as a metal used as a magnetic shielding material (spec ¶0036)) and has a higher conductivity than the first metal (copper having a higher electrical conductivity than Ni or Fe is well known to a person having ordinary skill in the art, however for completeness of the record see https://psec.uchicago.edu/Documents/electrical_conductivity.pdf).
It would have been obvious to one of ordinary skill in the art, before the effective filing date of the claimed invention, to modify Wu to include the additional metallization and via layers on a substrate as taught by Jiang, and such that the device of Wu includes “a second metal that is not a magnetic shielding material and has a higher conductivity than the first metal”, in order to provide for connections to various components of an integrated circuit (Jiang ¶0028, 0029).
Regarding claim 22, Wu in view of Jiang teaches: The IC device of claim 21, wherein the metallization layers (Wu 104, 108, 110, 730 as modified to include Jiang M1-M3) include a first metallization layer (Wu 104, similar to Jiang M2) and a second metallization layer (Wu 108, 110, similar to Jiang MTJ level), the second metallization layer is below the MRAM cell block (Wu 124, similar to Jiang 163, 164, 164a-d)(Wu fig 7A, 7B, similar to Jiang fig 1), the first metallization layer is below the second metallization layer (Wu fig 7A, 7B, similar to Jiang fig 1) and comprises the second metal (Jiang ¶0029, “copper, copper alloy, aluminum”).
Wu in view of Jiang does not teach: the second metallization layer comprises the first metal.
Jiang further teaches: a second metallization layer (Jiang MTJ level) comprises the first metal (Jiang 183, ¶0045, 0067), the second metallization layer is below a MRAM cell block (Jiang 163, 164, 164a-d, ¶0026).
It would have been obvious to one of ordinary skill in the art, before the effective filing date of the claimed invention, to modify the second metallization layer of Wu in view of Jiang to include the first metal of Jiang within the second metallization layer and below the MRAM cell block, as taught by Jiang, in order to protect the MRAM cell block from external and local magnetic fields from below (Jiang ¶0045, 0067).
Regarding claim 30, Wu teaches: An integrated circuit (IC) device (Wu 100, fig 1A, 7A, 7B, ¶0081-0084), comprising:
a semiconductor substrate (Wu 102, ¶0084);
a metal interconnect (Wu 103, 104, 106, 108, 110, 200, 730, ¶0084, 0085, 0109, fig 7A, 7B, ¶0109, “interconnect structures”, “metal layer”, ¶0109, “conductive materials … include high permeability (m) metals”, ¶0110); and
a magnetoresistive random access memory (MRAM) cell block (Wu 124, 114, 116, 118, 120, ¶0080, 0090, 0095);
wherein the metal interconnect comprises a first layer set (Wu 103, 104) comprising one or more metallization layers (Wu 104, under a broadest reasonable interpretation of “metallization”, is a level that at least includes metal), a second layer set (Wu 106, 108, 200, 730) comprising one or more metallization or via layers (Wu 108, ¶0086, 0087), wherein each of the metallization layers comprises wires (Wu 104, 108, 730 filling 610, fig 7A-C, under BRI of a “wire”), and via layers (Wu 730 filling 410/420, under a BRI of “vias”) are disposed between adjacent metallization layers (Wu fig 7A, 7B);
the second layer set (Wu 106, 108, 200, 730) is above the first layer set (Wu 103, 104)(Wu fig 7A, 7B);
the MRAM cell block is over the first layer set and within the second layer set (Wu fig 7A, 7B);
the second layer set comprises a magnetic shielding material (Wu 730, “cobalt”, ¶0110, “cobalt … as the magnetic shield”, ¶0081); and
the second layer set forms a magnetic shielding structure around the MRAM cell block (Wu fig 7A, ¶0111).
Wu does not teach: a third layer set comprising one or more metallization layers;
the third layer set is above the second layer set; and
the first layer set comprises two or more of the metallization layer (as best understood to mean “layers”).
Jiang, in the same field of endeavor of semiconductor device manufacturing, teaches: a semiconductor substrate (Jiang 105, ¶0027);
a magnetoresistive random access memory (MRAM) cell block (Jiang 163, 164, 164a-d, ¶0026, “a plurality of MRAM cell regions”);
wherein a metal interconnect (Jiang CA, M1-4, V1, V2, MTJ level, ¶0032-0033) comprises a first layer set (Jiang M1-M3, V1, V2) comprising one or more metallization layers (Jiang M1-M3, ¶0032, 0033), a second layer set (Jiang MTJ level) comprising one or more metallization or via layers (Jiang 165, 166), and a third layer set (Jiang M4) comprising one or more metallization layers (Jiang 155), wherein each of the metallization layers comprises wires (Jiang 133, 135, 155, under a BRI of a “wire”), and via layers (Jiang V1, V2, ¶0033) are disposed between adjacent metallization layers (Jiang fig 1);
the third layer set (Jiang M4) is above the second layer set (Jiang MTJ level)(Jiang fig 1);
the second layer set (Jiang MTJ level) is above the first layer set (Jiang M1-M3, V1, V2)(Jiang fig 1);
the first layer set (Jiang M1-M3, V1, V2) comprises two or more of the metallization layer (Jiang M1, M2, M3).
It would have been obvious to one of ordinary skill in the art, before the effective filing date of the claimed invention, to modify Wu to include the additional metallization and via layers on a substrate as taught by Jiang, and such that the device of Wu includes “a third layer set comprising one or more metallization layers; the third layer set is above the second layer set; and the first layer set comprises two or more of the metallization layers”, in order to provide for connections to various components of an integrated circuit (Jiang ¶0028, 0029).
Regarding claim 31, Wu in view of Jiang teaches: wherein wires (Wu 104, Jiang 133, 135, ¶0035) of the first layer set (Wu 103, 104 as modified to include Jiang M1-M3, V1, V2) have a composition (Jiang ¶0029, “copper, copper alloy, aluminum, tungsten or a combination thereof”) that provides a higher conductivity than a composition of vias (Wu 730 filling 410/420, under a BRI of “via”, “cobalt”, ¶0110, “cobalt … as the magnetic shield”, ¶0081) in the second layer set (Wu 106, 108, 200, 730, similar to Jiang MTJ level)(copper having a higher electrical conductivity than cobalt is well known to a person having ordinary skill in the art, however for completeness of the record see https://psec.uchicago.edu/Documents/electrical_conductivity.pdf).
Regarding claim 32, Wu in view of Jiang teaches: wherein wires (Jiang 155) of the third layer set (Wu as modified to include Jiang M4) have a composition (Jiang ¶0029, “copper, copper alloy, aluminum, tungsten or a combination thereof”) that provides a higher conductivity than a composition of vias (Wu 730 filling 410/420, under a BRI of “via”, “cobalt”, ¶0110, “cobalt … as the magnetic shield”, ¶0081) in the second layer set (Wu 106, 108, 200, 730, similar to Jiang MTJ level)(copper having a higher electrical conductivity than cobalt is well known to a person having ordinary skill in the art, however for completeness of the record see https://psec.uchicago.edu/Documents/electrical_conductivity.pdf).
Regarding claim 34, Wu in view of Jiang teaches: The IC device of claim 30, wherein the magnetic shielding material (Wu 730, “cobalt”, ¶0110, “cobalt … as the magnetic shield”, ¶0081) has a magnetic permeability greater than or equal to the magnetic permeability of cobalt (cobalt having a magnetic permeability equal to that of cobalt).
Regarding claim 35, Wu in view of Jiang teaches: The IC device of claim 34, wherein the first layer set (Wu 103, 104 as modified to include Jiang M1-M3, V1, V2) comprises aluminum or copper (Jiang ¶0029, “copper, copper alloy, aluminum”).
Claims 25 and 26 are rejected under 35 U.S.C. 103 as being unpatentable over Wu et al (US 20230031478 A1, hereafter Wu) in view of Jiang et al (US 20160351792 A1, as cited in IDS dated 07/21/2024, hereafter Jiang), as applied to claim 21 above, and further in view of Preusse et al (US 20160104638 A1, as cited in IDS dated 12/05/2024, hereafter Preusse).
Regarding claim 25, Wu in view of Jiang teaches: The IC device of claim 21.
Wu in view of Jiang does not teach: wherein one of the wires comprises a first layer of the first metal and a second layer of the second metal.
Preusse, in the same field of endeavor of semiconductor device manufacturing, teaches: forming a layer of a first metal (Preusse 201, ¶0036, 0037, fig 2, “cobalt”) and a layer of a second metal (Preusse 301, 401, ¶0026, 0058, 0068, fig 3, 4, “copper”) in an opening (Preusse 108-110, fig 2-4).
It would have been obvious to one of ordinary skill in the art, before the effective filing date of the claimed invention, to modify the wires the magnetic shielding structure of Wu in view of Jiang with the that of Preusse, such that “one of the wires comprises a first layer of the first metal and a second layer of the second metal”, in order to improve the electrically conductive properties of the magnetic shielding structure, and/or reduce the manufacturing cost or complexity, and/or to improve of the adhesion of a metal within an opening (Preusse ¶0009, 0079).
Regarding claim 26, Wu in view of Jiang and Preusse teaches: The IC device of claim 25, wherein the first metal layer (as best understood to mean “the first layer of the first metal”)(Wu 730 as modified by Preusse, similar to Preusse 201) is below the second metal layer (as best understood to mean “the second layer of the second metal”)(Wu 730 as modified by Preusse 301, 401)(Preusse fig 5, ¶, 301, 401 deposited after and on top of 201).
Claims 36, 37, 39, and 40 are rejected under 35 U.S.C. 103 as being unpatentable over Wu et al (US 20230031478 A1, hereafter Wu) in view of Jiang et al (US 20160351792 A1, as cited in IDS dated 07/21/2024, hereafter Jiang) and Preusse et al (US 20160104638 A1, as cited in IDS dated 12/05/2024, hereafter Preusse).
Regarding claim 36, Wu teaches: An integrated circuit (IC) device (Wu 100, fig 1A, 7A, 7B, ¶0081-0084), comprising:
a semiconductor substrate (Wu 102, ¶0084);
a metal interconnect (Wu 103, 104, 106, 108, 110, 200, 730, ¶0084, 0085, 0109, fig 7A, 7B, ¶0109, “interconnect structures”, “metal layer”, ¶0109, “conductive materials … include high permeability (m) metals”, ¶0110) above the semiconductor substrate (Wu fig 7A, 7B), wherein the metal interconnect comprises metallization layers (Wu 104, 108, 730, under a BRI of “metallization”, at least includes metal) having wires (Wu 104, 108, 730 filling 610, fig 7A-C, under BRI of a “wire”) and via layers comprising vias (Wu 730 filling 410/420, under a BRI of “vias”), and one of the via layers (Wu 730 filling 410/420) is between a pair of the metallization layers (Wu 108, 730 filling 610) that is adjacent;
a magnetoresistive random access memory (MRAM) cell block (Wu 124, 114, 116, 118, 120, ¶0080, 0090, 0095) disposed within the metal interconnect (Wu fig 7A, 7B, ¶0081, 0084-0085, 0099); and
a magnetic shielding structure (Wu 730, “cobalt”, ¶0110, “cobalt … as the magnetic shield”, ¶0081) around the MRAM cell block (Wu fig 7A, ¶0111);
wherein the metal interconnect provides the magnetic shielding structure (Wu ¶0111);
some of the wires (Wu 730) comprise a layer of a first metal (Wu 730, ¶0110, “cobalt”); and
the first metal is a magnetic shielding material (Wu ¶0081, “cobalt … as the magnetic shield”).
Wu does not teach: one of the via layers is between each pair of the metallization layers that is adjacent.
Jiang, in the same field of endeavor of semiconductor device manufacturing, teaches: a semiconductor substrate (Jiang 105, ¶0027);
a metal interconnect (Jiang M1-3, V1, V2, MTJ level, ¶0032-0033) above the semiconductor substrate (Jiang fig 1), wherein the metal interconnect comprises metallization layers (Jiang M1-M3, ¶0032, 0033) having wires (Jiang 133, 135, under a BRI of a “wire”) and via layers comprising vias (Jiang V1, V2, ¶0033), and one of the via layers (Jiang V1, V2) is between each pair of the metallization layers that is adjacent (Jiang fig 1, V1 is between M1 and M2, V2 is between M2 and M3, respectively); and
a magnetoresistive random access memory (MRAM) cell block (Jiang 163, 164, 164a-d, ¶0026, “a plurality of MRAM cell regions”) disposed within the metal interconnect (Jiang fig 1).
It would have been obvious to one of ordinary skill in the art, before the effective filing date of the claimed invention, to modify Wu to include the additional metallization and via layers on a substrate as taught by Jiang, and such that the device of Wu includes “one of the via layers is between each pair of the metallization layers that is adjacent”, in order to provide for connections to various components of an integrated circuit (Jiang ¶0028, 0029).
Wu in view of Jiang does not teach: some of the wires comprise a layer of a first metal and a layer of a second metal; and
the second metal is not a magnetic shielding material and has a higher conductivity than the magnetic shielding material.
Preusse, in the same field of endeavor of semiconductor device manufacturing, teaches: forming a layer of a first metal (Preusse 201, ¶0036, 0037, fig 2, “cobalt”) and a layer of a second metal (Preusse 301, 401, ¶0026, 0058, 0068, fig 3, 4, “copper”) in an opening (Preusse 108-110, fig 2-4), wherein
the second metal is not a magnetic shielding material (at least capable thereof; see MPEP 2112 and/or 2114, the applicant does not disclose copper as a metal used as a magnetic shielding material (spec ¶0036)) and has a higher electrical conductivity than the first metal (copper having a higher electrical conductivity than cobalt is well known to a person having ordinary skill in the art, however for completeness of the record see https://psec.uchicago.edu/Documents/electrical_conductivity.pdf).
It would have been obvious to one of ordinary skill in the art, before the effective filing date of the claimed invention, to modify the wires the magnetic shielding structure of Wu in view of Jiang with the that of Preusse, and to include the second metal of Preusse, such that “some of the wires comprise a layer of a first metal and a layer of a second metal; and the second metal is not a magnetic shielding material and has a higher conductivity than the magnetic shielding material”, in order to improve the electrically conductive properties of the magnetic shielding structure, and/or reduce the manufacturing cost or complexity, and/or to improve of the adhesion of a metal within an opening (Preusse ¶0009, 0079).
Regarding claim 37, Wu in view of Jiang and Preusse teaches: The IC device of claim 36, wherein the layer of the first metal (Wu 730 as modified by Preusse, similar to Preusse 201) forms a liner (Preusse ¶0038) around the layer of the second metal (Wu 730 as modified by Preusse 301, 401) within an individual one of the wires (Preusse fig 5).
Regarding claim 39, Wu in view of Jiang and Preusse teaches: The IC device of claim 36, wherein the layer of the second metal (Wu 730 as modified by Preusse 301, 401) is above the layer of the first metal (Wu 730 as modified by Preusse, similar to Preusse 201) within an individual one of the wires (Preusse fig 5, ¶, 301, 401 deposited after and on top of 201).
Regarding claim 40, Wu in view of Jiang and Preusse teaches: The IC device of claim 36, wherein some of the vias (Wu 730 filling 410/420) are composed of the magnetic shielding material (Wu 730, “cobalt”, ¶0110, “cobalt … as the magnetic shield”, ¶0081).
Claims 29 and 33 are rejected under 35 U.S.C. 103 as being unpatentable over Wu et al (US 20230031478 A1, hereafter Wu) in view of Jiang et al (US 20160351792 A1, as cited in IDS dated 07/21/2024, hereafter Jiang), as applied to claims 21 or 30 above, and further in view of Yu et al (US 20180158749 A1, as cited in IDS dated 12/05/2024, hereafter Yu).
Regarding claim 29, Wu in view of Jiang teaches: The IC device of claim 21, wherein the magnetic shielding structure (Wu 108, 110, 730, similar to Jiang 200a-f) comprises one of the wires (Wu 730 filling 610) or one of the vias (Wu 730 filling 410, 420).
Wu in view of Jiang does not explicitly teach: the one of the wires or the one of the vias is floating
Yu, in the same field of endeavor of semiconductor device manufacturing, teaches: a floating via (Yu 525, ¶0089 “dummy vias, i.e., floating or not electrically coupled to any device or metal feature in substrate”).
It would have been obvious to one of ordinary skill in the art, before the effective filing date of the claimed invention, to modify Wu in view of Jiang to include floating vias and/or wires in order to provide and/or improve thermal conduction within the device (Yu ¶0093).
Regarding claim 33, Wu in view of Jiang teaches: The IC device of claim 30.
Wu in view of Jiang does not explicitly teach: wherein the magnetic shielding structure comprises wires or vias that are floating, are coupled to ground, or dangle off electrically functional structures without connecting the electrically functional structures to other electrically functional structures.
Yu, in the same field of endeavor of semiconductor device manufacturing, teaches: a floating via (Yu 525, ¶0089 “dummy vias, i.e., floating or not electrically coupled to any device or metal feature in substrate”).
It would have been obvious to one of ordinary skill in the art, before the effective filing date of the claimed invention, to modify Wu in view of Jiang to include floating vias and/or wires in order to provide and/or improve thermal conduction within the device (Yu ¶0093).
Allowable Subject Matter
Claims 23, 24, 27, and 28 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
Claim 27 would be allowable if rewritten to overcome the rejection(s) under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), 2nd paragraph, set forth in this Office action and to include all of the limitations of the base claim and any intervening claims.
The following is a statement of reasons for the indication of allowable subject matter:
Regarding claim 23, it is allowable primarily because the prior arts of record, singly or in combination, neither anticipates nor renders obvious the following limitations when taken in combination with all other limitations:
a first of the metallization layers is between the MRAM cell block and second one of the metallization layers. (Applicant fig 2A, ¶0032).
Wu in view of Jiang teaches: The IC device of claim 21, wherein a second one of the metallization layers (Wu 730 within 610) comprises a portion of the magnetic shielding structure (Wu 108, 110, 730) that is above the MRAM cell block (Wu 124, similar to Jiang 163, 164, 164a-d)(Wu fig 7A, 7B).
Neither Wu nor Jiang, either alone or in combination, teaches: a first of the metallization layers is between the MRAM cell block and second one of the metallization layers, as required by claim 23.
Therefore, Wu in view of Jiang in combination discloses some of the features of the claimed invention, but there is no motivation/teaching and does not render obvious to combine and/or modify Wu, Jiang, Preusse, Yu, or any other prior arts of record so that all of limitations of claim 23 as a whole can be met.
Regarding claim 24, it is allowable primarily because the prior arts of record, singly or in combination, neither anticipates nor renders obvious the following limitations when taken in combination with all other limitations:
wherein the magnetic shielding structure comprises two concentric rings of vias around the MRAM cell block. (Applicant fig 3, ¶0035).
Wu in view of Jiang teaches: The IC device of claim 21, wherein the magnetic shielding structure (Wu 108, 110, 730, similar to Jiang 200a-200f) comprises vias (Wu 730 filling 410/420) around the MRAM cell block (Wu 124, similar to Jiang 163, 164, 164a-d)(Wu fig 7A-C).
Jiang further teaches: a magnetic shielding structure (Jiang 200a-200f) comprises a concentric ring (Jiang 193, fig 2a) around a MRAM cell block (Jiang 163, 164, 164a-d)(Jiang fig 2a).
Neither Wu nor Jiang, either alone or in combination, teaches: a first of the metallization layers is between the MRAM cell block and second one of the metallization layers, as required by claim 24.
Therefore, Wu in view of Jiang in combination discloses some of the features of the claimed invention, but there is no motivation/teaching and does not render obvious to combine and/or modify Wu, Jiang, Preusse, Yu, or any other prior arts of record so that all of limitations of claim 24 as a whole can be met.
Regarding claim 27, it is allowable primarily because the prior arts of record, singly or in combination, neither anticipates nor renders obvious the following limitations when taken in combination with all other limitations:
the second metal layer (as best understood to mean “the second layer of the second metal”) is below the first metal layer (as best understood to mean “the first layer of the first metal”). (Applicant fig 5, ¶0038).
Wu in view of Jiang and Preusse teaches: The IC device of claim 25, wherein the first layer of the first metal (Wu 730 as modified by Preusse, similar to Preusse 201) is below the second layer of the second metal (Wu 730 as modified by Preusse 301, 401)(Preusse fig 5, ¶, 301, 401 deposited after and on top of 201).
Neither Wu nor Jiang, either alone or in combination, teaches: the second metal layer (as best understood to mean “the second layer of the second metal”) is below the first metal layer (as best understood to mean “the first layer of the first metal”), as required by claim 27.
Therefore, Wu in view of Jiang in combination discloses some of the features of the claimed invention, but there is no motivation/teaching and does not render obvious to combine and/or modify Wu, Jiang, Preusse, Yu, or any other prior arts of record so that all of limitations of claim 27 as a whole can be met.
Regarding claim 28, it is allowable primarily because the prior arts of record, singly or in combination, neither anticipates nor renders obvious the following limitations when taken in combination with all other limitations:
one of the wires comprises the second metal and is directly over and in contact with a first via of the first metal, and the first via is lateral to the MRAM cell block and part of the magnetic shielding structure. (Applicant fig 5, ¶0038).
Wu in view of Jiang teaches: The IC device of claim 21, wherein one of the wires (Wu 730 filling 610, under a BRI of a “wire”) is directly over and in contact with a first via (Wu 730 filling 410, 420, under a BRI of “via”) of the first metal (Wu 730, “cobalt”, ¶0110), and the first via is lateral to the MRAM cell block (Wu 124) and part of the magnetic shielding structure (Wu 108, 110, 730)(Wu fig 7A, 7B).
Neither Wu nor Jiang, either alone or in combination, teaches: the one of the wires comprises a second metal, as required by claim 28.
Therefore, Wu in view of Jiang in combination discloses some of the features of the claimed invention, but there is no motivation/teaching and does not render obvious to combine and/or modify Wu, Jiang, Preusse, Yu, or any other prior arts of record so that all of limitations of claim 28 as a whole can be met.
Conclusion
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/NICHOLAS B. MICHAUD/
EXAMINER
Art Unit 2818
/BRIAN TURNER/Primary Examiner, Art Unit 2818
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