Prosecution Insights
Last updated: October 01, 2026
Application No. 18/779,109

SEMICONDUCTOR PACKAGE AND MANUFACTURING METHOD THEREOF

Non-Final OA §102§103§112
Filed
Jul 22, 2024
Priority
Jul 17, 2019 — divisional of 11/018,083 +2 more
Examiner
NGUYEN, DAO H
Art Unit
Tech Center
Assignee
Taiwan Semiconductor Manufacturing Company, Ltd.
OA Round
1 (Non-Final)
91%
Grant Probability
Favorable
1-2
OA Rounds
0m
Est. Remaining
97%
With Interview

Examiner Intelligence

Grants 91% — above average
91%
Career Allowance Rate
1164 granted / 1274 resolved
+31.4% vs TC avg
Moderate +6% lift
Without
With
+5.7%
Interview Lift
resolved cases with interview
Fast prosecutor
1y 11m
Avg Prosecution
39 currently pending
Career history
1294
Total Applications
across all art units

Statute-Specific Performance

§101
0.6%
-39.4% vs TC avg
§103
35.8%
-4.2% vs TC avg
§102
54.5%
+14.5% vs TC avg
§112
5.8%
-34.2% vs TC avg
Black line = Tech Center average estimate • Based on career data from 1274 resolved cases

Office Action

§102 §103 §112
DETAILED ACTION 1. The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . This Office Action is in response to the communications dated 07/22/2024. Claims 1-20 are pending in this application. Acknowledges 2. Receipt is acknowledged of the following items from the Applicant. Information Disclosure Statement (IDS) filed on 07/22/2024. The references cited on the PTOL 1449 form have been considered. Applicant is requested to cite any relevant prior art if being aware on form PTO-1449 in accordance with the guidelines set for in M.P.E.P. 609. Specification 3. The specification has been checked to the extent necessary to determine the presence of possible minor errors. However, the applicant's cooperation is requested in correcting any errors of which applicant may become aware in the specification. Claim Rejections - 35 USC § 112 4. The following is a quotation of 35 U.S.C. 112: (b) CONCLUSION.— The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention. 5. Claim 2 is rejected under 35 U.S.C. 112(b) as being indefinite for failing to particularly point out and distinctly claim the subject matter which applicant regards as the invention. Claim 2 recites “wherein the through encapsulant structures extend to the same height...”. It is unclear that the through encapsulant is “the same height” as what, or to the height of what, or compared to what. The claim is therefore indefinite. Claim Rejection – Non-Statutory Double Patenting 6. The non-statutory double patenting rejection is based on a judicially created doctrine grounded in public policy (a policy reflected in the statute) so as to prevent the unjustified or improper timewise extension of the "right to exclude" granted by a patent and to prevent possible harassment by multiple assignees. See In re Goodman, 11 F.3d 1046, 29 USPQ2d 2010 (Fed. Cir. 1993); In re Longi, 759 F.2d 887, 225 USPQ 645 (Fed. Cir. 1985); In re Van Ornum, 686 F.2d 937, 214 USPQ 761 (CCPA 1982); In re Vogel, 422 F.2d 438, 164 USPQ 619 (CCPA 1970);and, In re Thorington, 418 F.2d 528, 163 USPQ 644 (CCPA 1969). A timely filed terminal disclaimer in compliance with 37 CFR 1.321(c) may be used to overcome an actual or provisional rejection based on a non-statutory double patenting ground provided the conflicting application or patent is shown to be commonly owned with this application. See 37 CFR 1.130(b). Effective January 1, 1994, a registered attorney or agent of record may sign a terminal disclaimer. A terminal disclaimer signed by the assignee must fully comply with 37 CFR 3.73(b). 7. Claim 15 is rejected under the judicially created doctrine of obviousness-type double patenting as being unpatentable over claim 16 of U.S. Patent No. 12,131,986. Although the conflicting claims are not identical, they are not patentably distinct from each other because it would have been obvious to one of ordinary skill in the art at the time of the invention was made that the claims of the Patent recite all claimed limitations of the instant application. The claims of the instant application are merely describing the limitations of the Patent in different ways, and they are obviously anticipated by the claims of the Patent. See the claimed element mapping below for details: Pending Claim(s) Claim(s) of Patent No. US 12,131,986: 15. A semiconductor package, comprising: a first redistribution structure; a semiconductor die, attached onto the first redistribution structure; an encapsulant, formed on the first redistribution structure and laterally encapsulating the semiconductor die; through encapsulant structures, disposed around the semiconductor die and extending through the encapsulant from the first redistribution structure, and respectively comprising: an insulating core; and a conductive layer, wrapping around the insulating core; a second redistribution structure, covering the encapsulant, the through encapsulant structures and the semiconductor die; and an antenna package, stacked on the second redistribution structure. 16. A semiconductor package, comprising: a first redistribution structure; a semiconductor die, attached onto the first redistribution structure; an encapsulant, disposed on the first redistribution structure, and laterally encapsulating the semiconductor die; through via structures, distributed around the semiconductor die in the encapsulant, and respectively comprising: a first insulating core; and a first conductive layer wrapping around the first insulating core; a second redistribution structure, disposed on the encapsulant; and an antenna package, attached onto the second redistribution structure. Claim Rejections - 35 USC § 102 8. The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale or otherwise available to the public before the effective filing date of the claimed invention. (a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention. 9. Claims 1-10 are rejected under 35 U.S.C. 102(a)(2) as being anticipated by Huang et al. (US 2020/0388600) Regarding claim 1, Huang discloses a semiconductor package, comprising: a redistribution structure 16 (see Fig. 1); a semiconductor die 20, attached to a top surface of the redistribution structure 16; an encapsulant 12 or 12 & 22, formed on the top surface of the redistribution structure and laterally encapsulating the semiconductor die 20; and through encapsulant structures 131 & 132, disposed around the semiconductor die 20 and extending through the encapsulant 12/22 from the top surface of the redistribution structure 16, and respectively comprising: an insulating core 132; and a conductive layer 131, wrapping around the insulating core 132. Regarding claim 2, Huang discloses the semiconductor package according to claim 1, wherein the through encapsulant structures 131 & 132 extend to the same height (as the encapsulant 12/22) from the top surface of the redistribution structure 16. See Fig. 1. Regarding claim 3, Huang discloses the semiconductor package according to claim 1, wherein the conductive layers 131 further cover top surfaces of the insulating cores 132. See Fig. 1. Regarding claim 4, Huang discloses the semiconductor package according to claim 3, wherein the conductive layers 131 have top surfaces substantially coplanar with a top surface of the encapsulant 12/22. See Fig. 1. Regarding claim 5, Huang discloses the semiconductor package according to claim 1, wherein the insulating cores 132 are laterally surrounded by the conductive layers 131, without being capped by the conductive layers 131 (Fig. 1 shows conductive layers 131 extend to bottom surface of upper electrode 13a). Regarding claim 6, Huang discloses the semiconductor package according to claim 5, wherein topmost surfaces of the conductive layers 131 and top surfaces of the insulating cores 132 are substantially coplanar with a top surface of the encapsulant 12/22. See Fig. 1. Regarding claim 7, Huang discloses the semiconductor package according to claim 5, further comprising conductive pads 13a, respectively covering one of the through encapsulant structures 131 & 132. See Fig. 1. Regarding claim 8, Huang discloses the semiconductor package according to claim 7, wherein the conductive pads 13a are in direct contact with both the insulating cores 132 and the conductive layers 131. See Fig. 1. Regarding claim 9, Huang discloses the semiconductor package according to claim 7, wherein a footprint area of each conductive pad 13a is larger than a footprint area of the underlying through encapsulant structure 131 & 132. See Fig. 1. Regarding claim 10, Huang discloses the semiconductor package according to claim 1, wherein a group of the through encapsulant structures 131 &132 are configured as dipole antennas. See Fig. 1. Claim Rejections - 35 U.S.C. § 103 10. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102 of this title, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. 11. Claims 1-3, and 10-20 are rejected under 35 U.S.C. 103 as being unpatentable over Lee et al. (US 2020/0035607) in view of Huang et al. (US 2020/0388600). Regarding claim 1, Lee discloses a semiconductor package, comprising: a passivation layer 255 (see Fig. 9, Fig. 15); a semiconductor die 221 or 222, attached to a top surface of the passivation layer 255; an encapsulant 230, formed on the top surface of the passivation layer and laterally encapsulating the semiconductor die 221/222; and through encapsulant structures 210 (see Figs. 9, 11A, 11D), disposed around the semiconductor die 221/222 and extending through the encapsulant 230 from the top surface of the passivation layer, and respectively comprising: an insulating core 215 ; and a conductive layer 211, wrapping around the insulating core 215. Lee does not disclose: a redistribution structure on which the semiconductor die is attached. Huang discloses: a semiconductor package, comprising: a redistribution structure 16 (see Fig. 1); a semiconductor die 20, attached to a top surface of the redistribution structure 16; and an encapsulant 12 or 12 & 22, formed on the top surface of the redistribution structure and laterally encapsulating the semiconductor die 20. It would have been obvious to one of ordinary skills in the art at the time the invention was made to modify the invention of Lee to further comprise a redistribution layer, wherein the semiconductor die and the encapsulant are attached to the top surface of the redistribution layer, as that/those taught by Huang, in order to allow additional accesses or electrical connections to the package, thereby to improve the performance of the package. Regarding claim 2, Lee/Huang discloses the semiconductor package according to claim 1, wherein the through encapsulant structures 210 extend to the same height (as the encapsulant 230) from the top surface of the redistribution structure. See Fig. 9 of Lee. Regarding claim 3, Lee/Huang discloses the semiconductor package according to claim 1, wherein the conductive layers 215 further cover top surfaces of the insulating cores 211. See Fig. 9. Regarding claim 10, Lee/Huang discloses the semiconductor package according to claim 1, wherein a group of the through encapsulant structures 210 are configured as dipole antennas. See Figs. 9, 15, and para. 0072 of Lee. Regarding claim 11, Lee discloses a semiconductor package, comprising: a passivation layer 255 (see Fig. 9, Fig. 15); a semiconductor die 221 or 222, attached to a top surface of the passivation layer 255; an encapsulant 230, formed on the top surface of the passivation layer and laterally encapsulating the semiconductor die 221/222; and through encapsulant structures 210 (see Figs. 9, 11A, 11D), disposed around the semiconductor die 221/222 and extending through the encapsulant 230 from the top surface of the passivation layer, and respectively comprising: an insulating core 215; and a conductive layer 211, wrapping around the insulating core 215; and an electromagnetic shielding layer 292S (Fig. 9, para. 0096), laterally extending in between the semiconductor die 221, 222 and the passivation layer 255. Lee does not disclose: a redistribution structure on which the semiconductor die is attached. Huang discloses: a semiconductor package, comprising: a redistribution structure 16 (see Fig. 1); a semiconductor die 20, attached to a top surface of the redistribution structure 16; and an encapsulant 12 or 12 & 22, formed on the top surface of the redistribution structure and laterally encapsulating the semiconductor die 20. It would have been obvious to one of ordinary skills in the art at the time the invention was made to modify the invention of Lee to further comprise a redistribution layer, wherein the semiconductor die and the encapsulant are attached to the top surface of the redistribution layer, as that/those taught by Huang, in order to allow additional accesses or electrical connections to the package, thereby to improve the performance of the package. Regarding claim 12, Lee/Huang discloses the semiconductor package according to claim 11, wherein the electromagnetic shielding layer 292S extends to reach the conductive layers of closest ones of the through encapsulant structures 210. See Fig. 9 of Lee. Regarding claim 13, Lee/Huang discloses the semiconductor package according to claim 11, wherein the semiconductor die 221 or 222 is smaller in footprint area than the electromagnetic shielding layer 292S. See Fig. 9 of Lee. Regarding claim 14, Lee/Huang discloses the semiconductor package according to claim 11, wherein a back side of the semiconductor die 221/222 faces toward the electromagnetic shielding layer 292S, whereas a front side of the semiconductor die formed with conductive components 221P/222P faces away from the electromagnetic shielding layer 292S. See Fig. 9 of Lee. Regarding claim 15, Lee discloses a semiconductor package, comprising: a first passivation layer 255 (see Fig. 9, Fig. 15); a semiconductor die 221/222, attached onto the first passivation layer 255; an encapsulant 230, formed on the first passivation structure and laterally encapsulating the semiconductor die; through encapsulant structures 210 (see Figs. 9, 11A, 11D), disposed around the semiconductor die 221/222 and extending through the encapsulant 230 from the first passivation layer 255, and respectively comprising: an insulating core 215; and a conductive layer 211, wrapping around the insulating core 215; a second redistribution structure 240 & 250, covering the encapsulant 230, the through encapsulant structures 210 and the semiconductor die 221/222; and an antenna package 100, stacked on the second redistribution structure. Lee does not disclose: a first redistribution structure on which the semiconductor die is attached. Huang discloses: a semiconductor package, comprising: a redistribution structure 16 (see Fig. 1); a semiconductor die 20, attached to a top surface of the redistribution structure 16; and an encapsulant 12 or 12 & 22, formed on the top surface of the redistribution structure and laterally encapsulating the semiconductor die 20. It would have been obvious to one of ordinary skills in the art at the time the invention was made to modify the invention of Lee to further comprise a redistribution layer, wherein the semiconductor die and the encapsulant are attached to the top surface of the redistribution layer, as that/those taught by Huang, in order to allow additional accesses or electrical connections to the package, thereby to improve the performance of the package. Regarding claim 16, Lee/Huang discloses the semiconductor package according to claim 15, wherein a first group of the through encapsulant structures 210 are configured as dipole antennas, and the antenna package comprises patch antennas at opposite sides of an antenna die. See Fig. 9, and para. 0072 of Lee. Regarding claim 17, Lee/Huang discloses the semiconductor package according to claim 16, wherein the semiconductor die is laterally surrounded by the patch antennas 210, and the patch antennas are laterally surrounded by the dipole antennas 100. See Fig. 9 of Lee. Regarding claim 18, Lee/Huang discloses the semiconductor package according to claim 17, wherein a second group of the through encapsulant structures are distributed between the patch antennas and the dipole antennas in a plan view. See Fig. 9 of Lee. Regarding claim 19, Lee/Huang discloses the semiconductor package according to claim 15, further comprising an electromagnetic shielding layer 292S extending in between the semiconductor die 221/222 and the first redistribution structure. See Fig. 9, and para. 0096 of Lee. Regarding claim 20, Lee/Huang discloses the semiconductor package according to claim 15, further comprising: first electrical connectors 270, disposed between the second redistribution structure 240 & 250 and the antenna package 100 (Fig. 9 of Lee); and second electrical connectors, disposed at a side of the first redistribution structure 17 (Fig. 1 of Huang) that faces away from the second redistribution structure. Conclusion 12. A shortened statutory period for response to this action is set to expire 3 (three) months and 0 (zero) day from the day of this letter. Failure to respond within the period for response will cause the application to become abandoned (see M.P.E.P 710.02(b)). A shortened time for reply may be extended up to the maximum six-month period (35 U.S.C. 133). An extension of time fee is normally required to be paid if the reply period is extended. The amount of the fee is dependent upon the length of the extension. Extensions of time are generally not available after an application has been allowed. Any inquiry concerning this communication or earlier communications from the examiner should be directed to Dao H. Nguyen whose telephone number is (571)272-1791. The examiner can normally be reached on Monday-Friday, 9:00 AM – 5:00 PM. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Steven Loke, can be reached on (571)272-1657. The fax numbers for all communication(s) is 571-273-8300. Any inquiry of a general nature or relating to the status of this application or proceeding should be directed to the receptionist whose telephone number is (571)272-1633. /DAO H NGUYEN/Primary Examiner, Art Unit 2818 September 19, 2026
Read full office action

Prosecution Timeline

Jul 22, 2024
Application Filed
Sep 23, 2026
Non-Final Rejection mailed — §102, §103, §112 (current)

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Prosecution Projections

1-2
Expected OA Rounds
91%
Grant Probability
97%
With Interview (+5.7%)
1y 11m (~0m remaining)
Median Time to Grant
Low
PTA Risk
Based on 1274 resolved cases by this examiner. Grant probability derived from career allowance rate.

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