DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Double Patenting
Claims 1-20 rejected on the ground of nonstatutory double patenting as being unpatentable over claims 1-21 of U.S. Patent No.12142560b2. Although the claims at issue are not identical, they are not patentably distinct from each other because the claims of 17408840 could be used to reject the claims of 18779329, as the claims of 18779329 are broader than 17408840. Redistribution structures comprise one or more dielectric layers comprising conductive lines and vias electrically connecting top and bottom surfaces of the redistribution structure.
18779329
17408840 now US-12142560-B2
1. A semiconductor package comprising: a first die and a second die that are spaced apart from each other; a redistribution structure bonded to the first die and the second die, wherein the redistribution structure comprises: a first conductive via disposed in a first insulating layer; and a second conductive via in a second insulating layer, the second conductive via electrically connecting the first conductive via to an external connector of the semiconductor package, wherein a diameter of the first conductive via decreases in a direction towards the second conductive via, and wherein a diameter of the second conductive via decreases in a direction towards the first conductive via, and wherein the first insulating layer physically contacts the second insulating layer; and a molding compound encapsulating the first die and the second die, the molding compound being disposed over the redistribution structure.
1. (Currently amended) A semiconductor package comprising: a first die; one or more second dies adjacent the first die, wherein the one or more second dies is separated from the first die; a redistribution structure bonded to the first die and the one or more second dies, wherein the redistribution structure comprises: a first redistribution layer comprising a first conductive line in a first dielectric layer, the first conductive line having a first thickness measured be a bottom surface of the first dielectric layer to a top surface of the first conductive line in the first dielectric layer; a second redistribution layer comprising a second conductive line in a second dielectric layer, the second conductive line having a second thickness measured between a bottom surface of the second dielectric layer and a top surface of the second conductive line in the second dielectric layer; a third redistribution layer comprising a third conductive line in a third dielectric layer, the third dielectric layer is between the first dielectric layer and the second dielectric layer, the third conductive line having a third thickness greater than the first thickness of the first conductive line and the second thickness of the second conductive line, wherein the third thickness is measured from a bottom surface of the third dielectric layer to a top surface of the third conductive line in the third dielectric layer; a first conductive via electrically connected to the second redistribution layer and a second conductive via electrically connecting the first conductive via to an external connector of the semiconductor package, wherein a diameter of the first conductive via decreases in a direction towards the second conductive via, and wherein a diameter of the second conductive via decreases in a direction towards the first conductive via, and wherein the first conductive via physically contacts the second conductive via an underfill between the first die and the redistribution structure; and a molding compound encapsulating the first die, the one or more second dies, and the underfill, wherein the molding compound contacts the first die and is disposed between the first die and the one or more second dies.
11. A semiconductor package comprising: a molding compound encapsulating a first device die and a second device die; and a redistribution structure bonded to the first device die and the second device die, and wherein the redistribution structure comprises: a plurality of vertically stacked signal lines; a first conductive via electrically connected to a first signal line of the plurality of vertically stacked signal lines; and a second conductive via physically contacting the first conductive via and an external connector, wherein a diameter of the first conductive via increases in a direction away from the second conductive via, and wherein a diameter of the second conductive via increases in a direction away from the first conductive via.
9. (Original) A semiconductor package comprising: a molding compound encapsulating a first device and a second device; a redistribution structure flip chip bonded to the first device and the second device, and wherein the redistribution structure comprises: a ground line between a first signal line and a second signal line, wherein the ground line, the first signal line, and the second signal line are stacked in a vertical direction; a first conductive via over and electrically connected to the second signal line; and a second conductive via extending from the first conductive via to an external connector, wherein a diameter of the first conductive via increases in a direction away from the second conductive via, and wherein a diameter of the second conductive via decreases in a direction towards the first conductive via; and an underfill between the first device and the redistribution structure, wherein the molding compound contacts a fillet of the underfill.
16. A semiconductor package comprising: a molding compound encapsulating a first device die and a second device die; and a redistribution structure bonded to the first device die and the second device die, and wherein the redistribution structure comprises: a plurality of vertically stacked signal lines; a first conductive via electrically connected to a first signal line of the plurality of vertically stacked signal lines; a first insulating layer around the first conductive via; and an external connector extending into the first insulating layer and electrically connected to the first conductive via, wherein a width of the first conductive via increases in a direction away from the external connector.
15. (Original) A semiconductor package comprising: a molding compound encapsulating a first device and a second device; a redistribution structure flip chip bonded to the first device and the second device, and wherein the redistribution structure comprises: a ground line between a first signal line and a second signal line, wherein the ground line, the first signal line, and the second signal line are stacked in a vertical direction; a first conductive via electrically connected to the second signal line, the first conductive via in a first polymer layer; and a second conductive via extending from the first conductive via to an external connector, wherein second conductive via is disposed on a second polymer layer, and wherein the first polymer layer and the second polymer layer are made of different materials; and an underfill disposed between the first device and the redistribution structure.
16. A semiconductor package comprising: a molding compound encapsulating a first device die and a second device die; and a redistribution structure bonded to the first device die and the second device die, and wherein the redistribution structure comprises: a plurality of vertically stacked signal lines; a first conductive via electrically connected to a first signal line of the plurality of vertically stacked signal lines; a first insulating layer around the first conductive via; and an external connector extending into the first insulating layer and electrically connected to the first conductive via, wherein a width of the first conductive via increases in a direction away from the external connector.
9. (Original) A semiconductor package comprising: a molding compound encapsulating a first device and a second device; a redistribution structure flip chip bonded to the first device and the second device, and wherein the redistribution structure comprises: a ground line between a first signal line and a second signal line, wherein the ground line, the first signal line, and the second signal line are stacked in a vertical direction; a first conductive via over and electrically connected to the second signal line; and a second conductive via extending from the first conductive via to an external connector, wherein a diameter of the first conductive via increases in a direction away from the second conductive via, and wherein a diameter of the second conductive via decreases in a direction towards the first conductive via; and an underfill between the first device and the redistribution structure, wherein the molding compound contacts a fillet of the underfill.
Conclusion
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/LAWRENCE C TYNES JR./Examiner, Art Unit 2899
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