DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Information Disclosure Statement
The information disclosure statement (IDS) submitted on 07/22/2024 is in compliance with the provisions of 37 CFR 1.97. Accordingly, the information disclosure statement is being considered by the examiner.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claims 1, 5-8 and 11 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by US PG Pub 2018/0315828 to Yamashita et al (hereinafter Yamashita).
Regarding Claim 1, Yamashita discloses a semiconductor structure, comprising:
a nanostructure (404, Fig. 4) including a first connection portion, a second connection portion and a channel portion disposed between the first connection portion and the second connection portion (examiner considers the narrowing ends of the nanostructure to comprise connection portions);
a first inner spacer feature (502/504; Fig. 5) disposed over and in contact with the first connection portion;
a second inner spacer feature (502/504) disposed under and in contact with the first connection portion; and
a gate structure (1404, Fig. 14) wrapping around the channel portion of the nanostructure,
wherein the first inner spacer feature includes a first surface adjacent the gate structure and a second surface away from the gate structure (Fig. 14),
wherein the first surface has a first height along a vertical direction and the second surface has a second height along the vertical direction (Fig. 14),
wherein the second surface comprises a concave surface (Figs. 4, 5 & 14).
Regarding Claim 5, Yamashita discloses the semiconductor structure of Claim 1, wherein the first inner spacer feature comprises an outer layer (504) and an inner layer (502), wherein the outer layer is spaced part from the nanostructure along the vertical direction by the inner layer (Fig. 5).
Regarding Claim 6, Yamashita discloses the semiconductor structure of Claim 5, wherein a dielectric constant of the inner layer is greater than a dielectric constant of the outer layer (SiN vs SiOC; [0035]).
Regarding Claim 7, Yamashita discloses the semiconductor structure of Claim 5, wherein the outer layer is spaced part from the gate structure by the inner layer, where the inner layer is in contact with the gate structure (Fig. 14).
Regarding Claim 8, Yamashita discloses the semiconductor structure of Claim 5, wherein a density of the inner layer is greater than a density of the outer layer (SiN vs SiOC; [0035]).
Regarding Claim 11, Yamashita discloses a semiconductor structure, comprising:
a first source/drain feature and a second source/drain feature (1002, Fig. 14);
a first nanostructure and a second nanostructure (404, Fig. 5) extending between the first source/drain feature and the second source/drain feature along a first direction, the second nanostructure being disposed over the first nanostructure along a second direction perpendicular to the first direction;
a gate structure (1404, Fig. 14) wrapping around each of the first and second nanostructures; and
a first inner spacer feature (502/504) disposed between the first nanostructure and the second nanostructure, the first inner spacer feature being adjacent the gate structure; and
a second inner spacer feature (502/504) disposed over the second nanostructure and adjacent the gate structure,
wherein the first inner spacer includes a first surface adjacent the gate structure and a second surface away from the gate structure (Fig. 5),
wherein the first surface has a first height along the second direction and the second surface has a second height along the second direction (Fig. 5),
wherein the first height is smaller than the second height (Fig. 5).
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 9 and 10 are rejected under 35 U.S.C. 103 as being unpatentable over Yamashita.
Regarding Claims 9 and 10, Yamashita discloses the semiconductor structure of Claim 5, but does not explicitly disclose wherein the inner layer comprises silicon carbonitride or silicon oxycarbonitride, wherein the outer layer comprises silicon oxycarbide, porous silicon oxycarbide, or fluorine-doped silicon oxide or wherein the outer layer and inner layer comprise silicon, carbon, oxygen, and nitrogen, wherein an oxygen content of the inner layer is smaller than an oxygen content of the outer layer, wherein a nitrogen content of the inner layer is greater than a nitrogen content of the outer layer.
However, it would have been obvious to one of ordinary skill in the art, before the effective filing date of the invention, to have modified the inner and outer layers of Yamashita to comprise the materials claimed by Applicant. Yamashita discloses an inner layer with a greater density than the outer layer and a higher dielectric constant than the outer layer. Yamashita also discloses a desire to have the etch selectivity of the layers be different [0035]. Given those requirements, the materials listed by Applicant fit within the scope of Yamashita and would have been obvious to select from absent any unexpected results by Applicant.
Double Patenting
The nonstatutory double patenting rejection is based on a judicially created doctrine grounded in public policy (a policy reflected in the statute) so as to prevent the unjustified or improper timewise extension of the “right to exclude” granted by a patent and to prevent possible harassment by multiple assignees. A nonstatutory double patenting rejection is appropriate where the conflicting claims are not identical, but at least one examined application claim is not patentably distinct from the reference claim(s) because the examined application claim is either anticipated by, or would have been obvious over, the reference claim(s). See, e.g., In re Berg, 140 F.3d 1428, 46 USPQ2d 1226 (Fed. Cir. 1998); In re Goodman, 11 F.3d 1046, 29 USPQ2d 2010 (Fed. Cir. 1993); In re Longi, 759 F.2d 887, 225 USPQ 645 (Fed. Cir. 1985); In re Van Ornum, 686 F.2d 937, 214 USPQ 761 (CCPA 1982); In re Vogel, 422 F.2d 438, 164 USPQ 619 (CCPA 1970); In re Thorington, 418 F.2d 528, 163 USPQ 644 (CCPA 1969).
A timely filed terminal disclaimer in compliance with 37 CFR 1.321(c) or 1.321(d) may be used to overcome an actual or provisional rejection based on nonstatutory double patenting provided the reference application or patent either is shown to be commonly owned with the examined application, or claims an invention made as a result of activities undertaken within the scope of a joint research agreement. See MPEP § 717.02 for applications subject to examination under the first inventor to file provisions of the AIA as explained in MPEP § 2159. See MPEP § 2146 et seq. for applications not subject to examination under the first inventor to file provisions of the AIA . A terminal disclaimer must be signed in compliance with 37 CFR 1.321(b).
The filing of a terminal disclaimer by itself is not a complete reply to a nonstatutory double patenting (NSDP) rejection. A complete reply requires that the terminal disclaimer be accompanied by a reply requesting reconsideration of the prior Office action. Even where the NSDP rejection is provisional the reply must be complete. See MPEP § 804, subsection I.B.1. For a reply to a non-final Office action, see 37 CFR 1.111(a). For a reply to final Office action, see 37 CFR 1.113(c). A request for reconsideration while not provided for in 37 CFR 1.113(c) may be filed after final for consideration. See MPEP §§ 706.07(e) and 714.13.
The USPTO Internet website contains terminal disclaimer forms which may be used. Please visit www.uspto.gov/patent/patents-forms. The actual filing date of the application in which the form is filed determines what form (e.g., PTO/SB/25, PTO/SB/26, PTO/AIA /25, or PTO/AIA /26) should be used. A web-based eTerminal Disclaimer may be filled out completely online using web-screens. An eTerminal Disclaimer that meets all requirements is auto-processed and approved immediately upon submission. For more information about eTerminal Disclaimers, refer to www.uspto.gov/patents/apply/applying-online/eterminal-disclaimer.
Claims 2-4 and 12-20 rejected on the ground of nonstatutory double patenting as being unpatentable over Claims 1-20 of U.S. Patent No. 11,682,714 to Wu et al (hereinafter Wu or cited patent) in view of Yamashita.
Claims 2 and 12 require the nanostructures further comprise a first ridge extending upward along the vertical direction from an interface between the channel portion and the first connection portion. Such a feature can be found in Claims 1, 11 and 16 of the cited patent. The claims differ from the cited patent by including the limitation that the inner spacers comprise a concave shape.
Yamashita discloses a nanostructure having concave shaped inner spacers (502/504, Fig. 5).
It would have been an obvious modification of Wu to have concave shaped inner spacers since they provide for a gap between the inner spacers and the gate structure that can be filled by the gate dielectric as seen in Yamashita or can be filled by the channel portions as seen in Wu.
Claims 3 and 4 depend on Claim 2 and their limitations can be found in patented Claims 11 and 12.
Claims 13 and 14 depend on Claim 12 and their limitations can be found in patented Claims 11-13.
Claim 15 recites limitations similar to Claims 2 and 12 if written in independent form. It differs from the cited patent by requiring the inner spacers be concave. It is similarly found to be obvious in view of the cited patent and Yamashita.
Claims 16-20 depend on Claim 15 and their limitations can be found in patented Claims 11, 13, and 17.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to DAVID C SPALLA whose telephone number is (303)297-4298. The examiner can normally be reached Mon-Fri 10am-5pm MST.
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/DAVID C SPALLA/ Primary Examiner, Art Unit 2893
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