DETAILED ACTION
This action is responsive to the election received on 07/06/2026
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Election/Restrictions
Applicant’s election without traverse of Species E (Figure 34A) in the reply filed on 07/06/2026 is acknowledged. Claim(s) 6 and 11-12 is/are withdrawn from further consideration pursuant to 37 CFR 1.142(b) as being drawn to a nonelected species, there being no allowable generic or linking claim.
Information Disclosure Statement
The information disclosure statement(s) (IDS) submitted on 07/23/2024, 12/04/2024, 06/03/2025, 06/25/2025, 08/06/2025, and 01/28/2026 has/have been considered by the examiner and made of record in the application file.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
Claim(s) 15, 16, and 18 is/are rejected under 35 U.S.C. 102(a)(1)/(a)(2) as being anticipated by US 2020/0365692 A1; Jung et al.; 11/2020; (“Jung”).
Regarding Claim 15. Jung discloses A device comprising:
a source/drain (central #250, Figure 19, source drain layer) region comprising:
a first epitaxial layer (right side of left structure, middle #230, Figure 19, first epitaxial layer), the first epitaxial layer comprising a first semiconductor material, the first semiconductor material comprising a semiconductor element and a blocker element ([0081]-[0084], #230 is made by the first SEG process to include single crystalline silicon carbide with n-type impurities; i.e. #230 includes silicon and blocker element carbon); and
a second epitaxial layer (#240, Figure 19, second epitaxial layer) on the first epitaxial layer (Figure 19, #240 is on #230), the second epitaxial layer comprising a second semiconductor material and an n-type dopant ([0085]-[0088], #240 is made by the second SEG process to include single crystalline silicon with n-type impurities; i.e. #240 includes silicon and n-type dopants), the first semiconductor material having a greater concentration of the blocker element than the second semiconductor material (([0081]-[0084], [0085]-[0088], i.e. #230 may have a greater carbon concentration than #240 since only #230 may include the carbon source), the second epitaxial layer having a greater concentration of the n-type dopant than the first epitaxial layer ([0046], “first and second epitaxial layers 230 and 240 may have first and second impurity concentrations, respectively, and the second impurity concentration may be greater than the first impurity concentration”, i.e. #240 has a greater n-type dopant concentration then #230); and
a nanostructure (left #124, Figure 19, left semiconductor patterns) adjacent the first epitaxial layer of the source/drain region (Figure 19, #240 is adjacent to #124s);
a gate structure (#330, Figure 19, gate structure) around the nanostructure (Figure 19, #330 is around #124s); and
a spacer (#185, Figure 19, gate spacer) between the gate structure and the source/drain region (Figure 19, #185 is between #330 and #250).
Regarding Claim 16. Jung discloses The device of claim 15, wherein the blocker element is carbon ([0083], carbon is included as the blocker element in the first SEG process) and the n-type dopant is phosphorous or arsenic ([0083] and [0086], phosphorous is provided as the n-type impurity).
Regarding Claim 18. Jung discloses The device of claim 15, wherein the second epitaxial layer is in physical contact with the spacer (Figure 19, #240 is in direct physical contact with #185).
Claim(s) 15 and 17 is/are rejected under 35 U.S.C. 102(a)(1)/(a)(2) as being anticipated by US 2020/0168716 A1; Peng et al.; 05/2020; (“Peng”).
Regarding Claim 15. Peng discloses A device (Figure 13) comprising:
a source/drain region (#50’, Figure 13, S/D epitaxial layer) comprising:
a first epitaxial layer (#52’, Figure 13, first epitaxial layer), the first epitaxial layer comprising a first semiconductor material, the first semiconductor material comprising a semiconductor element and a blocker element ([0080], #52’ may be SiC including silicon and carbon blocking material); and
a second epitaxial layer (#54’, Figure 13, second epitaxial layer) on the first epitaxial layer (Figure 13, #54’ is on #52’), the second epitaxial layer comprising a second semiconductor material and an n-type dopant ([0080], #54’ may be SiAs), the first semiconductor material having a greater concentration of the blocker element than the second semiconductor material ([0080], #52’ has a greater carbon concentration since #54’ does not include carbon), the second epitaxial layer having a greater concentration of the n-type dopant than the first epitaxial layer ([0080], #54’ has a greater arsenic concentration since #52’ does not include arsenic); and
a nanostructure (#25, Figure 13, semiconductor layers) adjacent the first epitaxial layer of the source/drain region (Figure 13, #25s are adjacent to #52’);
a gate structure (#86, Figure 12, gate electrode layer) around the nanostructure (Figure 13, #86 is wrapped around #25s); and
a spacer (#40, Figure 13, cover layer or gate spacer) between the gate structure and the source/drain region (Figure 13, #40 is between #86 and #50’).
Regarding Claim 17. Peng discloses The device of claim 15, wherein the first epitaxial layer is in physical contact with the spacer (Figure 13, #40 is in physical contact with #52’ at the corner near where 56’ and 54’ meet).
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 1-3, 7, and 20 is/are rejected under 35 U.S.C. 103 as being unpatentable over US 2020/0365692 A1; Jung et al.; 11/2020; (“Jung”) as applied to claim 15 above, and further in view of US 2022/0069134 A1; Kim et al.; 03/2022; (“Kim”).
Regarding Claim 1. Jung discloses A device (Figure 19, semiconductor device) comprising:
a first nanostructure (left #124s, Figure 19, left semiconductor patterns);
a source/drain region (central #250, Figure 19, source drain layer) adjoining a first channel region (topmost #124, Figure 19) of the first nanostructure (Figure 19, #250 is adjoined with the topmost #124 of the left semiconductor patterns), the source/drain region comprising:
a main layer (#240, Figure 19, second epitaxial layer); and
a first liner layer (right side of left structure, middle #230, Figure 19, first epitaxial layer) between the main layer and the first nanostructure (Figure 19, the middle #230 is between #240 and the left gate/channel structure), a carbon concentration of the first liner layer being greater than a carbon concentration of the main layer ([0081]-[0084], #230 is made by the first SEG process to include single crystalline silicon carbide with n-type impurities; [0085]-[0088], #240 is made by the second SEG process to include single crystalline silicon with n-type impurities; i.e. #230 may have a greater carbon concentration than #240);
an inter-layer dielectric (#270, Figure 19, insulation layer) on the source/drain region (Figure 19, #270 is located on the central #250).
Jung does not disclose a contact extending through the inter-layer dielectric, the contact connected to the main layer, the contact spaced apart from the first liner layer. However, Jung does teach in [0051] that contact plugs may be formed to be electrically connected with the source/drain layers (#250).
Kim teaches a semiconductor structure (#100, Figure 2A) comprising a first nanostructure (left #160 and #140, gate and channel structures) with a source/drain region adjoined to it (central #150, source/drain regions) comprising a first liner (#152) between the nanostructure and a main layer (#154), and an interlayer dielectric on the source/drain region (#190); and a contact (#180) extending through the inter-layer dielectric (Figure 2A, #180 extends through #190), the contact connected to the main layer (Figure 2A, #180 is directly electrically connected to #154), the contact spaced apart from the first liner layer (Figure 9, #180 is spaced apart from #152).
Since Jung is silent regarding the structure of the source/drain contacts, this would motivate one of ordinary skill to seek out teachings such as Kim in order to practice the invention of Jung. It would have been obvious to one of ordinary skill in the art, prior to the effective filing date of the claimed invention, to consider forming the contact structures through the ILD layers from Kim since doing so provides an electrical connection through a hole in the ILD layer (see [0104] of Kim) allowing for the transmission of electrical signals to and from the source/drain regions.
Regarding Claim 2. Jung in view of Kim disclose The device of claim 1 further comprising:
a second nanostructure (Jung, right #124s, Figure 19, right semiconductor patterns; Kim, right #140s, Figure 2A, channel structures), the source/drain region adjoining a second channel region of the second nanostructure (Jung, Figure 19, right semiconductor patterns are adjoined to central #250; Kim, Figure 2A, right channel structures are adjoined to central #150),
wherein the source/drain region further comprises:
a second liner layer (Jung, middle #230 on the right nanostructure, Figure 19; Kim, #151, Figure 2A, first epitaxial layer) between the main layer and the second nanostructure (Jung, Figure 19,middle #230 on the right nanostructure is between #240 and the right nanostructure; Kim, Figure 2A, #151 is between #154 and the right nanostructure), the main layer having a first width between the first liner layer and the second liner layer (Jung, Figure 19, #240 has a width between the left and right #230s on opposing nanostructures; Kim, Figure 2A, #154 has a width between the left portion of #152 and the right portion of #151), the contact having a second width, the second width less than the first width (Kim, Figure 2A, #180 has a width at its bottom surface that is less than the width of #154 between the left portion of #152 and the right portion of #151).
Regarding Claim 3. Jung in view of Kim disclose The device of claim 1, wherein the source/drain region further comprises:
a finishing layer (Kim, #155, Figure 2A, fifth epitaxial layer) on the main layer (Kim, Figure 2A, #155 is located on #154), the carbon concentration of the first liner layer being greater than a carbon concentration of the finishing layer (Kim, [0036] and [0043], #152 is doped with carbon to prevent germanium or impurity diffusion into the channel layers, i.e. #152 has a greater carbon concentration than #155).
Regarding Claim 7. Jung in view of Kim disclose The device of claim 1 further comprising:
a second nanostructure (Jung, right #124s, Figure 19, right semiconductor patterns; Kim, right #140s, Figure 2A, channel structures), the source/drain region adjoining a second channel region of the second nanostructure (Jung, Figure 19, right semiconductor patterns are adjoined to central #250; Kim, Figure 2A, right channel structures are adjoined to central #150));
a gate structure (Jung, #330, Figure 19, gate structure; Kim, #160, Figure 2A, gate structure) wrapped around the first channel region of the first nanostructure and around the second channel region of the second nanostructure (Jung, Figure 19, gate structures #330 are wrapped around channel regions #124 of both nanostructures; Kim, Figure 2A, gate structures #160 are wrapped around channel structures #140 of both nanostructures); and
a spacer (Jung, #185, Figure 19, gate spacer) between the gate structure and the source/drain region (Jung, Figure 19, #185 is located between #330 and #240), the main layer contacting the spacer (Jung, Figure 19, #185 is contacted by #240),
wherein the source/drain region further comprises:
a second liner layer (Jung, middle #230 on the right nanostructure, Figure 19) between the main layer and the second nanostructure (Jung, Figure 19,middle #230 on the right nanostructure is between #240 and the right nanostructure), the second liner layer separated from the first liner layer (Jung, Figure 19, middle #230s on adjacent nanostructures are separated from each other by the main layer #240).
Regarding Claim 20. Jung discloses The device of claim 15, further comprising:
an inter-layer dielectric (#270, Figure 19, insulation layer) on the source/drain region (Figure 19, #270 is located on the central #250).
Jung does not disclose a contact extending through the inter-layer dielectric to contact the second epitaxial layer of the source/drain region. However, Jung does teach in [0051] that contact plugs may be formed to be electrically connected with the source/drain layers (#250).
Kim teaches a semiconductor structure (#100, Figure 2A) comprising a first nanostructure (left #140s, channel structures) with a source/drain region adjoined to it (central #150, source/drain regions) comprising a first epitaxial layer (#152), a second epitaxial layer (#154) and an interlayer dielectric on the source/drain region (#190); and a contact (#180) extending through the inter-layer dielectric (Figure 2A, #180 extends through #190), to contact the second epitaxial layer of the source/drain region (Figure 2A, #180 is directly electrically connected to #154).
Since Jung is silent regarding the structure of the source/drain contacts, this would motivate one of ordinary skill to seek out teachings such as Kim in order to practice the invention of Jung. It would have been obvious to one of ordinary skill in the art, prior to the effective filing date of the claimed invention, to consider forming the contact structures through the ILD layers from Kim since doing so provides an electrical connection through a hole in the ILD layer (see [0104] of Kim) allowing for the transmission of electrical signals to and from the source/drain regions.
Claim(s) 4-5 is/are rejected under 35 U.S.C. 103 as being unpatentable over US 2020/0365692 A1; Jung et al.; 11/2020; (“Jung”) in view of US 2022/0069134 A1; Kim et al.; 03/2022; (“Kim”), as applied to claim 1 above, and further in view of US 2019/0348500 A1; Glass et al.; 11/2019; (“Glass”).
Regarding Claim 4. Jung in view of Kim disclose The device of claim 1, wherein the carbon concentration of the main layer is zero (Jung, [0086], the second SEG process may not use the carbon source gas to form single crystalline silicon doped with n-type impurities such that the carbon concentration is zero in #240; Kim, [0037], “the epitaxial layers adjacent to the second epitaxial layer 152 may not contain carbon”, i.e. #154 may have zero carbon concentration).
Jung in view of Kim do not disclose that the carbon concentration of the first liner layer is in a range of 0.1 at% to 2 at%. Jung teaches only that the carbon is present as silicon carbide in [0083]. Kim teaches that the carbon concentration may be in the range of 0.5 atomic % to about 4 atomic % in [0036].
However, Glass teaches in [0024] that carbon may be alloyed with portions of a S/D region in several possible ranges including a range of 1-2 at% in order to “achieve dopant diffusion barrier benefits and thereby help prevent short channel effects, without undesirably sacrificing other transistor performance areas”.
This is interpreted by the examiner as routine optimization (see MPEP 2144.05.II). It would have been obvious to one of ordinary skill in the art prior to the effective filing date of the claimed invention to consider providing the carbon in a range of 1-2 at.% as taught by Glass, which is within the claimed range, in the device of Jung in view of Kim in order to balance the diffusion barrier effects of carbon while also maintaining the high conductivity (or low resistivity) of the S/D regions (see [0024] of Glass).
Regarding Claim 5. Jung in view of Kim disclose The device of claim 1, wherein the carbon concentration of the main layer is in a range of 0 at% to 2 at% (Jung, [0086], the second SEG process may not use the carbon source gas to form single crystalline silicon doped with n-type impurities such that the carbon concentration is zero in #240; Kim, [0037], “the epitaxial layers adjacent to the second epitaxial layer 152 may not contain carbon”, i.e. #154 may have zero carbon concentration).
Jung in view of Kim do not disclose that the carbon concentration of the first liner layer is in a range of 0.1 at% to 2 at%. Jung teaches only that the carbon is present as silicon carbide in [0083]. Kim teaches that the carbon concentration may be in the range of 0.5 atomic % to about 4 atomic % in [0036].
However, Glass teaches in [0024] that carbon may be alloyed with portions of a S/D region in several possible ranges including a range of 1-2 at% in order to “achieve dopant diffusion barrier benefits and thereby help prevent short channel effects, without undesirably sacrificing other transistor performance areas”.
This is interpreted by the examiner as routine optimization (see MPEP 2144.05.II). It would have been obvious to one of ordinary skill in the art prior to the effective filing date of the claimed invention to consider providing the carbon in a range of 1-2 at.% as taught by Glass, which is within the claimed range, in the device of Jung in view of Kim in order to balance the diffusion barrier effects of carbon while also maintaining the high conductivity (or low resistivity) of the S/D regions (see [0024] of Glass).
Claim(s) 8, 10, 13, 14, and 19 is/are rejected under 35 U.S.C. 103 as being unpatentable over US 2020/0365692 A1; Jung et al.; 11/2020; (“Jung”) in view of US 2020/0168716 A1; Peng et al.; 05/2020; (“Peng”).
Regarding Claim 8. Jung discloses A device (Figure 19, semiconductor device) comprising:
a nanostructure (left #124s, Figure 19, left semiconductor patterns); and
a source/drain region (central #250, Figure 19, source drain layer) adjoining a channel region (topmost #124, Figure 19) of the nanostructure (Figure 19, #250 is adjoined with the topmost #124 of the left semiconductor patterns), the source/drain region comprising:
a first epitaxial layer (right side of left structure, middle #230, Figure 19, first epitaxial layer) on a sidewall of the nanostructure (Figure 19, the middle #230 is between #240 and the left gate/channel structure), the first epitaxial layer comprising a carbon-containing semiconductor material and an n-type dopant ([0083], #230 may comprise carbon in the form of silicon carbide and n-type impurities);
a second epitaxial layer (#240, Figure 19, second epitaxial layer) on the first epitaxial layer (Figure 19, #240 is directly on #230), the second epitaxial layer comprising a carbon-free semiconductor material and the n-type dopant ([0086], #240 may be single crystalline silicon combined with n-type impurities); and
Jung does not disclose a third epitaxial layer on the second epitaxial layer, the third epitaxial layer comprising the carbon-free semiconductor material and the n-type dopant.
Peng teaches a semiconductor structure (Figure 13) comprising a first nanostructure (#82, #84, #86, and #25s, gate dielectric, adjustment and electrode layers along with and channel structures) with a source/drain region adjoined to it (left #50’, S/D epitaxial layer) comprising a first epitaxial layer (#52’) which may include carbon and n-type dopants ([0077], SiCAs), a second epitaxial layer (#54’) which may be carbon free with n-type dopants ([0077], SiP), and a third epitaxial layer (#56’) which may be carbon free with n-type dopants ([0077], SiAs).
It would have been obvious to one of ordinary skill in the art prior to the effective filing date of the claimed invention to consider forming the three separate epitaxial layers with their respective n-type dopant concentrations and carbon/carbon-free status in the device of Jung as taught by Peng since the structure make it “possible to effectively suppress P diffusion while maintaining appropriate stress and low source/drain resistance” (see [0077] of Peng).
Regarding Claim 10. Jung in view of Peng discloses The device of claim 8, wherein the carbon-containing semiconductor material is silicon carbide (Jung, [0083], silicon carbide in #230; Peng, [0077], silicon carbide is part of #52’), the carbon-free semiconductor material is silicon (Jung, [0086], single crystalline silicon in #240; Peng, [0077], silicon is part of #54’ and 56’), and the n-type dopant is phosphorous or arsenic (Jung, [0083] and [0086], n-type impurity source gases provide phosphorous; Peng, [0077], n-type dopants are phosphorous or arsenic).
Regarding Claim 13. Jung in view of Peng discloses The device of claim 8 further comprising:
a fin (Jung, #105, Figure 19, active pattern) extending from a substrate (Jung, #100, Figure 19, #105 extends up from substrate #100); and
a fourth epitaxial layer (Jung, #233, Figure 19, third epitaxial layer) between the fin and the second epitaxial layer (Jung, Figure 19, #233 is between #105 and #240), the fourth epitaxial layer comprising the carbon-containing semiconductor material and the n-type dopant (Jung, [0107], #233 is grown during the same process as #230 such that it may be of the same materials; [0083], #230 may comprise carbon in the form of silicon carbide and n-type impurities), the fourth epitaxial layer separated from the first epitaxial layer (Jung, Figure 19, #233 is physically separated from the middle #230s on the adjacent nanostructures).
Regarding Claim 14. Jung in view of Peng discloses The device of claim 13, wherein the fourth epitaxial layer is thicker than the first epitaxial layer (Jung, Figure 19, #233 is thicker than the middle #230s on the adjacent nanostructures).
Regarding Claim 19. Jung discloses The device of claim 15.
Jung does not disclose a third epitaxial layer on the second epitaxial layer, the third epitaxial layer comprising the second semiconductor material and the n-type dopant, the third epitaxial layer having a lesser concentration of the n-type dopant than the second epitaxial layer.
Peng teaches a semiconductor structure (Figure 13) comprising a first nanostructure (#82, #84, #86, and #25s, gate dielectric, adjustment and electrode layers along with and channel structures) with a source/drain region adjoined to it (left #50’, S/D epitaxial layer) comprising a first epitaxial layer (#52’) which may include carbon and n-type dopants ([0077], SiCAs), a second epitaxial layer (#54’) which may be carbon free with n-type dopants ([0077], SiP), and a third epitaxial layer (#56’) on the second epitaxial layer (Figure 13, #56’ is on #54’), the third epitaxial layer comprising the second semiconductor material and the n-type dopant ([0075], SiP), the third epitaxial layer having a lesser concentration of the n-type dopant than the second epitaxial layer ([0075], “the third epitaxial layer 56′ includes a SiP layer having a lower P concentration than the second epitaxial layer 54′”).
It would have been obvious to one of ordinary skill in the art prior to the effective filing date of the claimed invention to consider forming the three separate epitaxial layers with their respective n-type dopant concentrations and carbon/carbon-free status in the device of Jung as taught by Peng since the structure make it “possible to effectively suppress P diffusion while maintaining appropriate stress and low source/drain resistance” (see [0077] of Peng).
Claim(s) 9 is/are rejected under 35 U.S.C. 103 as being unpatentable over US 2020/0365692 A1; Jung et al.; 11/2020; (“Jung”) in view of US 2020/0168716 A1; Peng et al.; 05/2020; (“Peng”) as applied to claim 8 above, and further in view of US 2022/0069134 A1; Kim et al.; 03/2022; (“Kim”).
Regarding Claim 9. Jung in view of Peng discloses The device of claim 8 further comprising:
an inter-layer dielectric (Jung, #270, Figure 19, insulation layer) on the source/drain region (Jung, Figure 19, #270 is located on the central #250); and
a contact extending through the inter-layer dielectric to contact the second epitaxial layer of the source/drain region, the contact spaced apart from the first epitaxial layer of the source/drain region.
Jung in view of Peng do not disclose a contact extending through the inter-layer dielectric to contact the second epitaxial layer of the source/drain region, the contact spaced apart from the first epitaxial layer of the source/drain region. However, Jung does teach in [0051] that contact plugs may be formed to be electrically connected with the source/drain layers (#250).
Kim teaches a semiconductor structure (#100, Figure 2A) comprising a first nanostructure (left #160 and #140, gate and channel structures) with a source/drain region adjoined to it (central #150, source/drain regions) comprising a first epitaxial layer (#152), a second epitaxial layer (#154), and a third epitaxial layer (#155) and an interlayer dielectric on the source/drain region (#190); and a contact (#180) extending through the inter-layer dielectric (Figure 2A, #180 extends through #190), to contact the second epitaxial layer of the source/drain region (Figure 2A, #180 is directly electrically connected to #154), the contact spaced apart from the first epitaxial layer of the source/drain region (Figure 9, #180 is spaced apart from #152).
Since Jung is silent regarding the structure of the source/drain contacts, this would motivate one of ordinary skill to seek out teachings such as Kim in order to practice the invention of Jung. It would have been obvious to one of ordinary skill in the art, prior to the effective filing date of the claimed invention, to consider forming the contact structures through the ILD layers from Kim since doing so provides an electrical connection through a hole in the ILD layer (see [0104] of Kim) allowing for the transmission of electrical signals to and from the source/drain regions.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to TYLER JAMES WIEGAND whose telephone number is (571)270-0096. The examiner can normally be reached Mon-Fri. 8AM-5PM.
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/TYLER J WIEGAND/Examiner, Art Unit 2812
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