DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Status of the Application
Claims 1-20 remain pending in this application.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1-13, 16, and 17 are rejected under 35 U.S.C. 103 as being unpatentable over Lo et al (US 20210193566 A1, as cited in IDS dated 07/23/2024, hereafter Lo) in view Jang et al (US 20180130697 A1, as cited in IDS dated 07/23/2024, hereafter Jang).
Regarding claim 1, Lo teaches: A method for manufacturing a semiconductor device (Lo fig 1, 6-11, 600-1100, ¶0039-0044), comprising:
preparing an electrically conductive structure (Lo 114, ¶0017)(Lo fig 6, 600, ¶0040) including a plurality of electrically conductive features (Lo fig 1, multiple 114 shown), adjacent two of which are spaced apart from each other by a corresponding one of recesses (Lo 602, ¶0040)(Lo fig 6, 600, ¶0040);
conformally forming a dielectric coating layer (Lo 116, ¶0024, “silicon oxycarbide”) on the electrically conductive structure (Lo fig 7, 700, ¶0041);
filling a sacrificial material (Lo 802, ¶0042) into the recesses (Lo fig 8, 800, ¶0042);
recessing the sacrificial material to form sacrificial features (Lo 802 remaining in 602, fig 9, 900, ¶0043) in the recesses (Lo fig 9, 900, ¶0043);
forming a sustaining layer (Lo 118, ¶0025, under a broadest reasonable interpretation (BRI) of a sustaining layer) over the dielectric coating layer to cover the sacrificial features (Lo fig 10, 1000, ¶0044); and
removing the sacrificial features to form air gaps (Lo 112, ¶0017) covered by the sustaining layer (Lo fig 11, 1100, ¶0045).
Lo does not teach: conformally forming a thermally conductive dielectric capping layer on the electrically conductive structure; and
conformally forming the dielectric coating layer on the thermally conductive dielectric capping layer, the thermally conductive dielectric capping layer having a thermal conductivity higher than a thermal conductivity of the dielectric coating layer.
Jang, in the same field of endeavor of semiconductor device manufacturing, teaches: conformally forming a thermally conductive dielectric capping layer (Jang 130, ¶0028-0030, “aluminum nitride”, applicant discloses suitable materials for a thermally conductive dielectric capping layer include “aluminum nitride”, spec ¶0022) on an electrically conductive structure (Jang 109a, ¶0022, at least capable thereof)(Jang fig 10, ¶0028); and
conformally forming a dielectric coating layer (Jang 132, ¶0031, under a BRI of dielectric coating layer, “SiCN, SiOC, SiN, SiOCN”) on the thermally conductive dielectric capping layer (Jang fig 11, ¶0031), the thermally conductive dielectric capping layer having a thermal conductivity higher than a thermal conductivity of the dielectric coating layer (the applicant discloses that suitable materials for “the thermally conductive dielectric capping layer having a thermal conductivity higher than a thermal conductivity of the dielectric coating layer” are: “aluminum nitride” for thermal conductivity of the dielectric coating layer (spec ¶0022), and “silicon oxycarbide” for the dielectric coating layer (spec ¶0025). Jang discloses 132 formed of silicon oxycarbide (Jang ¶0031) and 130 formed of aluminum nitride (Jang ¶0030). Jang discloses at least one embodiment in which the materials are the same as disclosed by the applicant, and therefore must exhibit the same properties, therefore Jang discloses the claimed limitation.).
It would have been obvious to one of ordinary skill in the art, before the effective filing date of the claimed invention, to modify the method of Lo to include the steps as taught by Jang, and such that the dielectric coating layer is conformally formed on the thermally conductive dielectric capping layer, in order to reduce to prevent migration and/or diffusion of metal from the electrically conductive feature (Jang ¶0037).
Regarding claim 2, Lo in view of Jang teaches: The method according to claim 1, further comprising:
removing a part of the sustaining layer (Lo 118) formed on the electrically conductive structure (Lo 114) to expose the plurality of electrically conductive features (Lo fig 13, 1300, ¶0048);
forming a thermally conductive etch stop layer (Lo 124, ¶0056, “silicon carbide”, applicant discloses that suitable materials for a “thermally conductive etch stop layer” includes silicon carbide, spec ¶0030) to cover the plurality of electrically conductive features (Log fig 17, 1700, ¶0054);
forming a patterned dielectric layer (Lo 126) on the thermally conductive etch stop layer (Lo fig 17, 18, 1700, 1800, ¶0054), the patterned dielectric layer having a through hole (Lo 1802, fig 18, ¶0057);
removing a part of the thermally conductive etch stop layer exposed from the through hole so as to expose one of the plurality of electrically conductive features from the through hole (Lo fig 18, ¶0057-0058); and
forming an electrically conductive interconnect (Lo 1902, ¶0059) in the through hole such that the electrically conductive interconnect is electrically connected to the one of the plurality of electrically conductive features (Lo fig 19, 1900, ¶0059-0060).
Regarding claim 3, Lo in view of Jang teaches: The method according to claim 1, wherein
in recessing the sacrificial material (Lo 802)(Lo fig 8, 800), each of the sacrificial features (Lo 802 remaining in 602) has a top surface lower than a top surface of each of the plurality of electrically conductive features (Lo 114)(Lo fig 9, ¶0043); and
in forming the sustaining layer (Lo 118)(Lo fig 10, 1000), the sustaining layer extends into the recesses (Lo 602) to cover the sacrificial features (Lo 802 remaining in 602)(Lo fig 10, ¶0044).
Regarding claim 4, Lo in view of Jang teaches: The method according to claim 3, further comprising, after removing the sacrificial features (Lo 802 remaining in 602) to form air gaps (Lo 112)(Lo fig 11, 1100):
forming a dielectric cover layer (Lo 120, ¶0047) on the sustaining layer (Lo 118)(Lo fig 12, 1200, ¶0047), the dielectric cover layer including a plurality of protruding features extending into the recesses (Lo 602) to cover the sustaining layer (Lo fig 12, portions of 120 extend into 602);
removing a part of the dielectric cover layer, a part of the sustaining layer, and a part of the electrically conductive structure (Lo 114) to expose the plurality of protruding features and the plurality of electrically conductive features (Lo fig 13, 1300, ¶0048);
selectively forming a protection layer (Lo 122, ¶0057, at least protects 115 during etching) on the plurality of protruding features (Lo fig 15, 1500, ¶0051); and
forming an etch stop layered structure (Lo 124, ¶0056, at least a single layer) to cover the plurality of electrically conductive features and the protection layer (Lo fig 17, 1700, ¶0054).
Regarding claim 5, Lo in view of Jang teaches: The method according to claim 4, further comprising, before selectively forming the protection layer (Lo 122)(Lo fig 15, 1500), selectively depositing a blocking layer (Lo 1402, ¶0049) on the plurality of electrically conductive features (Lo 114) to permit the plurality of protruding features (Lo fig 12, portions of 120 extend into 602) to be exposed from the blocking layer (Lo fig 14, 1400, ¶0049).
Regarding claim 6, Lo in view of Jang teaches: The method according to claim 5, further comprising, after selectively forming the protection layer (Lo 122)(Lo fig 15, 1500) and before forming the etch stop layered structure (Lo 124)(Lo fig 17, 1700), removing the blocking layer (Lo 1402) from the plurality of electrically conductive features (Lo 114)(Lo fig 16, 1600, ¶0053).
Regarding claim 7, Lo in view of Jang teaches: The method according to claim 4, wherein the etch stop layered structure (Lo 124) includes a thermally conductive etch stop layer (Lo 124, ¶0056, “silicon carbide”, applicant discloses that suitable materials for a “thermally conductive etch stop layer” includes silicon carbide, spec ¶0030).
Regarding claim 8, Lo in view of Jang teaches: The method according to claim 7, wherein the thermally conductive dielectric capping layer (Lo as modified to include Jang 130) and the thermally conductive etch stop layer (Lo 124) are independently made of a thermally conductive dielectric material selected from aluminum nitride (Jang 130, ¶0028-0030, “aluminum nitride”), boron nitride, graphene oxide, diamond, silicon carbide (Lo 124, ¶0056, “silicon carbide”), silicon carbonitride, or combinations thereof.
Regarding claim 9, Lo in view of Jang teaches: The method according to claim 1, wherein recessing the sacrificial material (Lo 802)(Lo fig 9, 900) is conducted by a treatment selected from a thermal recess treatment, an etching back treatment, or a combination thereof (Lo ¶0043, “performing an annealing process, an etch back process”).
Regarding claim 10, Lo in view of Jang teaches: The method according to claim 1, wherein removing the sacrificial features (Lo 802 remaining in 602, fig 9)(Lo fig 11, 1100) is conducted by a treatment selected from a thermal treatment, an ultraviolet treatment, or a combination thereof (Lo ¶0045, “thermal baking process, an ultraviolent (UV) curing”).
Regarding claim 11, Lo teaches: A method for manufacturing a semiconductor device (Lo fig 1, 6-11, 600-1100, ¶0039-0044), comprising:
preparing an electrically conductive structure (Lo 114, ¶0017)(Lo fig 6, 600, ¶0040) including a plurality of electrically conductive features (Lo fig 1, multiple 114 shown), adjacent two of which are spaced apart from each other by a corresponding one of recesses (Lo 602, ¶0040)(Lo fig 6, 600, ¶0040);
conformally forming a dielectric coating layer (Lo 116, ¶0024, “silicon oxycarbide”) on the electrically conductive structure (Lo fig 7, 700, ¶0041);
forming sacrificial features (Lo 802 remaining in 602, fig 9, 900, ¶0043) in the recesses (Lo fig 9, 900, ¶0043), respectively;
forming a sustaining layer (Lo 118, ¶0025, under a broadest reasonable interpretation (BRI) of a sustaining layer) over the dielectric coating (Lo fig 10, 1000, ¶0044), the sustaining layer extending into the recesses to cover the sacrificial features (Lo fig 10, 1000, ¶0044); and
removing the sacrificial features to form air gaps (Lo 112, ¶0017) covered by the sustaining layer (Lo fig 11, 1100, ¶0045).
Lo does not teach: conformally forming a thermally conductive dielectric capping layer on the electrically conductive structure; and
conformally forming the dielectric coating layer on the thermally conductive dielectric capping layer, the thermally conductive dielectric capping layer having a thermal conductivity higher than a thermal conductivity of the dielectric coating layer.
Jang, in the same field of endeavor of semiconductor device manufacturing, teaches: conformally forming a thermally conductive dielectric capping layer (Jang 130, ¶0028-0030, “aluminum nitride”, applicant discloses suitable materials for a thermally conductive dielectric capping layer include “aluminum nitride”, spec ¶0022) on an electrically conductive structure (Jang 109a, ¶0022, at least capable thereof)(Jang fig 10, ¶0028); and
conformally forming a dielectric coating layer (Jang 132, ¶0031, under a BRI of dielectric coating layer, “SiCN, SiOC, SiN, SiOCN”) on the thermally conductive dielectric capping layer (Jang fig 11, ¶0031), the thermally conductive dielectric capping layer having a thermal conductivity higher than a thermal conductivity of the dielectric coating layer (the applicant discloses that suitable materials for “the thermally conductive dielectric capping layer having a thermal conductivity higher than a thermal conductivity of the dielectric coating layer” are: “aluminum nitride” for thermal conductivity of the dielectric coating layer (spec ¶0022), and “silicon oxycarbide” for the dielectric coating layer (spec ¶0025). Jang discloses 132 formed of silicon oxycarbide (Jang ¶0031) and 130 formed of aluminum nitride (Jang ¶0030). Jang discloses at least one embodiment in which the materials are the same as disclosed by the applicant, and therefore must exhibit the same properties, therefore Jang discloses the claimed limitation.).
It would have been obvious to one of ordinary skill in the art, before the effective filing date of the claimed invention, to modify the method of Lo to include the steps as taught by Jang, and such that the dielectric coating layer is conformally formed on the thermally conductive dielectric capping layer, in order to reduce to prevent migration and/or diffusion of metal from the electrically conductive feature (Jang ¶0037).
Regarding claim 12, Lo in view of Jang teaches: The method according to claim 11, further comprising:
forming a dielectric cover layer (Lo 120, ¶0047) on the sustaining layer (Lo 118)(Lo fig 12, 1200, ¶0047), the dielectric cover layer including a plurality of protruding features (Lo fig 12, portions of 120 extend into 602) extending into the recesses (Lo 602) to cover the sustaining layer (Lo fig 12, 1200, ¶0047);
conducting a planarization process (Lo fig 13, 1300, ¶0048) to expose the plurality of protruding features and the plurality of electrically conductive features (Lo 114)(Lo fig 13, 1300, ¶0048) and to form the sustaining layer into a plurality of sustaining caps (Lo 118, fig 13) respectively covering the plurality of protruding features (Lo fig 13, under a BRI of “sustaining caps”, CMP leaves discrete portions of 118 within 115, at least forming a cap capable of sustaining 112); and
forming an etch stop layered structure (Lo 124, ¶0056, at least a single layer) to cover the plurality of electrically conductive features, the plurality of protruding features, and the plurality of sustaining caps (Lo fig 17, 1700, ¶0054).
Regarding claim 13, Lo in view of Jang teaches: The method according to claim 12, wherein in conducting the planarization process (Lo fig 13, 1300, ¶0048), the thermally conductive dielectric capping layer (Lo as modified to include Jang 130) is formed into a plurality of first dielectric spacer layers (Jang 130, Lo as modified such that Lo 116 conformally covers Jang 130, Lo ¶0048, a dielectric layer of structures 115 at least spacing adjacent 114), and the dielectric coating layer (Lo 116, similar to Jang 132) is formed into a plurality of second dielectric spacer layers (Lo 116, fig 13, ¶0048, another dielectric layer of structures 115 at least spacing adjacent 114), so that each of the air gaps (Lo 112) is defined by a corresponding one of the plurality of second dielectric spacer layers and a bottom portion of a corresponding one of the plurality of sustaining caps (Lo as modified to include Jang 130, fig 13, 118 forming the top interface of 112, and 116 forming the bottom and side interfaces of 112).
Regarding claim 16, Lo teaches: A method for manufacturing a semiconductor device (Lo fig 1, 6-11, 600-1100, ¶0039-0044), comprising:
preparing an electrically conductive structure (Lo 114, ¶0017)(Lo fig 6, 600, ¶0040) including a plurality of electrically conductive features (Lo fig 1, multiple 114 shown), adjacent two of which are spaced apart from each other by a corresponding one of recesses (Lo 602, ¶0040)(Lo fig 6, 600, ¶0040);
conformally forming a dielectric coating layer (Lo 116, ¶0024, “silicon oxycarbide”) on the electrically conductive structure (Lo fig 7, 700, ¶0041);
forming sacrificial features (Lo 802 remaining in 602, fig 9, 900, ¶0043) in the recesses (Lo fig 9, 900, ¶0043), respectively;
forming a sustaining layer (Lo 118, ¶0025, under a broadest reasonable interpretation (BRI) of a sustaining layer) over the dielectric coating (Lo fig 10, 1000, ¶0044), the sustaining layer extending into the recesses to cover the sacrificial features (Lo fig 10, 1000, ¶0044);
removing the sacrificial features to form air gaps (Lo 112, ¶0017) covered by the sustaining layer (Lo fig 11, 1100, ¶0045);
forming a dielectric cover layer (Lo 120, ¶0025) on the sustaining layer (Log fig 12, 1200, ¶0047), the dielectric cover layer including a plurality of protruding features (Lo fig 12, protrusions of 120 into 602) extending into the recesses to cover the sustaining layer (Log fig 12);
removing a part of the dielectric cover layer, a part of the sustaining layer, and a part of the electrically conductive structure to expose the protruding features and the electrically conductive features and to form the sustaining layer into a plurality of sustaining caps (Lo 118, fig 13)(Lo fig 13, 1300, ¶0048); and
forming an etch stop layered structure (Lo 122, 124, ¶0027) to cover the plurality of electrically conductive features, the plurality of protruding features, and the plurality of sustaining caps (Lo fig 14-17, 1400-1700, ¶0049-0056).
Lo does not teach: conformally forming a thermally conductive dielectric capping layer on the electrically conductive structure; and
conformally forming the dielectric coating layer on the thermally conductive dielectric capping layer, the thermally conductive dielectric capping layer having a thermal conductivity higher than a thermal conductivity of the dielectric coating layer.
Jang, in the same field of endeavor of semiconductor device manufacturing, teaches: conformally forming a thermally conductive dielectric capping layer (Jang 130, ¶0028-0030, “aluminum nitride”, applicant discloses suitable materials for a thermally conductive dielectric capping layer include “aluminum nitride”, spec ¶0022) on an electrically conductive structure (Jang 109a, ¶0022, at least capable thereof)(Jang fig 10, ¶0028); and
conformally forming a dielectric coating layer (Jang 132, ¶0031, under a BRI of dielectric coating layer, “SiCN, SiOC, SiN, SiOCN”) on the thermally conductive dielectric capping layer (Jang fig 11, ¶0031), the thermally conductive dielectric capping layer having a thermal conductivity higher than a thermal conductivity of the dielectric coating layer (the applicant discloses that suitable materials for “the thermally conductive dielectric capping layer having a thermal conductivity higher than a thermal conductivity of the dielectric coating layer” are: “aluminum nitride” for thermal conductivity of the dielectric coating layer (spec ¶0022), and “silicon oxycarbide” for the dielectric coating layer (spec ¶0025). Jang discloses 132 formed of silicon oxycarbide (Jang ¶0031) and 130 formed of aluminum nitride (Jang ¶0030). Jang discloses at least one embodiment in which the materials are the same as disclosed by the applicant, and therefore must exhibit the same properties, therefore Jang discloses the claimed limitation.).
It would have been obvious to one of ordinary skill in the art, before the effective filing date of the claimed invention, to modify the method of Lo to include the steps as taught by Jang, and such that the dielectric coating layer is conformally formed on the thermally conductive dielectric capping layer, in order to reduce to prevent migration and/or diffusion of metal from the electrically conductive feature (Jang ¶0037).
Regarding claim 17, Lo in view of Jang teaches: The method according to claim 16, further comprising
removing a portion of the thermally conductive dielectric capping layer (Lo as modified to include Jang 130)(Lo fig 13, 1300, ¶0048) to form a plurality of first dielectric spacer layers (Jang 130, Lo as modified such that Lo 116 conformally covers Jang 130, Lo ¶0048, a dielectric layer of structures 115 at least spacing adjacent 114); and
removing a portion of the dielectric coating layer (Lo 116, similar to Jang 132) to form a plurality of second dielectric spacer layers (Lo 116, fig 13, ¶0048, another dielectric layer of structures 115 at least spacing adjacent 114).
Claims 14, 15, and 18-20 are rejected under 35 U.S.C. 103 as being unpatentable over Lo et al (US 20210193566 A1, as cited in IDS dated 07/23/2024, hereafter Lo) in view Jang et al (US 20180130697 A1, as cited in IDS dated 07/23/2024, hereafter Jang), as applied to claims 13 or 17 above, and further in view of Sung et al (US 20150380352 A1, as cited in IDS dated 08/30/2024, hereafter Sung).
Regarding claim 14, Lo in view of Jang teaches: The method according to claim 13, wherein the etch stop layered structure (Lo 124) is formed by
depositing a first etch stop layer (Lo 124) to cover the plurality of protruding features (Lo fig 12, protrusions of 120 into 602) and the plurality of electrically conductive features (Lo 114)(Lo fig 17, 1700, ¶0054).
Lo in view of Jang does not teach: depositing a second etch stop layer on the first etch stop layer, the first etch stop layer having a thermal conductivity higher than a thermal conductivity of the second etch stop layer.
Sung, in the same field of endeavor of semiconductor device manufacturing, teaches: a second etch stop layer (Sung 112) disposed on a first etch stop layer (Sung 110), the first etch stop layer having a thermal conductivity higher than a thermal conductivity of the second etch stop layer (the applicant discloses that suitable materials for “the first etch stop layer having a thermal conductivity higher than a thermal conductivity of the second etch stop layer” are: “aluminum nitride” for the first etch stop layer (spec ¶0032), and “silicon oxide” for the second etch stop layer (spec ¶0033). Sung discloses a first etch stop layer comprising “aluminum nitride” (Sung ¶0021) and a second etch stop layer comprising “silicon oxide” (Sung ¶0024). Sung discloses at least one embodiment in which the materials are the same as disclosed by the applicant, and therefore must exhibit the same properties, therefore Sung discloses the claimed limitation).
It would have been obvious to one of ordinary skill in the art, before the effective filing date of the claimed invention, to modify the etch stop layered structure of Lo in view of Jang to include the second etch stop layer of Sung in order to reduce recession during the formation of vias (Sung ¶0041).
Further, it would have been obvious to one of ordinary skill in the art, before the effective filing date of the claimed invention, to choose any number of suitable materials for the first or second etch stop layers, since it has been held to be within the general skill of a worker in the art to select a known material on the basis of its suitability for the intended use as a matter of obvious design choice (MPEP 2144.07).
Regarding claim 15, Lo in view of Jang and Sung teaches: The method according to claim 14, wherein
the thermally conductive dielectric capping layer (Lo as modified to include Jang 130) and the first etch stop layer (Lo 124) are independently made of a thermally conductive dielectric material selected from aluminum nitride (Jang 130, ¶0028-0030, “aluminum nitride”), boron nitride, graphene oxide, diamond, silicon carbide (Lo 124, ¶0056, “silicon carbide”), silicon carbonitride, or combinations thereof; and
the dielectric coating layer (Lo 116, similar to Jang 132) and the second etch stop layer (Lo as modified to include Sung 112) are independently made of aluminum nitride, aluminum oxynitride, aluminum oxide, silicon oxide, silicon oxycarbide, silicon oxynitride, silicon carbonitride, silicon oxycarbonitride, or combinations thereof (Lo 116, ¶0041, “silicon dioxide, silicon oxycarbide, silicon oxynitride, silicon carbon nitride, silicon carbon oxynitride, aluminum nitride, aluminum oxynitride, aluminum oxide … or any combination of the foregoing”)(Sung 112, ¶0024, “silicon oxide, a silicon nitride, a silicon carbide”).
Regarding claim 18, Lo in view of Jang teaches: The method according to claim 17, the etch stop layered structure (Lo 124) is formed by
depositing a first etch stop layer (Lo 124) to cover the plurality of protruding features (Lo fig 12, protrusions of 120 into 602), the plurality of electrically conductive features (Lo 114), the plurality of sustaining caps (Lo 118, fig 13), the plurality of first dielectric spacer layers (Jang 130, Lo as modified such that Lo 116 conformally covers Jang 130, Lo fig 13), and the plurality of second dielectric spacer layers (Lo 116, fig 13, similar to Jang 132)(Lo fig 17, 1700, ¶0054).
Lo in view of Jang does not teach: depositing a second etch stop layer on the first etch stop layer, the first etch stop layer having a thermal conductivity higher than a thermal conductivity of the second etch stop layer.
Sung, in the same field of endeavor of semiconductor device manufacturing, teaches: a second etch stop layer (Sung 112) disposed on a first etch stop layer (Sung 110), the first etch stop layer having a thermal conductivity higher than a thermal conductivity of the second etch stop layer (the applicant discloses that suitable materials for “the first etch stop layer having a thermal conductivity higher than a thermal conductivity of the second etch stop layer” are: “aluminum nitride” for the first etch stop layer (spec ¶0032), and “silicon oxide” for the second etch stop layer (spec ¶0033). Sung discloses a first etch stop layer comprising “aluminum nitride” (Sung ¶0021) and a second etch stop layer comprising “silicon oxide” (Sung ¶0024). Sung discloses at least one embodiment in which the materials are the same as disclosed by the applicant, and therefore must exhibit the same properties, therefore Sung discloses the claimed limitation).
It would have been obvious to one of ordinary skill in the art, before the effective filing date of the claimed invention, to modify the etch stop layered structure of Lo in view of Jang to include the second etch stop layer of Sung in order to reduce recession during the formation of vias (Sung ¶0041).
Further, it would have been obvious to one of ordinary skill in the art, before the effective filing date of the claimed invention, to choose any number of suitable materials for the first or second etch stop layers, since it has been held to be within the general skill of a worker in the art to select a known material on the basis of its suitability for the intended use as a matter of obvious design choice (MPEP 2144.07).
Regarding claim 19, Lo in view of Jang and Sung teaches: The method according to claim 18, further comprising, before forming the etch stop layered structure (Lo 124 as modified to include Sung 112)(Lo fig 17, 1700, as modified to include forming Sung 112): selectively forming a protection layer (Lo 122, ¶0057, at least protects 115 during etching) on the plurality of protruding features (Lo fig 12, protrusions of 120 into 602), the plurality of sustaining caps (Lo 118, fig 13), the plurality of first dielectric spacer layers (Jang 130, Lo as modified such that Lo 116 conformally covers Jang 130, Lo fig 13), and the plurality of second dielectric spacer layers (Lo 116, fig 13, similar to Jang 132)(Lo fig 15, 1500, ¶0051).
Regarding claim 20, Lo in view of Jang and Sung teaches: The method according to claim 19, further comprising:
before selectively forming the protection layer (Lo 122)(Lo fig 15, 1500, ¶0051), selectively depositing a blocking layer (Lo 1402, ¶0049) on the plurality of electrically conductive features (Lo 114) to permit the plurality of protruding features (Lo fig 12, portions of 120 extend into 602), the plurality of sustaining caps (Lo 118, fig 13), the plurality of first dielectric spacer layers (Jang 130, Lo as modified such that Lo 116 conformally covers Jang 130, Lo fig 13), and the plurality of second dielectric spacer layers (Lo 116, fig 13, similar to Jang 132) to be exposed from the blocking layer (Lo fig 14, 1400, ¶0049); and
after selectively forming the protection layer and before forming the etch stop layered structure (Lo 124 as modified to include Sung 112)(Lo fig 17, 1700, as modified to include forming Sung 112), removing the blocking layer from the plurality of electrically conductive features (Lo 114)(Lo fig 16, 1600, ¶0053).
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure:
Chuang et al (US 20210265218 A1) is cited as an example of an analogous method further showing a sacrificial material formed between adjacent conductive structures.
Lee et al (US 20020163082 A1) is cited as an example of an analogous method further utilizing a sacrificial layer filling gaps in between adjacent wiring.
Uzoh et al (US 20140167267 A1) is cited as an example of an analogous structure using materials with high thermal conductivity as dielectrics.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to NICHOLAS B. MICHAUD whose telephone number is (703)756-1796. The examiner can normally be reached Monday-Friday, 0800-1700 Eastern Time.
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, EVA MONTALVO can be reached at (571) 272-3829. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/NICHOLAS B. MICHAUD/
EXAMINER
Art Unit 2818
/BRIAN TURNER/Primary Examiner, Art Unit 2818
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