DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Information Disclosure Statement
The information disclosure statement (IDS) submitted on 7/24/2024 was filed. The submission is in compliance with the provisions of 37 CFR 1.97. Accordingly, the information disclosure statement is being considered by the examiner.
Claim Objections
Claim 9 is objected to because of the following informalities:
In claim 9, line 1, the limitation of “comprising a comprising” should be corrected into “comprising”. Appropriate correction is required.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claim(s) 1-2 is/are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Lee (US 2021/0313419).
Regarding claim 1, Lee discloses, in at least figures 19B, 20B, and related text, a device comprising:
a stack of channel regions (54A/54B/54C, [9]) extending above a substrate (50, [9]);
a first dielectric layer (uppermost 81(80), [32], [33]) over the stack of channel regions (54A/54B/54C, [9]), the first dielectric layer (uppermost 81(80), [32], [33]) having a trench (trench surrounded by uppermost 81, figures) therein overlying the stack of channel regions (54A/54B/54C, [9]);
spacers (lower 81, figures) extending between a bottom surface of a first channel region (54C, [9]) and a top surface of a second channel regions (54B, [9]);
a gate dielectric layer lining (100A/100B, [50], [51]) the bottom surface of the first channel region (54C, [9]), sidewalls of the spacers (lower 81, figures), and the top surface of the second channel region (54B, [9]) and forming a hollow rectangle when viewed in cross section (figures);
a first work function layer (102A, [53]) lining the gate dielectric layer (100A/100B, [50], [51]) and forming a second hollow rectangle when view in cross section (figures);
an anti-reaction layer (102B, [54], [55]) lining the first work function layer (102A, [53]) and forming a third hollow rectangle when viewed in cross section (figures);
a conductive material (102C, [57]) filling the third hollow rectangle (figures); and
wherein the gate dielectric layer (100A/100B, [50], [51]), the first work function layer (102A, [53]), the anti-reaction layer (102B, [54], [55]), and the conductive material (102C, [57]) also collectively fill the trench (trench surrounded by uppermost 81, figures).
Regarding claim 2, Lee discloses the device of claim 1 as described above.
Lee further discloses, in at least figures 19B, 20B, and related text, the anti-reaction layer (102B, [54], [55]) comprises a material that prevents oxidation of the first work function layer (102A, [53]).
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 9 is/are rejected under 35 U.S.C. 103 as being unpatentable over Lee (US 2021/0313419) in view of Lee (US 2020/0144255).
Regarding claim 9, Lee419 discloses the device of claim 1 as described above.
Lee419 does not explicitly disclose a conductive cap overlying the conductive material within the trench and overlying a topmost surface of the gate dielectric layer within the trench.
Lee255 teaches, in at least figure 9 and related text, the device comprising a conductive cap (EL3, [30]) overlying the conductive material (WF3, [30], [78]) within the trench (trench surrounded by GS, figure) and overlying a topmost surface of the gate dielectric layer (GI, [38]) within the trench (trench surrounded by GS, figure), for the purpose of providing a semiconductor device including gate-all-around type transistors with various threshold voltages ([4]).
Lee419 and Lee255 are analogous art because they are directed to semiconductor device and one of ordinary skill in the art would have had a reasonable expectation of success to modify Lee419 with the specified features of Lee255 because they are from the same field of endeavor.
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have modified the structure disclosed in Lee419 to have the conductive cap overlying the conductive material within the trench and overlying a topmost surface of the gate dielectric layer within the trench, as taught by Lee255, for the purpose of providing a semiconductor device including gate-all-around type transistors with various threshold voltages ([4], Lee255).
Allowable Subject Matter
Claim 2 is objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims because the prior art of record neither anticipates nor render obvious the limitations of the base claims 1 and 2 that recite "the conductive material extends over topmost surfaces of the anti-reaction layer and the first work function layer, respectively, within the trench" in combination with other elements of the base claims 1 and 2.
Claims 4-5 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims because the prior art of record neither anticipates nor render obvious the limitations of the base claims 1 and 4 that recite "a dielectric spacer lining sidewalls of the trench, and wherein the dielectric spacer has a topmost surface that is further from a top surface of the first channel region than the topmost surface of the anti-reaction layer" in combination with other elements of the base claims 1 and 4.
Claims 6-8 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims because the prior art of record neither anticipates nor render obvious the limitations of the base claims 1 and 6 that recite "a topmost surface of the gate dielectric layer within the trench is further from a top surface of the stack of channel regions than is a topmost surface of the anti-reaction layer within the trench" in combination with other elements of the base claims 1 and 6.
Claims 10-17 are allowed because the prior art of record neither anticipates nor render obvious the limitations of the base claims 10 that recite "the first fill metal layer has a topmost surface that is below a topmost surface of the first gate dielectric layer, and the second fill metal layer has a topmost surface that is coplanar with a topmost surface of the second gate dielectric layer" in combination with other elements of the base claims 10.
Claims 18-20 are allowed because the prior art of record neither anticipates nor render obvious the limitations of the base claims 18 that recite "the metal fill layer extending over topmost surfaces of the work function layer and the oxidation barrier" in combination with other elements of the base claims 18.
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure.
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/TONG-HO KIM/Primary Examiner, Art Unit 2811
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