DETAILED ACTION
Claim Rejections - 35 USC § 112
The following is a quotation of the first paragraph of 35 U.S.C. 112(a):
(a) IN GENERAL.—The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor or joint inventor of carrying out the invention.
The following is a quotation of the first paragraph of pre-AIA 35 U.S.C. 112:
The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor of carrying out his invention.
Claims 3-5 and 13-15 rejected under 35 U.S.C. 112(a) or 35 U.S.C. 112 (pre-AIA ), first paragraph, as failing to comply with the written description requirement. The claim(s) contains subject matter which was not described in the specification in such a way as to reasonably convey to one skilled in the relevant art that the inventor or a joint inventor, or for pre-AIA the inventor(s), at the time the application was filed, had possession of the claimed invention.
Claims 3 and 13 reciting “wherein the source/drain contact comprises: a barrier layer interfacing, the first dielectric layer, the second ESL, and the second dielectric layer; and a metal fill spaced apart from, the first dielectric layer, the second ESL, and the second dielectric layer by the barrier layer” lacks adequate support in the original disclosure. The claimed “source/drain contact”, as best understood, correspond to element 221 (see FIG. 11) which extends through the second dielectric layer 213, the first ESL 212, the first dielectric layer 211, and the CESL 210 as recited in claim 1. The “source/drain contact” 221 include a barrier layer 218 and a metal fill 220. However, the barrier layer 218 does not “interface” the second ESL 222 and the metal fill 220 is not spaced apart from the second ESL 222 by the barrier layer 218. Therefore, claim 5 recites new matter.
Claim 5 reciting “wherein the metal fill comprises a void” lacks adequate support in the original disclosure. The claimed “metal fill” is a part of the source/drain contact as recited in claim 3. The “metal fill” 220 (see e.g. FIG. 11) is not disclosed to comprise any “void”. The only disclosure to a “void” is the void 2380 enclosed by the metal fill 238 of the contact feature 240. Therefore, claim 5 recites new matter.
Other claims are rejected for depending on a rejected claim.
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claims 3-5 and 13-15 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor, or for pre-AIA the applicant regards as the invention.
Claims 3 and 13 reciting “wherein the source/drain contact comprises: a barrier layer interfacing, the first dielectric layer, the second ESL, and the second dielectric layer; and a metal fill spaced apart from, the first dielectric layer, the second ESL, and the second dielectric layer by the barrier layer” renders the claim indefinite. Applicant’s disclosure does not describe the barrier layer “interface” with the second ESL and the metal fill is “spaced apart” from the second ESL by the barrier layer as detailed above. Therefore, it is unclear what constitutes “interface” and “spaced apart” in light of the disclosure.
Claims 5 and 15 reciting “wherein the metal fill comprises a void” renders the claim indefinite. It is unclear how can the metal fill comprise any void. The “metal fill” refers to the material that is filling the contact opening. The presence of the metal fill occupies the space it resides. A void is understood to be absence of the metal fill. The metal fill which is itself a solid material, would not comprise any void. Therefore, it is unclear what is intended by “the metal fill comprises a void”
Other claims are rejected for depending on a rejected claim.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale or otherwise available to the public before the effective filing date of the claimed invention.
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
Claim 17 is rejected under 35 U.S.C. 102(a)(1) as being anticipated by Siew et al. US 2018/0096934 A1 (Siew).
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In re claim 17, Siew discloses (e.g. FIGs. 1-15) a semiconductor structure, comprising:
a first active region FA;
a first source/drain feature 110 disposed over the first active region FA;
a source/drain contact 180A disposed over and in contact with the first source/drain feature 110;
a source/drain contact via V disposed over and in contact with the source/drain contact 180A (¶ 44);
a second active region (another FA) extending parallel to the first active region (three active regions FA shown in FIGs. 1 & 15A);
a second source/drain feature 110 disposed over the second active region (another FA); and
a metal line 190A disposed over the first source/drain feature 110 and the second source/drain feature 110 (over another FA),
wherein a composition of the metal line 190A is identical to a composition of the source/drain contact via V (metal vias V being part of metal 190A that fill holes HA, ¶ 48,86-87, see FIGs. 15A-15B).
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 18-20 are rejected under 35 U.S.C. 103 as being unpatentable over Siew et al. US 2018/0096934 A1 (Siew) as applied to claim 17 above, and further in view of Srivastava et al. US 10,312,188 B1 (Srivastava).
In re claim 18, Siew discloses (e.g. FIGs. 14-15) the metal line 190A and source/drain contact via V are integrally formed of same metal above source/drain contact 180A, wherein a metal fill layer extends continuously from the metal line 190A to the source/drain contact via V (¶ 48, 86-87). Siew further discloses metal can be Cu (¶ 48,86).
However, Siew does not explicitly disclose wherein the metal line and the source/drain contact via comprise a barrier layer and a metal fill layer, wherein the barrier layer extends continuously from the metal line to the source/drain contact via.
However, Srivastava discloses (e.g. FIG. 7,9) a contact via 150 over a contact 108, and a metal line 150 integrally formed with contact via 150,
wherein the metal line 150 and the source/drain contact via 150 comprise a barrier layer 144 and a metal fill layer 146,
wherein the barrier layer 144 extends continuously from the metal line 152 to the source/drain contact via 150,
wherein the metal fill layer 146 extends continuously from the metal line 152 to the source/drain contact via 150.
It is well-known to for barrier layer around main metal fill to prevent diffusion in metal interconnect structure.
Therefore, it would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to form a barrier layer around Siew’s Cu metal 190A,V as taught by Srivastava to prevent Cu metal diffusion as is well-known in the art.
In re claim 19, Srivastava discloses (e.g. FIGs. 7 & 9, Column 7, lines 34-56)
wherein the barrier layer 144 comprises tantalum nitride (TaN),
wherein the metal fill layer 146 comprises copper (Cu) or ruthenium (Ru).
In re claim 20, Srivastava discloses (e.g. FIGs. 7 & 9) wherein the barrier layer 144 does not extend between the metal line 152 and the source/drain contact via 150 (i.e. the metal fill 146 extends continuously and is not separated by the barrier layer 144 between the metal line 152 and the source/drain contact via 150).
Claims 1, 3-4, 6, and 16 is/are rejected under 35 U.S.C. 103 as being unpatentable over Siew et al. US 2018/0096934 A1 (Siew) in view of Liu et al. US 2020/0044025 A1 (Liu).
In re claim 1, Siew discloses (e.g. FIGs. 1-15) a semiconductor structure, comprising:
a first fin structure 105 rising from a substrate 101 and extending lengthwise along a first direction (X-direction);
a gate structure 140 disposed over a channel region FA of the first fin structure 12;
a first source/drain feature 110 disposed over a source/drain region of the first fin structure (region of 105 under 110);
a gate spacer 150 disposed along a sidewall of the gate structure 150;
a first dielectric layer 162;
a first etch stop layer (ESL) (blocking insulating layer between 162 and 164, not shown, ¶ 35) over the gate structure 140, the gate spacer 150, and the first dielectric layer 162;
a second dielectric layer 164 over the first ESL (blocking insulating layer);
a source/drain contact 180A extending through the second dielectric layer 164, the first ESL (blocking insulating layer), and the first dielectric layer 162 to couple to the first source/drain 110 feature by way of a silicide layer 182;
a second ESL 174 over the second dielectric layer 164 and the first ESL (blocking insulating layer between 162 and 164);
a third dielectric layer 166 over the second ESL 174; and
a contact feature 190A having a lower portion V extending through the third dielectric layer 166 and the second ESL 174 to interface the source/drain contact 180A.
Siew further discloses in a different embodiment, see Fig. 18, a contact etch stop layer (CESL) 273 extending along a sidewall of the gate spacer 250 and a top surface of the first source/drain feature 210.
Liu further teaches (e.g. FIGs. 14-15) a semiconductor structure comprising a gate structure 56, a first source/drain feature 42, a gate spacer 38 along a sidewall of the gate structure 56, a contact etch stop layer (CESL) 46 extending along a sidewall of the gate spacer 38 and over a top surface of the first source/drain feature 42; a first dielectric layer 48 over the CESL; a first etch stop layer (ESL) 80 over the gate structure 56, the gate spacer 38, the CESL 46, and the first dielectric layer 48; a second dielectric layer 82 over the first ESL; and a source/drain contact 74,86 extending through the CESL to couple the first source/drain feature 42 by way of a silicide layer 72. The CESL 46 is provided to control etching of the source/drain contact opening 60 (¶ 35, see FIG. 9A-9C).
Therefore, it would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to modify Siew’s device shown in FIG. 15 by forming CESL along sidewall of the gate spacer 150 and over a top surface of the first source/drain feature 110, and to form the source/drain contact 180A to extend through the CESL as taught by Liu for controlling the etching of the source/drain contact opening.
In re claim 3, as best understood, Siew discloses (e.g. FIGs. 15A-15B) wherein the source/drain contact 180A comprises:
a barrier layer 184 “interfacing” the first dielectric layer 162, the second ESL 174, and the second dielectric layer 164; and
a metal fill 186 “spaced apart” from, the first dielectric layer 162, the second ESL 174, and the second dielectric layer 164 by the barrier layer 182.
Liu discloses (e.g. FIG. 15) wherein the source/drain contact 74 comprises:
a barrier layer 70 interfacing the CESL 46 and the first dielectric layer 48; and
a metal fill 71 spaced apart from the CESL 46 and the first dielectric layer 48 by the barrier layer 70.
In re claim 4, Siew discloses (e.g. FIGs. 15A-15B)
wherein the barrier layer 184 comprises titanium nitride, cobalt nitride, nickel, or tungsten nitride (¶ 40), and
wherein the metal fill 186 comprises tungsten (W), ruthenium (Ru), cobalt (Co), nickel (Ni), or copper (Co) (¶ 38).
In re claim 6, Liu discloses (e.g. FIG. 15) wherein top surfaces of the gate structure 56 (including hard mask 58), the gate spacer 38, the CESL 46, and the first dielectric layer 48 are coplanar.
In re claim 16, Liu discloses (e.g. FIG. 15) wherein top surfaces of the CESL 46 and the first dielectric layer 48 are coplanar.
Claim 2 is rejected under 35 U.S.C. 103 as being unpatentable over Siew et al. US 2018/0096934 A1 (Siew) in view of Liu et al. US 2020/0044025 A1 (Liu) as applied to claim 1 above, and further in view of Lin et al. US 2015/0366420 A1 (Lin).
In re claim 2, Siew does not explicitly disclose the lower portion V of the contact feature 190A comprises a tip portion undercutting the second ESL 174 such that a portion of the tip portion is vertically below a bottom surface of the second ESL 174.
However, Lin disclose (e.g. FIG. 5) an interconnect structure comprising a second dielectric layer 110B, a second ESL 200A, a third dielectric layer 200B, a contact via 198 extending through the second dielectric layer 110B, and an integrated contact feature 204+206 comprising a lower portion 204 extending through the third dielectric layer 200B and the second ESL 200A and an upper portion 206, wherein the lower portion 204 comprises a tip portion 204F undercutting the second ESL 200A such that a portion of the tip portion 204F (portion extending below 200A) is vertically below a bottom surface of the second ESL 200A (also see FIGs 2 & 4 for detailed view of the footing region 204F). Lin discloses the footing region 204F enhances adhesion between the via 204 and underlying contact plug 198.
Therefore, it would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to form Siew’s lower via portion V with a footing portion at the tip of the via that undercuts the second ESL 174 and is vertically below a bottom surface of the second ESL 174 as taught by Lin to improve adhesion of the via portion V to the contact plug 180A.
Claim 5 rejected under 35 U.S.C. 103 as being unpatentable over Siew et al. US 2018/0096934 A1 (Siew) and Liu et al. US 2020/0044025 A1 (Liu) as applied to claim 3 above, and further in view of Lee US 2018/0182856 A1.
In re claim 5, Siew discloses the source/drain contact 180A comprises barrier layer 184 and a metal fill 186. Siew does not explicitly disclose the metal fill 184 comprises a void (as best understood).
However, Lee discloses (e.g. FIGs. 2-3) a contact plug 220P comprising a barrier layer 210P and a metal fill 224P, wherein the metal fill 224P encloses a void 220S that is formed as a result of filling the contact opening. The void, as best understood, refers to an absence of material. Lee’s contact plug 220 encloses a space that is where the metal fill 224P is not presence teaching the claimed “void”. Furthermore, claim does not preclude the void from being further filled by other material. Therefore, Lee teaches the presence of void in metal fill is an obvious result of filling contact opening with metal.
Therefore, it would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to form Siew’s contact 180A with the metal fill 186 such that a void is formed and enclosed by the metal fill 186 as is well-known in the art as recognize by Lee.
Claims 7-9 are rejected under 35 U.S.C. 103 as being unpatentable over Siew et al. US 2018/0096934 A1 (Siew) and Liu et al. US 2020/0044025 A1 (Liu) as applied to claim 1 above, and further in view of Srivastava et al. US 10,312,188 B1 (Srivastava).
In re claim 7, Siew discloses (FIGs. 15A-15B) further comprising:
a fourth dielectric layer 168 over the third ESL,
wherein the contact feature 190A further comprises an upper portion 190A (metal lines in dielectric 168) disposed over the lower portion V (vias in dielectric 166),
wherein the upper portion 190A is disposed in the fourth dielectric layer 168.
Siew teaches the metal lines 190A including vias V is formed by a damascene process with vias V in dielectric layer 166 and metal lines 190A in dielectric layer 168. Siew does not explicitly disclose a third ESL disposed between the third dielectric layer 166 and the fourth dielectric layer 168, and the upper portion 190A is disposed in the third ESL.
However, Srivastava discloses (e.g. FIGs. 7 & 9) an interconnect structure comprising a contact feature 148 comprises an upper portion metal line 152 disposed over a lower via portion 150, the lower via portion 150 is disposed in a lower dielectric 118, and the upper metal line portion 152 is disposed in the ESL 128 and an upper dielectric layer 132, wherein the ESL 128 is disposed between the dielectric layers 118 and 132 to protect underlying structure during etching of metal wire opening 138 (Column 6, lines 45-67; Column 7, lines 1-2).
Therefore, it would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to form a third ESL between Siew’s third dielectric layer 166 and fourth dielectric layer 168 for etch control and protect underlying structure during etching of the opening O1 for metal line 190A. As such, the upper metal line portion 190A is disposed in the opening of the third ESL and the fourth dielectric layer as taught by Srivastava.
In re claim 8, Siew (e.g. FIG. 1 & 15A) further comprising:
a second fin structure 105 and a third fin structure 105 extending parallel to the first fin structure 105 (three parallel fins shown in FIG. 1);
a second source/drain feature 110 (above each fin 105) over the second fin structure; and
a third source/drain feature 110 (above each fin 105) over the third fin structure,
wherein the upper portion 190A of the contact feature spans over the second source/drain feature and the third source/drain feature along a second direction (Y-direction) perpendicular to the first direction (X-direction). See FIG. 15A
In re claim 9, Siew discloses (e.g. 15A-15B) wherein a bottom surface of the upper portion 190A is vertically spaced apart from the second source/drain feature 110 by the third dielectric layer 166, the second ESL 174, the second dielectric layer 164, the first ESL (blocking insulating layer between 162 and 164), the first dielectric layer 162, and the CESL (as taught by Liu).
Claims 10-11 and 13-14 are rejected under 35 U.S.C. 103 as being unpatentable over Siew et al. US 2018/0096934 A1 (Siew) in view of Liu et al. US 2020/0044025 A1 (Liu) and Srivastava et al. US 10,312,188 B1 (Srivastava).
In re claim 10, Siew discloses (e.g. FIGs. 1-15) a semiconductor structure, comprising:
a first fin structure 105, a second fin structure 105, and a third fin structure 105 disposed over a substrate 101 and extending parallel to one another (three parallel fins, see FIG. 1);
a first source/drain feature 110 over the first fin structure (110 above each fin 105);
a second source/drain feature 110 over the second fin structure (110 above each fin 105);
a third source/drain feature 110 over the third fin structure (110 above each fin 105);
a first dielectric layer 162;
a first etch stop layer (ESL) (blocking insulating layer between 162 and 164, not shown, ¶ 35) over top surface of the first dielectric layer 162;
a second dielectric layer 164 over the first ESL (blocking insulating layer between 162 and 164);
a source/drain contact 180A extending through the second dielectric layer 164, the first ESL (blocking insulating layer between 162 and 164), and the first dielectric layer 162 to interface the first source/drain feature 110;
a second ESL 174 over the second dielectric layer 164;
a third dielectric layer 166;
a fourth dielectric layer 168 over the third dielectric layer 166; and
an integrated contact feature 190A comprising:
a lower portion V extending through the third dielectric layer 166 to contact the source/drain contact 180A, and
an upper portion 190A extending through the fourth dielectric layer 168,
wherein the first fin structure 105, the second fin structure 105 and the third fin structure 105 are spaced apart along a direction (Y-direction, see FIG. 1 & 3),
wherein the upper portion 190A spans over the second source/drain feature (leftmost 150 in FIG. 15A) and the third source/drain feature (middle 105 in FIG. 15A).
Siew further discloses in a different embodiment, see Fig. 18, a contact etch stop layer (CESL) 273 over a top surface of the first source/drain feature 210.
Liu further teaches (e.g. FIGs. 14-15) a semiconductor structure comprising a first source/drain feature 42, a contact etch stop layer (CESL) 46 over a top surface of the first source/drain feature 42; a first dielectric layer 48 over the CESL; a first etch stop layer (ESL) 80 over the CESL 46 and the first dielectric layer 48; a second dielectric layer 82 over the first ESL; and a source/drain contact 74,86 extending through the CESL to interface the first source/drain feature 42. The CESL 46 is provided to control etching of the source/drain contact opening 60 (¶ 35, see FIG. 9A-9C).
Therefore, it would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to modify Siew’s device shown in FIG. 15 by forming CESL over a top surface of the first source/drain feature 110, and to form the source/drain contact 180A to extend through the CESL as taught by Liu for controlling the etching of the source/drain contact opening.
Siew teaches the metal lines 190A including vias V is formed by a damascene process with vias V extending through the dielectric layer 166 and metal lines 190A extending through the dielectric layer 168. Siew does not explicitly disclose a third ESL disposed between the third dielectric layer 166 and the fourth dielectric layer 168, and the upper portion 190A extending through the third ESL.
However, Srivastava discloses (e.g. FIGs. 7 & 9) an interconnect structure comprising a contact feature 148 comprises an upper portion metal line 152 disposed over a lower via portion 150, the lower via portion 150 extending through a lower dielectric 118, and the upper metal line portion 152 extending through the ESL 128 and an upper dielectric layer 132, wherein the ESL 128 is disposed between the dielectric layers 118 and 132 to protect underlying structure during etching of metal wire opening 138 (Column 6, lines 45-67; Column 7, lines 1-2).
Therefore, it would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to form a third ESL between Siew’s third dielectric layer 166 and fourth dielectric layer 168 for etch control and protect underlying structure during etching of the opening O1 for metal line 190A. As such, the upper metal line portion 190A is disposed in the opening extending through the third ESL and the fourth dielectric layer as taught by Srivastava.
In re claim 11, Siew discloses (e.g. FIGs. 1-15) wherein each of the first source/drain feature 110, the second source/drain feature 110 and the third source/drain feature 110 comprises a semiconductor material and a dopant (¶ 63).
In re claim 13, as best understood, Siew discloses (e.g. FIGs. 15A-15B) wherein the source/drain contact 180A comprises:
a barrier layer 184 “interfacing” the first dielectric layer 162, the second ESL 174, and the second dielectric layer 164; and
a metal fill 186 “spaced apart” from, the first dielectric layer 162, the second ESL 174, and the second dielectric layer 164 by the barrier layer 182.
Liu discloses (e.g. FIG. 15) wherein the source/drain contact 74 comprises:
a barrier layer 70 interfacing the CESL 46 and the first dielectric layer 48; and
a metal fill 71 spaced apart from the CESL 46 and the first dielectric layer 48 by the barrier layer 70.
In re claim 14, Siew discloses (e.g. FIGs. 15A-15B)
wherein the barrier layer 184 comprises titanium nitride, cobalt nitride, nickel, or tungsten nitride (¶ 40), and
wherein the metal fill 186 comprises tungsten (W), ruthenium (Ru), cobalt (Co), nickel (Ni), or copper (Co) (¶ 38).
Claim 12 is rejected under 35 U.S.C. 103 as being unpatentable over Siew et al. US 2018/0096934 A1 (Siew) in view of Liu et al. US 2020/0044025 A1 (Liu) and Srivastava et al. US 10,312,188 B1 (Srivastava) as applied to claim 10 above, and further in view of Lin et al. US 2015/0366420 A1 (Lin).
In re claim 12, Siew does not explicitly disclose the lower portion V comprises a tip portion undercutting the second ESL 174 such that a portion of the tip portion is vertically below a bottom surface of the second ESL 174.
However, Lin disclose (e.g. FIG. 5) an interconnect structure comprising a second dielectric layer 110B, a second ESL 200A, a third dielectric layer 200B, a contact via 198 extending through the second dielectric layer 110B, and an integrated contact feature 204+206 comprising a lower portion 204 extending through the third dielectric layer 200B and the second ESL 200A and an upper portion 206, wherein the lower portion 204 comprises a tip portion 204F undercutting the second ESL 200A such that a portion of the tip portion 204F (portion extending below 200A) is vertically below a bottom surface of the second ESL 200A (also see FIGs 2 & 4 for detailed view of the footing region 204F). Lin discloses the footing region 204F enhances adhesion between the via 204 and underlying contact plug 198.
Therefore, it would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to form Siew’s lower via portion V with a footing portion at the tip of the via that undercuts the second ESL 174 and is vertically below a bottom surface of the second ESL 174 as taught by Lin to improve adhesion of the via portion V to the contact plug 180A.
Claim 15 is rejected under 35 U.S.C. 103 as being unpatentable over Siew et al. US 2018/0096934 A1 (Siew) in view of Liu et al. US 2020/0044025 A1 (Liu) and Srivastava et al. US 10,312,188 B1 (Srivastava) as applied to claim 13 above, and further in view of Lee US 2018/0182856 A1.
In re claim 15, Siew discloses (e.g. FIG. 15B) the source/drain contact 180A comprises the barrier layer 184 and the metal fill 186. Siew does not explicitly discloses the metal fill comprises a void (as best understood).
However, Lee discloses (e.g. FIGs. 2-3) a contact plug 220P comprising a barrier layer 210P and a metal fill 224P, wherein the metal fill 224P encloses a void 220S that is formed as a result of filling the contact opening. The void, as best understood, refers to an absence of material. Lee’s contact plug 220 encloses a space that is where the metal fill 224P is not presence teaching the claimed “void”. Furthermore, claim does not preclude the void from being further filled by other material. Therefore, Lee teaches the presence of void in metal fill is an obvious result of filling contact opening with metal.
Therefore, it would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to form Siew’s contact 180A with the metal fill 186 such that a void is formed and enclosed by the metal fill 186 as is well-known in the art as recognize by Lee.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to YU CHEN whose telephone number is (571)270-7881. The examiner can normally be reached Monday-Friday: 9AM-5PM ET.
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/YU CHEN/Primary Examiner, Art Unit 2896
YU CHEN
Examiner
Art Unit 2896
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