Prosecution Insights
Last updated: August 17, 2026
Application No. 18/783,352

SYSTEMS AND METHODS FOR PROCESSING A SUBSTRATE

Non-Final OA §102§103§DP
Filed
Jul 24, 2024
Priority
Aug 27, 2021 — divisional of 12/394,635
Examiner
WILCZEWSKI, MARY A
Art Unit
Tech Center
Assignee
Taiwan Semiconductor Manufacturing Company, Ltd.
OA Round
1 (Non-Final)
85%
Grant Probability
Favorable
1-2
OA Rounds
6m
Est. Remaining
95%
With Interview

Examiner Intelligence

Grants 85% — above average
85%
Career Allowance Rate
709 granted / 835 resolved
+24.9% vs TC avg
Moderate +10% lift
Without
With
+10.1%
Interview Lift
resolved cases with interview
Typical timeline
2y 7m
Avg Prosecution
39 currently pending
Career history
870
Total Applications
across all art units

Statute-Specific Performance

§101
0.6%
-39.4% vs TC avg
§103
44.2%
+4.2% vs TC avg
§102
24.2%
-15.8% vs TC avg
§112
22.1%
-17.9% vs TC avg
Black line = Tech Center average estimate • Based on career data from 835 resolved cases

Office Action

§102 §103 §DP
DETAILED ACTION This Office action is in response to the filing of this application on 24 July 2024. Claims 1-20 are pending in the application. Claims 1, 13, and 17 are independent. This application is a divisional of application Serial No. 17/459,821, filed on 27 August 2021, now US Patent 12,394,635. Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Claim Rejections - 35 USC § 102 The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. Claims 1-8, 10-11, 13-18 and 20 are rejected under 35 U.S.C. 102(a)(1) as being clearly anticipated by Maraschin et al., US 2016/0118282, cited by Applicant on the Information Disclosure Statement submitted on 07 November 2024. With respect to claim 1, Maraschin et al. disclose a system for processing a substrate, shown in Fig. 13, the system comprising: a processing chamber (loadlocks 164 may be connected to a processing chamber, see paragraph [0075]), shown in Fig. 13; a staging module 100 for staging the substrate (plurality of wafers 118) prior to delivering the substrate to the processing chamber, see Fig. 13; an access port 144 (shown in Fig. 2) between the processing chamber (loadlocks 164 may be connected to a processing chamber, see paragraph [0075]) and the staging module 100, through which the substrate 118 is passed between the staging module 100 and the processing chamber, see paragraph [0075] and Fig. 13; and a gas flow stabilizer positioned adjacent the access port 144 (above 144), as shown in Figs. 10 and 11, the gas flow stabilizer including: a horizontal flow section, shown in Figs. 3, 4, 6, 10, and 11; and a vertical flow section, shown in Figs. 5, 7, 10, and 11, see annotated Fig. 10 below. PNG media_image1.png 788 805 media_image1.png Greyscale With respect to claim 2, in the system of Maraschin et al., the horizontal flow section of the gas flow stabilizer includes a plurality of overlapping horizontal gas flow paths, as shown in Fig. 3. With respect to claim 3, in the system of Maraschin et al., the vertical flow section of the gas flow stabilizer includes a plurality of vertical gas flow paths, as shown in Figs. 5, 7, 10, and 11. With respect to claim 4, in the system of Maraschin et al., the gas flow stabilizer is configured to create a laminar gas flow along an inner surface of a wall 126/128 proximate to the access port 164, as shown in Figs. 3, 5-7, and 13. With respect to claim 5, the system of Maraschin et al. further comprising a gas flow receiver, positioned on a side of the access port 144 opposite to a side where the gas flow stabilizer is located (below 144), the gas flow receiver including a vertical flow section and a horizontal flow section, as shown in annotated Fig. 11 below. PNG media_image2.png 772 857 media_image2.png Greyscale With respect to claim 6, in the system of Maraschin et al., the horizontal flow section of the gas flow receiver includes a plurality of overlapping horizontal gas flow paths, or the vertical flow section of the gas flow receiver includes a plurality of vertical gas flow paths, as shown in Figs. 3, 5, 10, and 11. With respect to claim 7, in the system of Maraschin et al., the gas flow stabilizer is positioned above the access port 144 and the gas flow receiver is positioned below the access port 144. With respect to claim 8, in the system of Maraschin et al., the gas flow stabilizer is attached to a wall of the staging module 100 and the gas flow receiver is attached to a wall of the staging module 100, as shown in Fig. 11. With respect to claim 10, the system of Maraschin et al. further comprising a source of inert gas (purge gas ports 124) in fluid communication with the gas flow stabilizer, paragraphs [0060] and Fig. 6. With respect to claim 11, in the system of Maraschin et al., the inert gas comprises nitrogen or argon, see paragraph [0060]. With respect to claim 13, Maraschin et al. disclose a system for processing a substrate, shown in Fig. 13, the system comprising: a processing chamber (loadlocks 164 may be connected to a processing chamber, see paragraph [0075]), shown in Fig. 13; a staging module 100 for staging the substrate (plurality of wafers 118) prior to delivering the substrate to the processing chamber, see Fig. 13; an access port 144 (shown in Fig. 2) between the processing chamber (loadlocks 164 may be connected to a processing chamber, see paragraph [0075]) and the staging module 100, through which the substrate 118 is passed between the staging module 100 and the processing chamber, see paragraph [0075] and Fig. 13; and a gas flow stabilizer positioned adjacent the access port 144 (above 144), as shown in Figs. 10 and 11, the gas flow stabilizer including: a horizontal flow section that includes a plurality of overlapping horizontal gas flow paths, shown in Figs. 3, 4, 6, 10, and 11; and a vertical flow section that includes a plurality of vertical gas flow paths, shown in Figs. 5, 7, 10, and 11. PNG media_image1.png 788 805 media_image1.png Greyscale With respect to claim 14, in the system of Maraschin et al., the gas flow stabilizer is configured to create a laminar gas flow along an inner surface of a wall 126/128 proximate to the access port 144 proximate to the access port 164, as shown in Figs. 3, 5-7, and 13. With respect to claim 15, the system of Maraschin et al. further comprising a gas flow receiver, positioned on a side of the access port 144 opposite to a side where the gas flow stabilizer is located (below 144), the gas flow receiver including a vertical flow section and a horizontal flow section, as shown in annotated Fig. 11 below. With respect to claim 16, in the system of Maraschin et al., the horizontal flow section of the gas flow receiver includes a plurality of overlapping horizontal gas flow paths, or the vertical flow section of the gas flow receiver includes a plurality of vertical gas flow paths, as shown in Figs. 3, 5, 10, and 11. . PNG media_image2.png 772 857 media_image2.png Greyscale With respect to claim 17, Maraschin et al. disclose a system for processing a substrate, shown in Fig. 13, the system comprising: a processing chamber (loadlocks 164 may be connected to a processing chamber, see paragraph [0075]), shown in Fig. 13; a staging module 100 for staging the substrate (plurality of wafers 118) prior to delivering the substrate to the processing chamber, see Fig. 13; an access port 144 (shown in Fig. 2) between the processing chamber (loadlocks 164 may be connected to a processing chamber, see paragraph [0075]) and the staging module 100, through which the substrate 118 is passed between the staging module 100 and the processing chamber, see paragraph [0075] and Fig. 13; and a gas flow stabilizer positioned adjacent the access port 144 (above 144), as shown in Figs. 10 and 11, the gas flow stabilizer including: a horizontal flow section that includes a plurality of overlapping horizontal gas flow paths, shown in Figs. 3, 4, 6, 10, and 11; and a vertical flow section that includes a plurality of vertical gas flow paths, shown in Figs. 5, 7, 10, and 11, see annotated Fig. 10 below; and a gas flow receiver, positioned on a side of the access port 144 opposite to a side where the gas flow stabilizer is located (below 144), the gas flow including a vertical flow section that includes a plurality of vertical gas flow paths and a horizontal flow section that includes a plurality of overlapping horizontal gas flow paths, as shown in annotated Fig. 11 below. PNG media_image1.png 788 805 media_image1.png Greyscale PNG media_image2.png 772 857 media_image2.png Greyscale With respect to claim 18, in the system of Maraschin et al., the gas flow stabilizer is configured to create a laminar gas flow along an inner surface of a wall 126/128 proximate to the access port 144 proximate to the access port 164, as shown in Figs. 3, 5-7, and 13. With respect to claim 20, the system of Maraschin et al. further comprising a source of inert gas (purge gas ports 124) in fluid communication with the gas flow stabilizer, see paragraphs [0060] and Fig. 6. Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claims 9 and 19 are rejected under 35 U.S.C. 103 as being unpatentable over Maraschin et al., US 2016/0118282, as applied above to claims 5 and 17. Maraschin et al. is applied as above. Maraschin et al. fail to teach providing a vacuum source in fluid communication with the gas flow receiver. However, in paragraphs [0001] and [0002], Maraschin et al. disclose that a transfer chamber and semiconductor processing chambers are typically connected together in a hermetically-sealed manner and kept under vacuum conditions, and that an Equipment Front End Module (EFEM) can be kept at a vacuum. Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention that the known system of Maraschin et al. could comprise a vacuum source in fluid communication with the gas flow receiver, in order to prevent contamination of the substrate by creating a controlled environment. Claim 12 is rejected under 35 U.S.C. 103 as being unpatentable over Maraschin et al., US 2016/0118282, as applied above to claim 1 above, further in view of Pfahler et al., US 2017/0191759. Maraschin et al. is applied as above. Although Maraschin et al. disclose that loadlocks 164 may be connected to a processing chamber, see paragraph [0075]. loadlocks 164 may be connected to a processing chamber, see paragraph [0075] lack anticipation of the processing chamber being a chamber for conducting a thermal anneal of the substrate, as required in dependent claim 12. In the same field of endeavor, Pfahler et al. disclose a staging module for use in a thermal processing system, see the Abstract. In light of the disclosure of Pfahler et al., , it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention that the staging module 100 of Maraschin et al. could be used in a processing chamber for conducting a thermal anneal of substrate 118. Double Patenting The nonstatutory double patenting rejection is based on a judicially created doctrine grounded in public policy (a policy reflected in the statute) so as to prevent the unjustified or improper timewise extension of the “right to exclude” granted by a patent and to prevent possible harassment by multiple assignees. A nonstatutory double patenting rejection is appropriate where the conflicting claims are not identical, but at least one examined application claim is not patentably distinct from the reference claim(s) because the examined application claim is either anticipated by, or would have been obvious over, the reference claim(s). See, e.g., In re Berg, 140 F.3d 1428, 46 USPQ2d 1226 (Fed. Cir. 1998); In re Goodman, 11 F.3d 1046, 29 USPQ2d 2010 (Fed. Cir. 1993); In re Longi, 759 F.2d 887, 225 USPQ 645 (Fed. Cir. 1985); In re Van Ornum, 686 F.2d 937, 214 USPQ 761 (CCPA 1982); In re Vogel, 422 F.2d 438, 164 USPQ 619 (CCPA 1970); In re Thorington, 418 F.2d 528, 163 USPQ 644 (CCPA 1969). A timely filed terminal disclaimer in compliance with 37 CFR 1.321(c) or 1.321(d) may be used to overcome an actual or provisional rejection based on nonstatutory double patenting provided the reference application or patent either is shown to be commonly owned with the examined application, or claims an invention made as a result of activities undertaken within the scope of a joint research agreement. See MPEP § 717.02 for applications subject to examination under the first inventor to file provisions of the AIA as explained in MPEP § 2159. See MPEP § 2146 et seq. for applications not subject to examination under the first inventor to file provisions of the AIA . A terminal disclaimer must be signed in compliance with 37 CFR 1.321(b). The filing of a terminal disclaimer by itself is not a complete reply to a nonstatutory double patenting (NSDP) rejection. A complete reply requires that the terminal disclaimer be accompanied by a reply requesting reconsideration of the prior Office action. Even where the NSDP rejection is provisional the reply must be complete. See MPEP § 804, subsection I.B.1. For a reply to a non-final Office action, see 37 CFR 1.111(a). For a reply to final Office action, see 37 CFR 1.113(c). A request for reconsideration while not provided for in 37 CFR 1.113(c) may be filed after final for consideration. See MPEP §§ 706.07(e) and 714.13. The USPTO Internet website contains terminal disclaimer forms which may be used. Please visit www.uspto.gov/patent/patents-forms. The actual filing date of the application in which the form is filed determines what form (e.g., PTO/SB/25, PTO/SB/26, PTO/AIA /25, or PTO/AIA /26) should be used. A web-based eTerminal Disclaimer may be filled out completely online using web-screens. An eTerminal Disclaimer that meets all requirements is auto-processed and approved immediately upon submission. For more information about eTerminal Disclaimers, refer to www.uspto.gov/patents/apply/applying-online/eterminal-disclaimer. Claims 1-20 are rejected on the ground of nonstatutory double patenting as being unpatentable over claims 1-20 of U.S. Patent No. 12,394,635 in view of Maraschin et al., US 2016/0118282. The patented claims are drawn to a system comprising a staging module having an access port, a gas flow stabilizer, and a gas flow receiver. Independent claims 1 and 13 of the instant application require a processing chamber, a staging module, an access port, and a gas flow stabilizer. Given the system shown in Fig. 13 of Maraschin et al., it would have been obvious to the skilled artisan that the system of the patented claims could have included a processing chamber in order to process a substrate. Independent claim 17 of the instant application comprises a system including a processing chamber, a staging module, an access port, a gas flow stabilizer, and a gas flow receiver. In light of the system of Maraschin et al., shown in Fig. 13, it would have been obvious to the skilled artisan that the system of the patented claims could have included a processing chamber in order to process a substrate. Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to MARY A WILCZEWSKI whose telephone number is (571)272-1849. The examiner can normally be reached M-TH 7:30 AM-5:00 PM. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Jessica Manno can be reached at 571-272-2339. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. MARY A. WILCZEWSKI Primary Examiner Art Unit 2898 /MARY A WILCZEWSKI/Primary Examiner, Art Unit 2898
Read full office action

Prosecution Timeline

Jul 24, 2024
Application Filed
Aug 03, 2026
Non-Final Rejection mailed — §102, §103, §DP (current)

Precedent Cases

Applications granted by this same examiner with similar technology

Patent 12707806
SURFACE-PLASMON-PUMPED LIGHT EMITTING DEVICES
4y 7m to grant Granted Aug 11, 2026
Patent 12707971
TRANSISTOR-SCALE THERMOELECTRIC DEVICES FOR REFRIGERATION OF INTEGRATED CIRCUITS
4y 4m to grant Granted Aug 11, 2026
Patent 12707994
METHOD OF MANUFACTURING SEMICONDUCTOR DEVICES AND CORRESPONDING SEMICONDUCTOR DEVICE
3y 6m to grant Granted Aug 11, 2026
Patent 12707938
SUSCEPTOR FOR SEMICONDUCTOR SUBSTRATE PROCESSING
3y 0m to grant Granted Aug 11, 2026
Patent 12701781
Integrated Circuit with a Gate Structure and Method Making the Same
5y 9m to grant Granted Aug 04, 2026
Study what changed to get past this examiner. Based on 5 most recent grants.

Strategy Recommendation AI-generated — please review before filing

Get a prosecution strategy drawn from examiner precedents, rejection analysis, and claim mapping.
Typically takes 5-10 seconds — AI-generated, attorney review required before filing

Prosecution Projections

1-2
Expected OA Rounds
85%
Grant Probability
95%
With Interview (+10.1%)
2y 7m (~6m remaining)
Median Time to Grant
Low
PTA Risk
Based on 835 resolved cases by this examiner. Grant probability derived from career allowance rate.

Sign in with your work email

Enter your email to receive a magic link. No password needed.

Personal email addresses (Gmail, Yahoo, etc.) are not accepted.

Free tier: 3 strategy analyses per month