DETAILED ACTION
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
This action is responsive to the following communications: the Amendment filed 8/19/2024.
Claims 2-21 are pending. Claim 1 is cancelled. Claims 2-21 are new. Claims 2, 9 and 17 are independent.
Information Disclosure Statement
The information disclosure statement (IDS) submitted on is in compliance with the provisions of 37 CFR 1.97. Accordingly, the information disclosure statement is being considered by the examiner.
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claims 14 and 17-21 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
Claim 14 recites the limitation “wherein a width of the through-via increases as the through-via extends away from the first die” in lines 1-2 of the claim, which is indefinite and unclear, because it is unclear how the through-via can extend away from the first die when the through-via is part of the first die, as detailed in claim 13, which claim 14 depends from. The through-via cannot extend away from the first die, because it is part of the first die. It cannot extend away from itself.
Claim 17 recites the limitation “wherein a width of the first via and a width of the second via increases as the second via extends away from the first die” in lines 7-8 of the claim, which is indefinite and unclear, because it is unclear how the width of the first via would increase in relation to the second via extending away from the first die. The first via and the second via are detailed as separate claimed elements, and thereby the extension direction of the second via should have no bearing/effect on the dimension (i.e., the width) of the first via. It is unclear how the width of the first via changes in relation to the directional aspects of the first via.
Note the dependent claims 18-21 necessarily inherit the indefiniteness of the claims on which they depend.
A. Prior-art rejections based at least in part by Chen
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claims 2, 6-7, 17-18 and 21 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Chen et al. (US 2018/0204791 A1, hereinafter “Chen”).
Regarding independent claim 2, Figure 7E of Chen discloses a semiconductor structure comprising:
a first die 502 (“die”- ¶0058), the first die 502 comprising:
a first substrate 509 (“substrate”- ¶0088),
a first interconnect 507 (“RDL”- ¶0058) on a first side of the first substrate 509,
a first through-via 505 (“TSVs”- ¶0058) in the first substrate 509, the first through-via 505 having a width that decreases as the first through-via 505 extends away from the first interconnect 507, and
a first set of connectors 508, 532 (“connectors”, “caps” - ¶0058; see Fig. 5B for notations) on the first interconnect 507;
a first encapsulant 518 (“encapsulating material”- ¶0062) laterally surrounding the first die 502;
a first redistribution structure 520/544 (collectively 520 “RDL” and 544 (“connectors”- ¶0070) on the first substrate 509 and the first encapsulant 518, the first redistribution structure 520/544 having a via 544, the via 544 having a width that increases as the via extends away from the first substrate 509;
a second die 550 (“die”- ¶0070) attached to the first redistribution structure 520/544; and
a second encapsulant 554 (“encapsulating materials”- ¶0072) laterally surrounding the second die 550.
Regarding claim 6, Figure 7E of Chen discloses wherein a sidewall of the second encapsulant 554 is aligned with a sidewall of the first redistribution structure 520/544.
Regarding claim 7, Figure 7E of Chen discloses wherein a sidewall of the first encapsulant 518 is aligned with the sidewall of the first redistribution structure 520/544.
Regarding independent claim 17, Figure 7E of Chen discloses a semiconductor structure comprising:
a first redistribution structure 533/542/708 (collectively 533 “vias”, 542 “RDL” and 708 “connectors”- ¶¶0064, 0081; see Fig. 5G for notation), the first redistribution structure 533/542/708 having a first via 533;
a second redistribution structure 520/544 (collectively 520 “RDL” and 544 “connectors”- ¶0070), the second redistribution structure 520/544 having a second via 544;
a first die 502 (“die”- ¶0058) between and coupled to the first redistribution structure 533/542/708 and the second redistribution structure 520/544, the first die 502 being between the first redistribution structure 533/542/708 and the second redistribution structure 520/544, wherein a width of the first via 533 and a width of the second via 544 increases as the second via 544 extends away from the first die 502, wherein the first die 502 comprises a first through-via 505 (“TSVs”- ¶0058);
a first encapsulant 518 (“encapsulating material”- ¶0062) between the first redistribution structure 533/542/708 and the second redistribution structure 520/544;
a second die 550 (“die”- ¶0070) coupled to the second redistribution structure 520/544;
a second encapsulant 554 (“encapsulating materials”- ¶0072) on the second redistribution structure 520/544 and along sidewalls of the second die 550; and
a third encapsulant 742 (“encapsulating material”- ¶0082) along sidewalls of the first encapsulant 518 and sidewalls of the first redistribution structure 533/542/708.
Regarding claim 18, Figure 7E of Chen discloses wherein the third encapsulant 742 extends along sidewalls (i.e., the top and bottom horizontal sidewalls of 554) of the second encapsulant 554.
Regarding claim 21, Figure 7E of Chen discloses wherein the first die 502 and the second die 550 only partially overlaps each other in a plan view, since dies 502 and 550 partially overlap in a vertical direction as shown in Figure 11B, which would correlate to the dies partially overlapping in a plan view.
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention.
Claim 8 is rejected under 35 U.S.C. 103 as being unpatentable and obvious over Chen.
Regarding claim 8, Figure 7E of Chen discloses wherein the first through-via 505 is one of a plurality of through-vias 505.
Chen does not expressly disclose wherein a total thickness variation of the through-vias of the plurality of through-via is a non-zero value between 0 and 3 µm.
However, it would have been obvious to form the total thickness variation of the through-vias of the plurality of through-via within the claimed range, since it has been held by the Federal circuit that, where the only difference between the prior art and the claims was a recitation of relative dimensions of the claimed device and a device having the claimed relative dimensions would not perform differently than the prior art device, the claimed device was not patentably distinct from the prior art device. (In Gardner v. TEC Systems, Inc., 725 F.2d 1338, 220 USPQ 777 (Fed. Cir. 1984), cert. denied, 469 U.S. 830, 225 USPQ 232 (1984)).
B. Prior-art rejections based at least in part by Su
Claim Rejections - 35 USC § 102
Claims 9-11 and 15-16 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Su et al. (US 2017/0133351 A1, hereinafter “Su”).
Regarding independent claim 9, Figure 11B of Su discloses a semiconductor structure comprising:
a first die 234 (“dies”- ¶0034);
a first redistribution structure 43 (“RDLs”- ¶0036, including the layer surrounding 43), the first die 234 attached to a first surface of the first redistribution structure 43 using solder joints 84 (“solder regions”- ¶0034; see Fig. 11A for notation), wherein the first redistribution structure 43 includes a first via (i.e., the via portions of 43 which extends from the long rectangular portions of 43 to 42), wherein a width of the first via narrows as the first via extends away from the first die 43;
first encapsulant 90 (“encapsulating material”- ¶0034) laterally surrounding the first die 234, the first encapsulant 90 extending along the first surface of the first redistribution structure 43;
a second die 34 (“dies”- ¶0016) directly on a second surface of the first redistribution structure 43;
a second encapsulant 48 (“encapsulating material”- ¶0021) laterally surrounding the second die 34, the second encapsulant 48 extending along the second surface of the first redistribution structure 43, an upper surface of the second encapsulant 48 being level with an upper surface of the second die 34;
a second redistribution structure 50/52/58/66/68/70/72 (collectively 50 “dielectric layers”, 52 “RDLs”, 58 “die”, 66 “encapsulating material”, 68 “dielectric layers” and 70 “RDLs”, 72 “UBMs”- ¶¶0023, 0028, 0030-0031), the second die 34 directly on a first surface of the second redistribution structure 50/52/58/66/68/70/72, wherein the second redistribution structure 50/52/58/66/68/70/72 includes a second via 72, wherein a width of the second via 72 widens as the second via 72 extends away from the first die 234; and
external connectors 74 (“connectors”- ¶0031) on a second surface of the second redistribution structure 50/52/58/66/68/70/72.
Regarding claim 10, Figure 11B of Su discloses wherein an upper surface of the first die 234 is level with an upper surface of the first encapsulant 90.
Regarding claim 11, Figure 11B of Su discloses the semiconductor structure further comprising:
a third encapsulant 86 (“underfill”- ¶0034) on the first surface of the second redistribution structure 50/52/58/66/68/70/72.
Regarding claim 15, Figure 11B of Su discloses wherein the first die 234 and the second die 34 only partially overlap each other in a plan view, since dies 234 and 34 partially overlap in a vertical direction as shown in Figure 11B, which would correlate to the dies partially overlapping in a plan view.
Regarding claim 16, Figure 11B of Su discloses the semiconductor structure further comprising an underfill 86 (“underfill”- ¶0034) between the first die 234 and the first redistribution structure 43, wherein the first encapsulant 90 extends along sidewalls (i.e., the top and bottom horizontal sidewalls of 86) of the underfill 86.
Allowable Subject Matter
Claims 3-5 and 12-14 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
Regarding claim 3 (which claims 4-5 depend from), the prior art of record including Chen and/or Su, either singularly or in combination, does not disclose or suggest the combination of limitations including, but not limited to, “[the] semiconductor structure… further comprising: a third encapsulant laterally surrounding the first encapsulant and the second encapsulant”.
Regarding claim 12, the prior art of record including Chen and/or Su, either singularly or in combination, does not disclose or suggest the combination of limitations including, but not limited to, “[the] semiconductor structure… further comprising: a through-via extending through the third encapsulant, the through-via contacting a conductive feature of the second redistribution structure”.
Regarding claim 13 (which claim 14 depends from), the prior art of record including Chen and/or Su, either singularly or in combination, does not disclose or suggest the combination of limitations including, but not limited to, “wherein the first die comprises a through-via, wherein a conductive element of the first redistribution structure contacts the through-via”.
Claims 19-20 would be allowable if rewritten to overcome the rejection(s) under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), 2nd paragraph, set forth in this Office action and to include all of the limitations of the base claim and any intervening claims.
Regarding claim 19, the prior art of record including Chen and/or Su, either singularly or in combination, does not disclose or suggest the combination of limitations including, but not limited to, “wherein a width of the first through-via narrows as the first through-via extends away from the second redistribution structure”.
Regarding claim 20, the prior art of record including Chen and/or Su, either singularly or in combination, does not disclose or suggest the combination of limitations including, but not limited to, “[the] semiconductor structure… further comprising: a second through-via extending from the first redistribution structure and extending through the third encapsulant”.
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure:
Huang et al. (US 2018/0122774 A1), which discloses a semiconductor structure comprising a die with through vias, and connected to a redistribution structure.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to JAY C CHANG whose telephone number is (571)272-6132. The examiner can normally be reached Mon- Fri 12pm-10pm.
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Eliseo Ramos-Feliciano can be reached at (571)-272-7925. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/JAY C CHANG/Primary Examiner, Art Unit 2817
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