Prosecution Insights
Last updated: October 01, 2026
Application No. 18/786,532

Nanostructure Field-Effect Transistor Device and Method of Forming

Non-Final OA §102§103
Filed
Jul 28, 2024
Priority
Oct 15, 2021 — provisional 63/256,172 +1 more
Examiner
JUNG, MICHAEL YOO LIM
Art Unit
Tech Center
Assignee
Taiwan Semiconductor Manufacturing Company, Ltd.
OA Round
1 (Non-Final)
83%
Grant Probability
Favorable
1-2
OA Rounds
2m
Est. Remaining
93%
With Interview

Examiner Intelligence

Grants 83% — above average
83%
Career Allowance Rate
1063 granted / 1286 resolved
+22.7% vs TC avg
Moderate +10% lift
Without
With
+10.5%
Interview Lift
resolved cases with interview
Typical timeline
2y 4m
Avg Prosecution
25 currently pending
Career history
1300
Total Applications
across all art units

Statute-Specific Performance

§101
2.4%
-37.6% vs TC avg
§103
30.8%
-9.2% vs TC avg
§102
33.4%
-6.6% vs TC avg
§112
28.7%
-11.3% vs TC avg
Black line = Tech Center average estimate • Based on career data from 1286 resolved cases

Office Action

§102 §103
Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . DETAILED ACTION Instant application is a continuation of a family of applications that began with application serial no. 17/705,004. Currently, claims 1-20 are pending1 and examined below. Information Disclosure Statement (IDS) Two information disclosure statements submitted on 07/28/2024 ("07-28-24 IDS") and 01/27/2025 (“01-27-25 IDs”) are in compliance with the provisions of 37 CFR 1.97. Accordingly, the 07-28-24 IDS and 07-28-24 IDS are being considered by the examiner. Specification The title of the invention is not descriptive. A new title is required that is clearly indicative of the invention to which the claims are directed. The following title is suggested: NANOSTRUCTURE FIELD-EFFECT TRANSISTOR DEVICE HAVING GATE DIELECTRIC LAYERS DOPED WITH FLUORINE AND METHOD OF FORMING THE SAME Claim Rejections - 35 USC § 1022 The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. Claims 1-3, 5 and 6 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Pub. No. US 2016/0284804 A1 to Shimizu et al. ("Shimizu"). Figs. 15A and 15B of Shimizu have been provided to support the rejection below: PNG media_image1.png 290 428 media_image1.png Greyscale PNG media_image2.png 305 450 media_image2.png Greyscale Regarding independent claim 1, Shimizu teaches a semiconductor device (see Fig. 15A; see also Fig. 1 and Fig. 15B), comprising: a first gate dielectric layer 629b (para [0163] - “A gate insulating layer 628 includes a first layer 628a, a second layer 628b, a first region 629a, and a second region 629b. The second layer 628b is provided between the first layer 628a and the gate electrode 30. The second layer 628b is provided on the first layer 628a.”) disposed over a channel region 16 or 16, 14 (para [0040] - “On a part of the front face of the drift layer 14, for example, a p-type p-well region (SiC layer) 16 is formed”); a second gate dielectric layer 629a (first region 629a) disposed over the first gate dielectric layer 629b, wherein the first gate dielectric layer 629b (second region 629b) comprises a first oxide HfO2 and/or SiO2 (Fig. 15B shows that the first region 629b includes HfO2 and SiO2) doped with fluorine (bottom of Fig. 15B at the INTERFACE shows some fluorine concentration) and a dipole element (para [0165] - “…An example will be described in which the first layer 628a is a hafnium oxide film.” The region 629b is a part of the first layer 628a; para [0168] - “The second region 629b includes a second element which is at least one element selected from the group consisting of Mg (magnesium), Ca (calcium), Sr (strontium), Ba (barium), Sc (scandium), Y (yttrium), La (lantern), and lanthanoid (Ce, Pr, Nd, Pm, Sm, Eu, Gd, Tb, Dy, Ho, Er, Tm, Yb, and Lu).”), and the second gate dielectric layer 629a comprises a second oxide HfO2 and/or SiO2 (portion of first region 629a is part of layer 628a as shown in Fig. 15A and Fig. 15B) doped with fluorine (see Fig. 15B), wherein the peak concentration of fluorine in a combination of the first gate dielectric layer 629b and the second gate dielectric layer 629a is located within the second gate dielectric layer 629a (Fig. 15B shows peak F concentration in the first region 629a.); and a gate structure 30 disposed over the second gate dielectric layer 629a. Regarding claim 2, Shimizu teaches the dipole moment that comprises La or Y (para [0168]). Regarding claim 3, Shimizu teaches over 60% of the total amount of fluorine in the combination of the first gate dielectric layer 629b and the second gate dielectric layer 629a that is distributed in the second gate dielectric layer 629a. Regarding claim 5, Shimizu teaches the first oxide HfO2 and the second oxide HfO2 that are a same material. Regarding claim 6, Shimizu teaches the first gate dielectric layer 629b that has a peak concentration of the dipole moment element adjacent (near) along a thickness direction of the first gate dielectric layer 629b. Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102 of this title, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. The factual inquiries set forth in Graham v. John Deere Co., 383 U.S. 1, 148 USPQ 459 (1966), that are applied for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows: (1). Determining the scope and contents of the prior art. (2). Ascertaining the differences between the prior art and the claims at issue. (3). Resolving the level of ordinary skill in the pertinent art. (4). Considering objective evidence present in the application indicating obviousness or nonobviousness. Claim 4 is rejected under 35 U.S.C. 103 as being unpatentable over Shimizu. Regarding claim 4, Shimizu teaches the second gate dielectric layer 629a that has an atomic concentration of fluorine that can range from 1x1019 to 4x1022 cm-3 (para [0176] - “A first concentration peak, a second concentration peak, and a third concentration peak are preferably 1×1019 cm−3 or more and 4×1022 cm−3 or less.”) discloses that the first concentration peak that can be fall within the claimed range of 0.1% to 9% as the first concentration peak, the second concentration peak and the third concentration peak can be selected such that they are between 1x1019 and 4x1022 cm-3. "In the case where the claimed ranges 'overlap or lie inside ranges disclosed by the prior art' a prima facie case of obviousness exists. In re Wertheim, 541 F.2d 257, 191 USPQ 90 (CCPA 1976); In re Woodruff, 919 F.2d 1575, 16 USPQ2d 1934 (Fed. Cir. 1990)" (quoting MPEP 2144.05.I.). Since the atomic concentration of fluorine with respect to the other atomic concentrations of other elements overlaps with the claimed range of 0.1% to 9% atomic concentration of fluorine, a prima facie case of obviousness exist. The burden shifts to the Applicant to show that the claimed range provides unexpected result that is difference in kind and not difference in degree. See In re Aller, 220 F. 2d 454, 456, 105 USPQ 233, 235 (CCPA 1955). Before the effective filing date of the claimed invention, it would have been obvious to the one of ordinary skill in the art to select that thickness that overlaps with the claimed range of 0.1% to 9% atomic concentration of fluorine with a reasonable expectation that the semiconductor device will exhibit the characteristics as claimed. Unless the Applicant can show that the claimed range of 0.1% to 9% atomic concentration of fluorine that spans two orders of magnitude in value produces an unexpected result that is different in kind and not different in degree, claim 4 would be obvious to one of ordinary skill in the art. Allowable Subject Matter The following is a statement of reasons for the indication of allowable subject matter: Independent claim 7 is allowed, because the prior art of record, singularly or in combination, fails to disclose or suggest, in combination with the other claimed elements in claim 7, a second transistor comprising: a second dipole-containing gate dielectric layer disposed over a second channel region, wherein the second dipole-containing gate dielectric layer comprises a third oxide doped with a second dipole element and fluorine, wherein the first dipole element is different than the second dipole element; a second fluorine-containing gate dielectric layer disposed over the second dipole-containing gate dielectric layer, wherein the second fluorine-containing gate dielectric layer comprises a fourth oxide doped with fluorine, wherein a peak concentration of fluorine in the second fluorine-containing gate dielectric layer is greater than a peak concentration of fluorine in the second dipole-containing gate dielectric layer; and a second gate electrode disposed over the second fluorine-containing gate dielectric layer. Claims 8-12 are allowed, because they depend on the allowed independent claim 7. Independent claim 13 is allowed, because the prior art of record, singularly or in combination, fails to disclose or suggest, in combination with the other claimed elements in claim 13, a second transistor comprising: a second semiconductor material; a second gate dielectric over the second semiconductor material, the second gate dielectric comprising second dipole-containing gate dielectric, the second dipole-containing gate dielectric comprising a second dipole element different from the first dipole element; and a second gate electrode disposed over the second gate dielectric. Claims 14-20 are allowed, because they depend on the allowed independent claim 13. Conclusion The prior art made of record and not relied upon is considered pertinent to applicant's disclosure: Pub. No. US 8,228,725 B2 to Forbes et al. Pub. No. US 2010/0013021 A1 to Chen et al. Pub. No. US 2008/0203488 A1 to Chung et al. Any inquiry concerning this communication or earlier communications from the examiner should be directed to MICHAEL JUNG whose telephone number is (408) 918-7554. The examiner can normally be reached on 8:30 A.M. to 7 P.M. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Eliseo Ramos-Feliciano can be reached on (571) 272-7925. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of an application may be obtained from the Patent Application Information Retrieval (PAIR) system. Status information for published applications may be obtained from either Private PAIR or Public PAIR. Status information for unpublished applications is available through Private PAIR only. For more information about the PAIR system, see http://pair-direct.uspto.gov. Should you have questions on access to the Private PAIR system, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative or access to the automated information system, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /MICHAEL JUNG/Primary Examiner, Art Unit 2817 02 September 2026 1 On 08/15/2024, the Applicant preliminarily amended the claims to amend claims 9 and 10 and to add new claims 13-20. 2 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status
Read full office action

Prosecution Timeline

Jul 28, 2024
Application Filed
Aug 15, 2024
Response after Non-Final Action
Sep 08, 2026
Non-Final Rejection mailed — §102, §103 (current)

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Prosecution Projections

1-2
Expected OA Rounds
83%
Grant Probability
93%
With Interview (+10.5%)
2y 4m (~2m remaining)
Median Time to Grant
Low
PTA Risk
Based on 1286 resolved cases by this examiner. Grant probability derived from career allowance rate.

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