DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Information Disclosure Statement
The information disclosure statement (IDS) submitted on 10/09/2024 is in compliance with the provisions of 37 CFR 1.97. Accordingly, the information disclosure statement is being considered by the examiner.
Double Patenting
The nonstatutory double patenting rejection is based on a judicially created doctrine grounded in public policy (a policy reflected in the statute) so as to prevent the unjustified or improper timewise extension of the “right to exclude” granted by a patent and to prevent possible harassment by multiple assignees. A nonstatutory double patenting rejection is appropriate where the conflicting claims are not identical, but at least one examined application claim is not patentably distinct from the reference claim(s) because the examined application claim is either anticipated by, or would have been obvious over, the reference claim(s). See, e.g., In re Berg, 140 F.3d 1428, 46 USPQ2d 1226 (Fed. Cir. 1998); In re Goodman, 11 F.3d 1046, 29 USPQ2d 2010 (Fed. Cir. 1993); In re Longi, 759 F.2d 887, 225 USPQ 645 (Fed. Cir. 1985); In re Van Ornum, 686 F.2d 937, 214 USPQ 761 (CCPA 1982); In re Vogel, 422 F.2d 438, 164 USPQ 619 (CCPA 1970); In re Thorington, 418 F.2d 528, 163 USPQ 644 (CCPA 1969).
A timely filed terminal disclaimer in compliance with 37 CFR 1.321(c) or 1.321(d) may be used to overcome an actual or provisional rejection based on nonstatutory double patenting provided the reference application or patent either is shown to be commonly owned with the examined application, or claims an invention made as a result of activities undertaken within the scope of a joint research agreement. See MPEP § 717.02 for applications subject to examination under the first inventor to file provisions of the AIA as explained in MPEP § 2159. See MPEP § 2146 et seq. for applications not subject to examination under the first inventor to file provisions of the AIA . A terminal disclaimer must be signed in compliance with 37 CFR 1.321(b).
The filing of a terminal disclaimer by itself is not a complete reply to a nonstatutory double patenting (NSDP) rejection. A complete reply requires that the terminal disclaimer be accompanied by a reply requesting reconsideration of the prior Office action. Even where the NSDP rejection is provisional the reply must be complete. See MPEP § 804, subsection I.B.1. For a reply to a non-final Office action, see 37 CFR 1.111(a). For a reply to final Office action, see 37 CFR 1.113(c). A request for reconsideration while not provided for in 37 CFR 1.113(c) may be filed after final for consideration. See MPEP §§ 706.07(e) and 714.13.
The USPTO Internet website contains terminal disclaimer forms which may be used. Please visit www.uspto.gov/patent/patents-forms. The actual filing date of the application in which the form is filed determines what form (e.g., PTO/SB/25, PTO/SB/26, PTO/AIA /25, or PTO/AIA /26) should be used. A web-based eTerminal Disclaimer may be filled out completely online using web-screens. An eTerminal Disclaimer that meets all requirements is auto-processed and approved immediately upon submission. For more information about eTerminal Disclaimers, refer to www.uspto.gov/patents/apply/applying-online/eterminal-disclaimer.
Claims 1-17 are rejected on the ground of nonstatutory double patenting as being unpatentable over Claims 1-16 of U.S. Patent No. 12,206,013 to Kao et al. Although the claims at issue are not identical, they are not patentably distinct from each other because the difference in claim language largely amounts to claiming embodiments already protected by the cited patent. Below, the pending claims are matched with their equivalent in the cited patent. The patented language is italicized.
Pending Claim 1 recites a semiconductor structure, comprising:
a first fin, a second fin, a third fin and a fourth fin disposed over a substrate;
a first epitaxial feature extending over and in contact with the first fin and the second fin;
Patented Claim 1 recites a semiconductor structure, comprising:
a first fin, a second fin, a third fin and a fourth fin disposed over a substrate;
a first epitaxial feature extending over and in contact with the first fin and the second fin;
a second epitaxial feature extending over and in contact with the third fin and the fourth fin;
an isolation feature disposed between the first fin and the second fin, the second fin and the third fin, and between the third fin and the fourth fin; and
a second epitaxial feature extending over and in contact with the third fin and the fourth fin;
an isolation feature disposed between the first fin and the second fin, the second fin and the third fin, and between the third fin and the fourth fin; and
a dielectric fin disposed partially in the isolation feature between the second fin and the third fin, wherein the dielectric fin includes an inner feature and an outer layer disposed around the inner feature,
wherein a composition of the outer layer is different from a composition of the inner feature,
wherein a portion of the outer layer extends into the inner feature,
a dielectric fin disposed partially in the isolation feature between the second fin and the third fin, wherein the dielectric fin includes an inner feature and an outer layer disposed around the inner feature,
wherein a composition of the outer layer is different from a composition of the inner feature,
wherein a portion of the outer layer extends into the inner feature.
wherein the first epitaxial feature and the second epitaxial feature are in contact with the outer layer of the dielectric fin.
Patented Claim 2 recites wherein a portion of the dielectric fin is sandwiched between the first epitaxial feature and the second epitaxial feature.
The pending claim differs from the cited patent by being an embodiment that combines Claims 1 and 2 of the cited patent. Since such an embodiment is already protected by the cited patent, it is not patentably distinct.
For brevity, the dependent claims are matched with their equivalent in the cited patent without repetition of the claim language.
Pending Claim 2 is unpatentable in view of patented Claim 3.
Pending Claim 3 is unpatentable in view of patented Claim 4.
Pending Claim 4 is unpatentable in view of patented Claim 5.
Pending Claim 5 is unpatentable in view of patented Claim 6.
Pending Claim 6 is unpatentable in view of patented Claim 7.
Pending Claim 7 is unpatentable in view of patented Claim 8.
Pending Claim 8 is unpatentable in view of patented Claim 9.
Pending Claim 9 is unpatentable in view of patented Claim 10.
Pending Claim 10 recites a semiconductor structure, comprising:
a first fin, a second fin, a third fin and a fourth fin disposed over a substrate;
a first epitaxial feature extending over and in contact with the first fin and the second fin;
Patented Claim 1 recites a semiconductor structure, comprising:
a first fin, a second fin, a third fin and a fourth fin disposed over a substrate;
a first epitaxial feature extending over and in contact with the first fin and the second fin;
a second epitaxial feature extending over and in contact with the third fin and the fourth fin;
an isolation feature disposed between the first fin and the second fin, the second fin and the third fin, and between the third fin and the fourth fin;
a second epitaxial feature extending over and in contact with the third fin and the fourth fin;
an isolation feature disposed between the first fin and the second fin, the second fin and the third fin, and between the third fin and the fourth fin; and
a dielectric fin disposed partially in the isolation feature between the second fin and the third fin; and
a dielectric fin disposed partially in the isolation feature between the second fin and the third fin,
a contact etch stop layer (CESL) dispose on the first epitaxial feature, the dielectric fin, and the second epitaxial feature wherein the dielectric fin comprises a middle seam, wherein a portion of the CESL extends into the middle seam.
Patented Claim 6 recites a contact etch stop layer (CESL) dispose on the first epitaxial feature, the dielectric fin, and the second epitaxial feature, wherein a portion of the CESL extends into the middle seam.
The pending claim language differs from the cited patent by including an embodiment that combines Claims 1 and 6 of the cited patent and moves the limitations “wherein the dielectric fin includes an inner feature and an outer layer disposed around the inner feature, wherein a composition of the outer layer is different from a composition of the inner feature, wherein a portion of the outer layer extends into the inner feature” as a dependent claim. The claiming of an embodiment already protected by the cited patent does not provide patentable distinction. The removal of the language for the fin to include an inner feature and outer layer is not found to provide patentable distinction since a fin having a middle seam would require at least two layers and having one layer extend into the other layer to create a seam. The requirement for the two layers to comprise different compositions is additionally obvious since it is common to utilize different layers for multiple reasons such as tensile stress and enhanced electrical isolation.
For brevity, the dependent claims are matched with their equivalent in the cited patent without repetition of the claim language.
Pending Claim 11 is obvious in view of patented Claim 11.
Pending Claim 12 is unpatentable in view of patented Claim 1.
Pending Claim 13 is unpatentable in view of patented Claim 5.
Pending Claim 14 is unpatentable in view of patented Claim 2.
Pending Claim 15 is unpatentable in view of patented Claim 3.
Pending Claim 16 is unpatentable in view of patented Claim 8.
Claims 18-20 are rejected on the ground of nonstatutory double patenting as being unpatentable over Claims 11-20 of U.S. Patent No. 11,710,782 to Kao et al. Although the claims at issue are not identical, they are not patentably distinct from each other because the difference in claim language largely amounts to claiming embodiments already protected by the cited patent. Below, the pending claims are matched with their equivalent in the cited patent. The patented language is italicized.
Pending Claim 18 recites a method, comprising:
providing a workpiece comprising
a substrate,
a first pair of fins over the substrate and a second pair of fins over the substrate, the first pair of fins and the second pair of fins being spaced apart by a trench;
Patented Claim 11 recites a method, comprising:
providing a workpiece comprising
a substrate,
a first group of fin structures over the substrate and a second group of fin structures over the substrate, the first group of fin structures and the second group of fin structures being spaced apart by a trench;
conformally depositing a first dielectric layer over the workpiece;
conformally depositing a second dielectric layer over the first dielectric layer to form a seam in the second dielectric layer over the trench;
conformally depositing a first dielectric layer over the workpiece;
conformally depositing a second dielectric layer over the first dielectric layer;
after the conformally depositing of the second dielectric layer, planarizing the workpiece to expose the first dielectric layer over the first pair of fins and the second pair of fins;
selectively etching back the first dielectric layer to form a dielectric fin within the trench, the dielectric fin comprising a first portion in the first dielectric layer and a second portion rising above the first dielectric layer; and
after the conformally depositing of the second dielectric layer, planarizing the workpiece to expose the first dielectric layer over the first group of fin structures and the second group of fin structures;
selectively etching back the first dielectric layer to form a dielectric fin within the trench, the dielectric fin comprising a first portion in the first dielectric layer and a second portion rising above the first dielectric layer; and
annealing the workpiece to selectively form an outer layer on surfaces of the second portion of the dielectric fin, wherein the first dielectric layer comprises silicon oxide, silicon oxynitride, or fluorine-doped silicate glass (FSG), wherein the second dielectric layer comprises hydrogenated silicon carbonitride (H:SiCN).
annealing the workpiece to selectively form an outer layer on surfaces of the second portion of the dielectric fin, wherein a composition of the first dielectric layer is different from a composition of the second dielectric layer.
Patented Claim 12 recites wherein the first dielectric layer comprises silicon oxide, silicon oxynitride, or fluorine-doped silicate glass (FSG), wherein the second dielectric layer comprises hydrogenated silicon carbonitride (H:SiCN).
The differences in claim language, beyond a rewording of some elements of the methods, involves the claiming of an embodiment already protected in the cited patent by combining Claims 11 and 12. The claiming of an already protected embodiment does not provide for patentable distinction.
For brevity, the dependent claims are matched with their equivalent in the cited patent without repetition of the claim language.
Pending Claim 19 is unpatentable in view of patented Claim 13.
Pending Claim 20 is obvious in view of patented Claims 11, 17 and 18.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to DAVID C SPALLA whose telephone number is (303)297-4298. The examiner can normally be reached Mon-Fri 10am-5pm MST.
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/DAVID C SPALLA/ Primary Examiner, Art Unit 2893
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