Prosecution Insights
Last updated: October 02, 2026
Application No. 18/788,253

THIN FILM TRANSISTOR BASED LIGHT SENSOR

Non-Final OA §103
Filed
Jul 30, 2024
Priority
Aug 30, 2021 — divisional of 12/249,663
Examiner
RODRIGUEZ VILLANU, SANDRA MILENA
Art Unit
Tech Center
Assignee
Taiwan Semiconductor Manufacturing Company, Ltd.
OA Round
1 (Non-Final)
88%
Grant Probability
Favorable
1-2
OA Rounds
8m
Est. Remaining
99%
With Interview

Examiner Intelligence

Grants 88% — above average
88%
Career Allowance Rate
102 granted / 116 resolved
+27.9% vs TC avg
Moderate +12% lift
Without
With
+12.1%
Interview Lift
resolved cases with interview
Typical timeline
2y 10m
Avg Prosecution
39 currently pending
Career history
162
Total Applications
across all art units

Statute-Specific Performance

§101
0.5%
-39.5% vs TC avg
§103
49.8%
+9.8% vs TC avg
§102
22.7%
-17.3% vs TC avg
§112
25.4%
-14.6% vs TC avg
Black line = Tech Center average estimate • Based on career data from 116 resolved cases

Office Action

§103
DETAILED ACTION General Remarks The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Claim Rejections - 35 USC § 103 The following is a quotation of AIA 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102 of this title, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claim(s) 1-3, 6-12, and 15-20 is/are rejected under AIA 35 U.S.C. 103 as being unpatentable over Matsumoto (US 20050093466 A1, hereinafter Matsumoto) in view of Jeon et al. (US 20120267513 A1, hereinafter Jeon). Re: Independent Claim 1, Matsumoto discloses a method, comprising: receiving light (light detections 30a and 30b, [0017]) via a light sensing area on a first photodiode (31 detection light sensors in [0017], Fig. 4), wherein the first photodiode (31) is configured to generate a first current based on the received light ([0020]); comparing the first current to a second current (including a comparator 33 in [0023], Fig. 4) generated by a second photodiode (32 reference light sensor in [0023], Fig. 4), wherein the second photodiode (32) and a capping material (51 a light shielding film in [0070]), to prevent receiving the light ([0070]); and in response to the comparison indicating in a difference between the first and second currents, outputting an alarm signal (the output signal from the comparator 33 in [0048]). Matsumoto does not expressly disclose the first photodiode as being a light sensing area on a first channel region of a first thin film transistor, wherein the first thin film transistor is configured to generate a first current based on the received light; the second photodiode being a second thin film transistor, wherein the second thin film transistor comprises a second channel region and a capping material, over the second channel region. However, in the same manufacturing of a semiconductor device field of endeavor, Jeon discloses a first channel region (106 channel, [0064], Fig. 1) of a first thin film transistor (140 light sensor transistor, [0065], Fig. 1); a second thin film transistor (130 transistor, [0065], Fig. 1), wherein the second thin film transistor (130) comprises a second channel region (107 channel, [0064], Fig. 1) and a capping material (114 light-shielding film, [0064], Fig. 1), over the second channel region (107). Therefore, Matsumoto in view of Jeon teaches a light sensing area on a first channel region (106, Jeon) of a first thin film transistor (140, Jeon), wherein the first thin film transistor (140, Jeon) is configured to generate a first current based on the received light (31, Matsumoto); a second thin film transistor (130, Jeon), wherein the second thin film transistor (130, Jeon) comprises a second channel (107, Jeon) region and a capping material (114, Jeon), over the second channel region (107, Jeon). It would have been obvious to one of ordinary skill in the art, absent unexpected results, before the effective filing date of the claimed invention to include the Jeon’s method of a first channel region of a first thin film transistor; a second thin film transistor, wherein the second thin film transistor comprises a second channel region and a capping material, over the second channel region for the photodiode regions of Matsumoto’s method in order to have the predictable result of improving the operating reliability of the light-sensing apparatuses ([0003], Jeon); further, simplifying manufacture could be attained since separate diode and transistor structures would not need to be formed and instead just transistors would be needed. Re: Claim 2, Matsumoto modified by Jeon discloses the method of claim 1, wherein receiving the light comprises receiving the light on the first channel region (106, Jeon) of the first thin film transistor (140, Jeon) having a first source/drain (S/D) region (108 source/drain, [0064], Fig. 1, as part of 140, Jeon), a second S/D region (109 source/drain, [0064], Fig. 1, as part of 140, Jeon), and an opening (an opening between 108 and 109, Fig. 1, Jeon) between the first and second S/D regions (108,109, Jeon) and above the first channel region (106, Jeon). PNG media_image1.png 498 527 media_image1.png Greyscale Matsumoto’s Figure 4-Annotated. Re: Claim 3, Matsumoto modified by Jeon discloses the method of claim 1, comparing the first current to the second current (including a comparator 33 in [0023], Fig. 4, Matsumoto) comprises preventing the light from being received by the second channel region (107, Jeon) of the second thin film transistor (130, Jeon) having a first S/D region (109 source/drain, [0064], Fig. 1, as part of 130, Jeon), a second S/D region (110 source/drain, [0064], Fig. 1, as part of 140, Jeon), and the capping material (114, Jeon) between the first and second S/D regions (109, 110, Jeon) and above the second channel region (107, Jeon). Re: Claim 6, Matsumoto modified by Jeon discloses the method of claim 1, wherein comparing the first current to the second current comprises biasing the first (140, Jeon) and second (130, Jeon) thin film transistors in an off state (since the claimed structure is substantially identical to that of the prior art structure, claimed properties are presumed to be present, see MPEP 2112.01(I)). Re: Claim 7, Matsumoto modified by Jeon discloses the method of claim 6, wherein comparing the first current to the second current further comprises generating, by the first (140, Jeon) thin film transistor, a first sub-threshold current higher than a second sub-threshold current generated by the second thin film transistor (130, Jeon)(since the claimed structure is substantially identical to that of the prior art structure, claimed properties are presumed to be present, see MPEP 2112.01(I)). Re: Claim 8, Matsumoto modified by Jeon discloses the method of claim 6, wherein comparing the first current to the second current further comprises generating, by the second thin film transistor (130, Jeon), the second current based on a sub-threshold current of the second thin film transistor (130, Jeon)(since the claimed structure is substantially identical to that of the prior art structure, claimed properties are presumed to be present, see MPEP 2112.01(I)). Re: Claim 9, Matsumoto modified by Jeon discloses the method of claim 1, wherein outputting the alarm signal (the output signal from the comparator 33 in [0048], Matsumoto) comprises triggering an alert indicative of an unauthorized access to an integrated circuit device. Re: Independent Claim 10, Matsumoto discloses a method, comprising: receiving light (light detections 30a and 30b, [0017]) with a first photodiode (31 detection light sensors in [0017], Fig. 4), and configured to generate a first current based on the light being received ([0020]) by the first photodiode (31); comparing the first current to a second current (including a comparator 33 in [0023], Fig. 4) generated by a second photodiode (32 reference light sensor in [0023], Fig. 4), wherein a capping material (51 a light shielding film in [0070]) to prevent from receiving the light ([0070]); and in response to the comparison indicating in a difference between the first and second currents, outputting an alarm signal (the output signal from the comparator 33 in [0048]). Matsumoto does not expressly disclose receiving light with a first photodiode is a first transistor having a first channel region and configured to generate a first current based on the light being received by the first channel region; comparing the first current to a second current generated by the second photodiode is a second transistor having a second channel region, wherein a capping material on the second channel region prevents the second transistor from receiving the light. However, in the same manufacturing of a semiconductor device field of endeavor, Jeon discloses receiving light with a first transistor (140 light sensor transistor, [0065], Fig. 1) having a first channel region (106 channel, [0064], Fig. 1) and configured to generate a first current based on the light being received by the first channel region (106 channel); comparing the first current to a second current generated by a second transistor (130 transistor, [0065], Fig. 1) having a second channel region (107 channel, [0064], Fig. 1), wherein a capping material (114 light-shielding film, [0064], Fig. 1) on the second channel region (107) prevents the second transistor (130) from receiving the light. Therefore, Matsumoto in view of Jeon teaches receiving light with a first transistor (140, Jeon) having a first channel region (106, Jeon) and configured to generate a first current based on the light being received by the first channel region (106, Jeon); comparing (33, Matsumoto) the first current to a second current generated by a second transistor (130, Jeon) having a second channel region (107, Jeon), wherein a capping material (114, Jeon) on the second channel region (107, Jeon) prevents the second transistor (130, Jeon) from receiving the light. It would have been obvious to one of ordinary skill in the art, absent unexpected results, before the effective filing date of the claimed invention to include the Jeon’s method of a first transistor having a first channel region a second transistor having a second channel region, wherein a capping material on the second channel region prevents the second transistor from receiving the light for the photodiodes of Matsumoto’s method in order to have the predictable result of improving the operating reliability of the light-sensing apparatuses ([0003], Jeon); further, simplifying manufacture could be attained since separate diode and transistor structures would not need to be formed and instead just transistors would be needed. Re: Claim 11, Matsumoto modified by Jeon discloses the method of claim 10, wherein receiving the light comprises receiving the light on the first channel region (106, Jeon) of the first transistor (140, Jeon) having a first source/drain (S/D) region (108 source/drain, [0064], Fig. 1, as part of 140, Jeon), a second S/D region (109 source/drain, [0064], Fig. 1, as part of 140, Jeon), and an opening (an opening between 108 and 109, Fig. 1, Jeon) between the first and second S/D regions (108,109, Jeon) and above the first channel region (106, Jeon). Re: Claim 12, Matsumoto modified by Jeon discloses the method of claim 10, wherein comparing the first current to the second current (including a comparator 33 in [0023], Fig. 4, Matsumoto) comprises preventing the light from being received by the second channel region (107, Jeon) of the second transistor (130, Jeon) having a first S/D region (109 source/drain, [0064], Fig. 1, as part of 130, Jeon), a second S/D region (110 source/drain, [0064], Fig. 1, as part of 140, Jeon), and the capping material (114, Jeon) between the first and second S/D regions (109, 110, Jeon) and above the second channel region (107, Jeon). Re: Claim 15, Matsumoto modified by Jeon discloses the method of claim 10, wherein comparing the first current to the second current comprises biasing the first (140, Jeon) and second (130, Jeon) transistors in an off state (since the claimed structure is substantially identical to that of the prior art structure, claimed properties are presumed to be present, see MPEP 2112.01(I)). Re: Claim 16, Matsumoto modified by Jeon discloses the method of claim 15, wherein outputting the alarm signal (the output signal from the comparator 33 in [0048], Matsumoto) comprises triggering an alert indicative of an unauthorized access to an integrated circuit device. Re: Independent Claim 17, Matsumoto discloses a method, comprising: generating, with a first photodiode (31 detection light sensors in [0017], Fig. 4) configured to receive light, a first current; generating, with a second photodiode (32 reference light sensor in [0023], Fig. 4) configured to block the light (having 51 a light shielding film in [0070]), a second current; and outputting an alarm signal (the output signal from the comparator 33 in [0048]) based on a comparison of the first current to the second current (including a comparator 33 in [0023], Fig. 4). Matsumoto does not expressly disclose generating, with a first photodiode is a first transistor configured to receive light over a first channel region, a first current; generating, with the second photodiode is a second transistor configured to block the light over a second channel region, a second current. However, in the same manufacturing of a semiconductor device field of endeavor, Jeon discloses generating, with a first transistor (140 light sensor transistor, [0065], Fig. 1) configured to receive light over a first channel region (106 channel, [0064], Fig. 1), a first current; generating, with a second transistor (130 transistor, [0065], Fig. 1) configured to block the light (having 114 light-shielding film, [0064], Fig. 1) over a second channel region (107 channel, [0064], Fig. 1), a second current. It would have been obvious to one of ordinary skill in the art, absent unexpected results, before the effective filing date of the claimed invention to include the Jeon’s method of generating, with a first transistor configured to receive light over a first channel region, a first current; generating, with a second transistor configured to block the light over a second channel region, a second current for the photodiodes of Matsumoto’s method in order to have the predictable result of improving the operating reliability of the light-sensing apparatuses ([0003], Jeon); further, simplifying manufacture could be attained since separate diode and transistor structures would not need to be formed and instead just transistors would be needed. Re: Claim 18, Matsumoto modified by Jeon discloses the method of claim 17, wherein generating the first current comprises receiving the light on the first channel region (106, Jeon) of the first transistor (140, Jeon) having a first source/drain (S/D) region (108 source/drain, [0064], Fig. 1, as part of 140, Jeon), a second S/D region (109 source/drain, [0064], Fig. 1, as part of 140, Jeon), and an opening (an opening between 108 and 109, Fig. 1, Jeon) between the first and second S/D regions (108,109, Jeon) and above the first channel region (106, Jeon). Re: Claim 19, Matsumoto modified by Jeon discloses the method of claim 17, wherein generating the second current (including a comparator 33 in [0023], Fig. 4, Matsumoto) comprises preventing the light from being received by the second channel region (107, Jeon) of the second transistor (130, Jeon) having a first S/D region (109 source/drain, [0064], Fig. 1, as part of 130, Jeon), a second S/D region (110 source/drain, [0064], Fig. 1, as part of 140, Jeon), and a capping material (114, Jeon) between the first and second S/D regions (109, 110, Jeon) and above the second channel region (107, Jeon). Re: Claim 20, Matsumoto modified by Jeon discloses the method of claim 17, wherein outputting the alarm signal (the output signal from the comparator 33 in [0048], Matsumoto) comprises triggering an alert indicative of an unauthorized access to an integrated circuit device. Claim(s) 4-5 and 13-14 is/are rejected under AIA 35 U.S.C. 103 as being unpatentable over Matsumoto in view of Jeon and further in view of Mathur et al. (US 6714243 B1, hereinafter Mathur). Re: Claim 4, Matsumoto modified by Jeon discloses the method of claim 1, Matsumoto modified by Jeon does not expressly disclose wherein comparing the first current to the second current comprises: charging first and second capacitors electrically coupled to the first and second thin film transistors, respectively; and in response to receiving the light via the light sensing area of the first thin film transistor, discharging the first capacitor. However, in the same manufacturing of a semiconductor device field of endeavor, Mathur discloses a capacitor (131 Col. 6, lines 27-42, Fig. 8) coupled to a photodiode (130 Col. 6, lines 27-42, Fig. 8) and in response to receiving the light via the light sensing area of the photodiode (130), discharging (after the light received, the capacitor is charged then the current flow from the capacitor to the transistor, resulting in the discharging of the capacitor, Col. 6, lines 27-42) the capacitor (131). Therefore, Matsumoto in view of Jeon and Mathur teaches a wherein comparing (33, Matsumoto) the first current to the second current comprises: charging first and second capacitors (Mathur’s 131 applied to each Jeon’s 140 and Jeon’s 130) electrically coupled to the first and second thin film transistors (Jeon’s 140 and Jeon’s 130), respectively. It would have been obvious to one of ordinary skill in the art, absent unexpected results, before the effective filing date of the claimed invention to include the Jeon’s method of a capacitor coupled to a photodiode and in response to receiving the light via the light sensing area of the photodiode, discharging the capacitor to the combination of Matsumoto and Jeon in order to have the predictable result of collecting all of the photon flux during the exposure time of the light (Col. 6, lines 47-50, Mathur) which would allow for a stronger signal and improve detection indication. Re: Claim 5, Matsumoto modified by Jeon and Mathur discloses the method of claim 4, wherein comparing the first current to the second current further comprises comparing (33, Matsumoto), with a comparator device (33, Matsumoto) having inputs coupled to the first and second capacitors (Mathur’s 131 applied to each Jeon’s 140 and Jeon’s 130), a first voltage representative of the first capacitor to a second voltage representative of the second capacitor (Mathur’s 131 applied to each Jeon’s 140 and Jeon’s 130, wherein the voltage/current from both transistors are compared by Matsumoto’s 33). Re: Claim 13, Matsumoto modified by Jeon discloses the method of claim 10, Matsumoto modified by Jeon does not expressly disclose wherein comparing the first current to the second current comprises: charging first and second capacitors electrically coupled to the first and second transistors, respectively; and in response to receiving the light via the light sensing area of the first transistor, discharging the first capacitor. However, in the same manufacturing of a semiconductor device field of endeavor, Mathur discloses a capacitor (131 Col. 6, lines 27-42, Fig. 8) coupled to a photodiode (130 Col. 6, lines 27-42, Fig. 8) and in response to receiving the light via the light sensing area of the photodiode (130), discharging (after the light received, the capacitor is charged then the current flow from the capacitor to the transistor, resulting in the discharging of the capacitor, Col. 6, lines 27-42) the capacitor (131). Therefore, Matsumoto in view of Jeon and Mathur teaches a wherein comparing (33, Matsumoto) the first current to the second current comprises: charging first and second capacitors (Mathur’s 131 applied to each Jeon’s 140 and Jeon’s 130) electrically coupled to the first and second transistors (Jeon’s 140 and Jeon’s 130), respectively. It would have been obvious to one of ordinary skill in the art, absent unexpected results, before the effective filing date of the claimed invention to include the Jeon’s method of a capacitor coupled to a photodiode and in response to receiving the light via the light sensing area of the photodiode, discharging the capacitor to the combination of Matsumoto and Jeon in order to have the predictable result of collecting all of the photon flux during the exposure time of the light (Col. 6, lines 47-50, Mathur). Re: Claim 14, Matsumoto modified by Jeon and Mathur discloses the method of claim 13, wherein comparing the first current to the second current further comprises comparing (33, Matsumoto), with a comparator device (33, Matsumoto) having inputs coupled to the first and second capacitors (Mathur’s 131 applied to each Jeon’s 140 and Jeon’s 130), a first voltage representative of the first capacitor to a second voltage representative of the second capacitor (Mathur’s 131 applied to each Jeon’s 140 and Jeon’s 130, wherein the voltage/current from both transistors are compared by Matsumoto’s 33). Conclusion The prior art made of record and not relied upon is considered pertinent to applicant's disclosure: Cai (US 20220406088 A1) teaches “LIGHT SENSOR AND DISPLAY DEVICE”. This document is related to a light sensing transistor and a switching transistor in the light sensor are configured to form a light sensor circuit. Chandar (US 6590497 B2) teaches “LIGHT SENSING HIDDEN OBJECT LOCATION SYSTEM”. This document is related to an ambient light photosensor located on the object. The object locating system also includes an alarm located on the wireless object, which is electrically connected to the ambient light photosensor. The ambient light photosensor senses ambient lighting conditions. The alarm is actuated when the ambient light photosensor detects ambient light below a predetermined level. Any inquiry concerning this communication or earlier communications from the examiner should be directed to SANDRA M RODRIGUEZ VILLANUEVA whose telephone number is (571)272-1936. The examiner can normally be reached Monday to Friday 8:00am-5:00pm (EST). Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Jessica Manno can be reached at (571) 272-2339. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /SANDRA MILENA RODRIGUEZ VILLANUEVA/ Examiner, Art Unit 2898 /JESSE Y MIYOSHI/ Primary Examiner, Art Unit 2898
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Prosecution Timeline

Jul 30, 2024
Application Filed
Sep 24, 2026
Non-Final Rejection mailed — §103 (current)

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Prosecution Projections

1-2
Expected OA Rounds
88%
Grant Probability
99%
With Interview (+12.1%)
2y 10m (~8m remaining)
Median Time to Grant
Low
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