DETAILED ACTION
This Office Action is in response to Application filed July 30, 2024.
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Election/Restrictions
Applicants’ election without traverse of Species C drawn to the embodiment shown in Fig. 4 of current application, claims 1, 2, 4-6, 9-15, 19 and 20, in the reply filed on September 30, 2026 is acknowledged.
Claim Rejections - 35 USC § 112
The following is a quotation of the first paragraph of 35 U.S.C. 112(a):
(a) IN GENERAL.—The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor or joint inventor of carrying out the invention.
The following is a quotation of the first paragraph of pre-AIA 35 U.S.C. 112:
The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor of carrying out his invention.
Claims 1, 2, 4-6, 9-15, 19 and 20 are rejected under 35 U.S.C. 112(a) or 35 U.S.C. 112 (pre-AIA ), first paragraph, as failing to comply with the enablement requirement. The claims contain subject matter which was not described in the specification in such a way as to enable one skilled in the art to which it pertains, or with which it is most nearly connected, to make and/or use the invention.
(A) The breadth of the claims; Applicants claim that “an aggressor isolation well” is “electrically connected with the victim isolation well via the gate oxide” on lines 5-6 of claim 1, and “a first isolation well” is “electrically connected with the second isolation well via the gate oxide” on lines 7-8 of claim 13 and on lines 6-7 of claim 19;
(B) The nature of the invention; Applicants basically claim that “the gate oxide” is a conductor or a semiconductor that electrically connects the aggressor and victim isolation well in claim 1, and the first and second isolation well in claims 13 and 19;
(C) The state of the prior art; “the gate oxide” is rather an insulator since otherwise “the gate oxide” would not function as a gate insulator, which is a required insulating characteristic of “the gate oxide”;
(D) The level of one of ordinary skill; one of ordinary skill in the art understands that “the gate oxide” should be a gate insulator formed of an insulating material since otherwise the gate insulator would not function a gate insulator isolating a gate electrode from a channel layer;
(E) The level of predictability in the art; “the gate oxide” or a gate insulator should be formed of an insulating material since otherwise a field effect transistor comprising a conductive or semiconducting “gate oxide” would not function as a field effect transistor; furthermore, Applicants claim that “the voltmeter is configured to detect process charge by measuring an electrical parameter of the gate oxide” on lines 12-13 of claim 19, which appears to suggest that “the gate oxide” traps the claimed process charge, which in turn suggests that “the gate oxide” is an insulator that traps the claimed process charge since (a) an electrically conductive or semiconducting “gate oxide” would not trap the claimed process charge and then its electrical parameter is altered as implied in claim 19, and (b) the claimed electrical connection between the aggressor and victim isolation well, and the first and second isolation well recited in claims 1, 13 and 19 suggest freely moving process charge through “gate oxide”;
(F) The amount of direction provided by the inventor; Applicants do not provide any direction or guidance on how to form “the gate oxide” that is conductive or semiconducting, while being electrically connected to the claimed two isolation wells;
(G) The existence of working examples; there are no working examples of an electrically conductive or semiconducting “gate oxide”; and
(H) The quantity of experimentation needed to make or use the invention based on the content of the disclosure; it is not possible to manufacture any process charge detection circuit that comprises “the gate oxide” that is a part of a field effect transistor as a gate insulator, but that also functions as an electrical connector of two isolation wells.
Claims 2, 4-6 and 9-12 depend on claim 1, claims 14 and 15 depend on claim 13, and claim 20 depends on claim 19, and therefore, claims 2, 4-6, 9-12, 14, 15 and 20 also fail to comply with the Enablement requirement.
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claims 1, 2, 4-6, 9-15, 19 and 20 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
(1) Regarding claim 1, it is not clear what “A process charge” recited in the preamble refers to, because (a) Applicants do not specifically claim what “A process charge” refers to, (b) depending on what “A process charge” refers to, the claimed “process charge detection circuit” would be configured in different manners, (c) for example, an electron detection circuit, a hole detection circuit, an ion detection circuit, a subatomic particle detection circuit, etc., would be different from each other, and a static electricity detection circuit and a mobile process charge detection circuit would also be different from each other, and (d) Applicants do not specifically claim any parameter, characteristic or feature of the claimed “process charge” in claim 1.
(2) Also regarding claim 1, it is not clear what “A process charge detection circuit” recited in the preamble refers to, because (a) while Applicants claim “A process charge detection circuit” in the preamble, the claim body does not recite any circuit elements, (b) the only electrical connection between circuit element candidates that may or may not be related to “A process charge detection circuit” is the claimed electrical connection between the aggressor isolation well and the victim isolation well “via the gate oxide” recited on lines 5-6, which is not conducive to any electrical connection as discussed above under 35 USC 112(a) rejection since “the gate oxide” is an insulator, (c) therefore, what Applicants claim in the claim body is basically two antennas that are respectively and electrically connected to an isolation well, where the two isolation wells and thus the two antennas are not electrically connected since “the gate oxide” is an insulator, (d) furthermore, for one of ordinary skill in the art to manufacture “A process charge detection circuit”, there should be an input or intake of a process charge and an output of an electrical or optical signal associated with the process charge, which Applicants do not claim, either, and (e) therefore, claim 1 is rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being incomplete for omitting essential elements, such omission amounting to a gap between the elements, see MPEP § 2172.01, and the omitted elements are: a device element into which the claimed process charge is introduced, and another device element out of which an electrical or an optical signal is emitted.
(3) Further regarding claim 1, it is not clear how the “process charge detection circuit” is “disposed on or in a semiconductor wafer” as recited on lines 1-2, and then the process charge detection circuit can comprise “a victim isolation well” recited on line 3 and “an aggressor isolation well” recited on line 5, because (a) if arguendo “a victim isolation well” and “an aggressor isolation well” are parts of the claimed “semiconductor wafer”, the “process charge detection circuit” cannot be disposed on “a semiconductor wafer” since parts of the semiconductor wafer are also parts of the claimed “process charge detection circuit”, and (b) on the other hand, if arguendo “a victim isolation well” and “an aggressor isolation well” are not parts of the claimed “semiconductor wafer”, the “process charge detection circuit” cannot be disposed in “a semiconductor wafer” since parts of the semiconductor wafer are not also parts of the claimed “process charge detection circuit”, or the claimed “process charge detection circuit” is not ensconced inside a recess of “a semiconductor wafer”.
(4) Still further regarding claim 1, it is not clear what “a victim isolation well” recited on line 3 and “an aggressor isolation well” recited on line 5 each refers to, because (a) it is not clear whether “a victim isolation well” is an isolation well that isolates a victim, i.e. the victim isolation well is an entity separate from the victim, or “a victim isolation well” is an isolation well that is also a victim, i.e. the victim isolation well is the victim, and (b) likewise, it is not clear whether “an aggressor isolation well” is an isolation well that isolates an aggressor, i.e. the aggressor isolation well is an entity separate from the aggressor, or “an aggressor isolation well” is an isolation well that is also an aggressor, i.e. the aggressor isolation well is the aggressor.
(5) Still further regarding claim 1, if it is the former out of the two interpretations mentioned above, it is not clear what how “a victim isolation well” recited on line 3 isolates the victim from an unknown or unspecified victim, and how “an aggressor isolation well” recited on line 5 isolates the aggressor from an unknown or unspecified aggressor, and it is not clear what the unknown or unspecified victim and aggressor are, respectively.
(6) Still further regarding claim 1, if it is the latter out of the two interpretations mentioned above, it is not clear what how “a victim isolation well” recited on line 3 functions as the victim with regard to an unknown or unspecified source or aggression, and how “an aggressor isolation well” recited on line 5 functions as the aggressor with regard to an unknown or unspecified victim, especially when the victim isolation well and the aggressor isolation well are not exactly electrically connected as discussed above under 35 USC 112(a) rejection.
(7) Still further regarding claim 1, it is not clear how “an aggressor isolation well” is “electrically connected with the victim isolation well via the gate oxide” as recited on lines 5-6, because (a) it is not clear whether the term “gate oxide” recited on line 4 implies that there is a field effect transistor in the claimed “process charge detection circuit”, (b) if that is the case, it is not clear how the unclaimed and unspecified field effect transistor can function as a field effect transistor since its “gate oxide” is a conductor or semiconductor since otherwise “an aggressor isolation well” would not be “electrically connected with the victim isolation well via the gate oxide”, and (c) in addition, it is not clear whether “the gate oxide” may be a conductor along one direction, i.e. in a lateral direction between the aggressor isolation well and the victim isolation well, while it is an insulator along another direction, i.e. in a vertical direction between an unclaimed and unspecified channel layer an unclaimed and an unspecified gate electrode, and if that is the case, it is not clear what this “gate oxide”, which exhibits an asymmetric and selective electrical conductivity, is made of.
(8) Still further regarding claim 1, it is not clear what “a victim antenna” recited on line 7 and “an aggressor antenna” recited on line 9 each refers to, because (a) it is not clear whether “a victim antenna” is an antenna that is connected to a victim, or “a victim antenna” is an antenna that is also a victim, and (b) likewise, it is not clear whether “an aggressor antenna” is an antenna that is connected to an aggressor, or “an aggressor antenna” is an antenna that is also an aggressor.
(9) Still further regarding claim 1, if it is the former out of the two interpretations mentioned above, it is not clear what how “a victim antenna” recited on line 7 is connected to the victim, and how “an aggressor antenna” recited on line 9 is connected to the aggressor from, and it is not clear what the unknown or unspecified aggressor and victim are, respectively.
(10) Still further regarding claim 1, if it is the latter out of the two interpretations mentioned above, it is not clear what how “a victim antenna” recited on line 7 functions as the victim with regard to an unknown or unspecified source or aggression, and how “an aggressor antenna” recited on line 9 functions as the aggressor with regard to an unknown or unspecified victim, especially when the victim isolation well and the aggressor isolation well, and thus the victim antenna and the aggressor antenna, are not exactly electrically connected as discussed above under 35 USC 112(a) rejection.
(11) Still further regarding claim 1, it is not clear what the “RC” recited on lines 8 and 10 suggests, because (a) Applicants do not simply claim a victim and aggressor RC constant, but rather claim relative value of the victim and aggressor RC time constant on lines 10-11, (b) however, depending on how the victim isolation well and victim antenna are arranged, and how the aggressor isolation well and aggressor antenna are arranged, the claimed “R” or resistance would vary, but Applicants do not specifically claim how the victim isolation well and victim antenna are arranged, and how the aggressor isolation well and aggressor antenna are arranged, (c) in addition, even with a single configuration of the victim isolation well and victim antenna, and a single configuration of the aggressor isolation well and aggressor antenna, the claimed “R” would vary depending on how the “R” is measured, (d) for example, an “R” value measured in a vertical direction of the victim isolation well and victim antenna would be different from an “R” value measured in a lateral direction, and an “R” value measured in a vertical direction of the aggressor isolation well and aggressor antenna would be different from an “R” value measured in a lateral direction, (e) furthermore, it is not clear how “C” or capacitance can be unambiguously defined since for measurement or calculation of “C”, there should be a capacitor comprising two electrodes sandwiching an insulator, but each pair of the victim isolation well and victim antenna, and the aggressor isolation well and aggressor antenna does not comprise any insulator, and (f) therefore, there is no “C” associated with the pair of the victim isolation well and victim antenna, and the pair of the aggressor isolation well and aggressor antenna.
Claims 2, 4-6 and 9-12 depend on claim 1, and therefore, claims 2, 4-6 and 9-12 are also indefinite.
(12) Regarding claims 13 and 19, as discussed above with regard to the indefiniteness of claim 1, it is not clear what “A process charge” recited in the preamble refers to, because (a) Applicants do not specifically claim what “A process charge” refers to, (b) depending on what “A process charge” refers to, the claimed “process charge detection circuit” would be configured in different manners, (c) for example, an electron detection circuit, a hole detection circuit, an ion detection circuit, a subatomic particle detection circuit, etc., would be different from each other, and a static electricity detection circuit and a mobile process charge detection circuit would also be different from each other, and (d) however, Applicants do not specifically claim any parameter, characteristic or feature of the claimed “process charge” in claims 13 and 19.
(13) Also regarding claims 13 and 19, as discussed above with regard to the indefiniteness of claim 1, it is not clear what “A process charge detection circuit” recited in the preamble refers to, because (a) while Applicants claim “A process charge detection circuit” in the preamble, the claim body does not recite any specific circuit elements that function combinatorially as a process charge detection circuit, (b) the only electrical connection between circuit element candidates that may or may not be related to “A process charge detection circuit” is the claimed electrical connection between the first isolation well and the second isolation well “via the gate oxide” as recited on lines 7-8 of claim 13 and on lines 6-7 of claim 19, which is not conducive to any electrical connection as discussed above under 35 USC 112(a) rejection since “the gate oxide” is an insulator, (c) therefore, what Applicants claim in the claim body is basically two antennas that are respectively electrically connected to an isolation well, where the two isolation wells and thus the two antennas are not electrically connected since “the gate oxide” is an insulator, (d) furthermore, for one of ordinary skill in the art to manufacture “A process charge detection circuit”, there should be an input or intake of a process charge and an output of an electrical or optical signal associated with the process charge, which Applicants do not claim, either, and (e) therefore, claims 13 and 19 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being incomplete for omitting essential elements, such omission amounting to a gap between the elements, see MPEP § 2172.01, and the omitted elements are: a device element into which the claimed process charge is introduced, and another device element out of which an electrical or an optical signal is emitted.
(14) Further regarding claims 13 and 19, it is not clear whether there should be “a first isolation well” recited before Applicants claim “a second isolation well” on line 4 of claim 13 and on line 3 of claim 19, or “a first isolation well” recited on line 7 of claim 13 and on line 6 of claim 19 is the first isolation well that accompanies “a second isolation well”, because when Applicants claim “a second isolation well” before claiming “a first isolation well”, it is not clear whether the later claimed “first isolation well” is associated with “a second isolation well” or a typo of a third isolation well.
(15) Regarding claim 13, it is not clear whether “an integrated circuit (IC)” recited on line 2 is fabricated on “A process charge detection circuit” recited on line 1, or “a semiconductor wafer” recited on lines 1-2, and it is not clear whether “an integrated circuit (IC)” recited on line 2 is associated with or includes “a field-effect transistor (FET)” recited on line 5, because (a) it is not clear whether the claim body is related to the claimed “integrated circuit (IC)” or “an integrated circuit (IC)” is merely an additional circuit without any specifically claimed circuit elements disposed on top of the claimed “process charge detection circuit”, depending on which interpretation one of ordinary skill in the art should adopt, the claimed device structure would be distinct from each other, (b) also, even if arguendo Applicants had intended to claim that the claimed “integrated circuit (IC)” is the same with or a part of “A process charge detection circuit”, and thus includes “a field-effect transistor (FET)” recited on line 5, the limitation recited on lines 5-6 may be contradictory to the preamble since, while Applicants claim that the IC may have been fabricated on the semiconductor wafer, the limitation recited on lines 5-6 suggests that the FET can include the gate oxide in the second isolation well, which may or may not be a part of the claimed semiconductor wafer, and (c) in other words, the claimed IC cannot be fabricated on the semiconductor wafer, while its parts also being formed in the semiconductor wafer.
(16) Regarding claim 19, it is not clear how the “process charge detection circuit” is “disposed on or in a semiconductor wafer” as recited on lines 1-2, and then the process charge detection circuit can comprise “a second isolation well” recited on line 3 and “a first isolation well” recited on line 6, because (a) if arguendo “a first isolation well” and “a second isolation well” are parts of the claimed “semiconductor wafer”, the “process charge detection circuit” cannot be disposed on “a semiconductor wafer” since parts of the semiconductor wafer are also parts of the claimed “process charge detection circuit”, and (b) on the other hand, if arguendo “a first isolation well” and “a second isolation well” are not parts of the claimed “semiconductor wafer”, the “process charge detection circuit” cannot be disposed in “a semiconductor wafer” since parts of the semiconductor wafer are not also parts of the claimed “process charge detection circuit”, or the claimed “process charge detection circuit” is not ensconced inside a recess of “a semiconductor wafer”.
(17) Still further regarding claims 13 and 19, it is not clear what the limitation “a field-effect transistor (FET) including a gate oxide disposed on or in the second isolation well” recited on lines 5-6 of claim 13, and the limitation “a voltmeter comprising a field-effect transistor (FET) including a gate oxide disposed on or in the second isolation well” recited on lines 4-5 of claim 19 suggest, because (a) it is not clear whether the claimed FET is first completed, and then the claimed but unspecified “process charge detection” is performed since (i) as discussed above under 35 USC 112(b) rejections, Applicants do not specifically claim what the claimed “process charge” recited in the preamble refers to, and (ii) therefore, if the FET is included in the process charge detection circuit, any process charges generated before the FET is completed may not be detected, (b) if the entirety of the FET is completed after the unspecified “process charge” is generated, claims 13 and 19 may fail to comply with the written description requirement since the entirety of the FET may not be linked to the claimed detection of the process charge, and (c) in addition, it is not clear what the claimed FET is constituted of since it is not clear whether the claimed FET comprises only a channel layer, a source region, a drain region, the gate oxide and a gate electrode, or the claimed FET should comprise other elements in addition to a channel layer, a source region, a drain region, the gate oxide and a gate electrode since for one of ordinary skill in the art to employ the claimed FET for a process charge detection, it appears that there should be some elements other than the channel layer, source region, drain region, gate oxide and gate electrode that may attract the process charge.
(18) Still further regarding claims 13 and 19, it is not clear whether the limitation “a field-effect transistor (FET) including a gate oxide disposed on or in the second isolation well” recited on lines 5-6 of claim 13, and the limitation “a voltmeter comprising a field-effect transistor (FET) including a gate oxide disposed on or in the second isolation well” recited on lines 4-5 of claim 19 suggest that the second isolation well functions a channel region or channel layer, because (a) a gate electrode and a gate oxide have been commonly positioned directly above a channel region or channel layer, (b) if so, it is not clear how an “isolation well” can function as a channel region or channel layer, and (c) if arguendo the second isolation well does not function as a channel region or channel layer, it is not clear where a channel region or channel layer is located for the claimed FET.
(19) Still further regarding claims 13 and 19, it is not clear whether there should be “a first RC time constant” recited before Applicants claim “a second RC time constant” on line 10 of claim 13 and on line 9 of claim 19, or “a first RC time constant” recited on line 12 of claim 13 and on line 11 of claim 19 is the first RCE time constant that accompanies “a second RC time constant”, because when Applicants claim “a second RC time constant” before claiming “a first RC time constant”, it is not clear whether the later claimed “first RC time constant” is associated with “a second RC time constant” or a typo of a third RC time constant.
(20) Further regarding claim 13, it is not clear what the “RC” recited on lines 10 and 12 suggests, because (a) Applicants do not simply claim a first and second RC constant, but rather claim relative values of the first and second RC time constant on lines 13-15, (b) however, depending on how the first isolation well and first antenna are arranged, and how the second isolation well and second antenna are arranged, the claimed “R” or resistance would vary, but Applicants do not specifically claim how the first isolation well and first antenna are arranged, and how the second isolation well and second antenna are arranged, (c) in addition, even with a single configuration of the first isolation well and first antenna, and a single configuration of the second isolation well and second antenna, the claimed “R” would vary depending on how the “R” is measured, (d) for example, an “R” value measured in a vertical direction of the first isolation well and first antenna would be different from an “R” value measured in a lateral direction, and an “R” value measured in a vertical direction of the second isolation well and second antenna would be different from an “R” value measured in a lateral direction, (e) furthermore, it is not clear how “C” or capacitance can be unambiguously defined since for measurement or calculation of “C”, there should be a capacitor comprising two electrodes sandwiching an insulator, but each pair of the first isolation well and first antenna, and the second isolation well and second antenna does not comprise any insulator, and (f) therefore, there is no “C” associated with the pair of the first isolation well and first antenna, and the pair of the second isolation well and second antenna.
(21) Also regarding claim 19, it is not clear what the limitation “a voltmeter comprising a field effect transistor (FET)” recited on line 4 suggests, because (a) it is not clear how an FET can be a part of the claimed voltmeter, (b) it appears that Applicants may have intended to claim that “a voltmeter comprising a field effect transistor (FET)” is “A process charge detection circuit” recited in the preamble since Applicants further claim that “the voltmeter is configured to detect process charge by measuring an electrical parameter of the gate oxide” on lines 12-13, and (c) however, if the voltmeter is the claimed process charge detection circuit, then it is not clear what the other elements recited in the claim body except for the voltmeter and FET would do since these other elements may not have anything to do with the claimed “process charge detection circuit”.
(22) Further regarding claim 19, it is not clear what the “RC” recited on lines 9 and 11 suggests, because it is not clear how “C” or capacitance can be unambiguously defined since for measurement or calculation of “C”, there should be a capacitor comprising two electrodes sandwiching an insulator, but each pair of the first isolation well and first antenna, and the second isolation well and second antenna does not comprise any insulator.
(23) Still further regarding claim 19, it is not clear what the limitation “the voltmeter is configured to detect process charge by measuring an electrical parameter of the gate oxide” recited on lines 12-13 suggests, because (a) it is not clear why the claimed “electrical parameter of the gate oxide” has anything to do with the measurement of the process charge since, as discussed above under 35 USC 112(a) and 112(b) rejections, “the gate oxide” is an insulator, and therefore, there is no “electrical parameter of the gate oxide” in the first place, (b) it is not clear whether the claimed but unspecified “process charge” is generated somehow and somewhere, and then the claimed but unspecified “process charge” flows somehow into “the gate oxide”, which does not appear to make sense in that (i) it is not clear why the “process charge” flows somehow into “the gate oxide”, and then remains trapped inside “the gate oxide” when Applicants claim that the first and second isolation well are electrically connected “via the gate oxide” on lines 6-7, which suggests that an electrical charge should flow freely through “the gate oxide”, and (ii) in other words, Applicants claim that “the gate oxide” that is electrically connected to both the first and second isolation well traps the “process charge”, which rather signifies that “the gate oxide” is an insulator that traps the “process charge”.
Claims 14 and 15 depend on claim 13, and claim 20 depends on claim 19, and therefore, claims 14, 15 and 20 are also indefinite.
(24) Regarding claim 6, it is not clear what the “metal area of the aggressor antenna” recited on line 2, “area of the aggressor isolation well” recited on line 3, “area of the victim isolation well” recited on line 4, and “metal area of the victim antenna” recited on lines 4-5 each refers to, because (a) unless the claimed elements are isotropic, there are numerous areas for the claimed elements, and (b) Applicants do not simply claimed the areas of the claimed elements, but claim relative areas, which cannot be unambiguously determined without Applicants’ specifically claiming how the claimed areas of the claimed elements are defined.
(25) Regarding claims 10 and 12, it is not clear in which direction “a voltage across the gate oxide” is measured, because depending on how the voltage is measured, the claimed voltmeter would be configured in different manners. Claim 11 depends on claim 10, and therefore, claim 11 is also indefinite.
(26) Regarding claims 15 and 20, it is not clear what the “metal area of the first antenna” recited on line 2 of claim 15 and on lines 3 and 8 of claim 20, “area of the first isolation well” recited on lines 2-3 of claim 15 and on lines 4 and 7 of claim 20, “area of the second isolation well” recited on line 4 of claim 15 and on lines 4-5 and 9-10 of claim 20, and “metal area of the second antenna” recited on lines 4-5 of claim 15 and lines 5-6 and 8-9 of claim 20 each refers to, because (a) unless the claimed elements are isotropic, there are numerous areas for the claimed elements, and (b) Applicants do not simply claimed the areas of the claimed elements, but claim relative areas, which cannot be unambiguously determined without Applicants’ specifically claiming how the claimed areas of the claimed elements are defined.
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure.
Chapman et al. (US 8,212,332)
Senapati et al. (US 9,966,459)
Weng et al. (US 8,193,824)
Cheung et al. (US 6,365,426)
Alavi et al. (US 5,844,300)
Any inquiry concerning this communication or earlier communications from the examiner should be directed to JAY C KIM whose telephone number is (571) 270-1620. The examiner can normally be reached 8:00 AM - 6:00 PM EST.
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Joshua Benitez can be reached at (571) 270-1435. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/JAY C KIM/Primary Examiner, Art Unit 2815
/J. K./Primary Examiner, Art Unit 2815 October 13, 2026
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