DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Specification
The disclosure is objected to because of the following informalities:
¶0023 of the PGPUB [0025 as filed] refers to the substrate as both element # 210 and element # 202.
Appropriate correction is required.
Claim Objections
Claim 18 is objected to because of the following informalities: it recites “forming a firth conductive structure”. Appropriate correction is required.
Claim Rejections - 35 USC § 112
The following is a quotation of the first paragraph of 35 U.S.C. 112(a):
(a) IN GENERAL.—The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor or joint inventor of carrying out the invention.
The following is a quotation of the first paragraph of pre-AIA 35 U.S.C. 112:
The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor of carrying out his invention.
Claims 7-8 and 17-20 are rejected under 35 U.S.C. 112(a) or 35 U.S.C. 112 (pre-AIA ), first paragraph, as failing to comply with the written description requirement. The claim(s) contains subject matter which was not described in the specification in such a way as to reasonably convey to one skilled in the relevant art that the inventor or a joint inventor, or for applications subject to pre-AIA 35 U.S.C. 112, the inventor(s), at the time the application was filed, had possession of the claimed invention.
Regarding Claim 7, it recites “the second conductive structure comprises a curved sidewall, in direct contact with a first curved sidewall of the plurality of curved sidewalls of the first conductive structure, and a straight sidewall”.
There is no support for this claim, as the figures and specification show/describe wherein a dielectric feature (216) is between the curved sidewall of the first conductive structure and second conductive structure, preventing direct contact.
For at least this reason, claim 8 is also rejected based on its dependence from claim 7.
Regarding Claim 17, it recites “wherein the second conductive structure is between the first conductive structure and the third conductive structure”.
Claim 16 (from which 17 depends) requires the first conductive structure to be one of the (214) features on the tunneling layer (212), the second conductive structure is required to be (222) on the source/drain (208), and the third conductive structure is required to be (228) over the second conductive structure (222).
There is no support for “wherein the second conductive structure (222) is between the first conductive structure (214) and the third conductive structure (228).
For at least this reason, claims 18-20 are also rejected based on their dependency from claim 17.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
Claims 1-3 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Karthick Murukesan et al. (US 20190131296 A1; hereinafter Murukesan).
Regarding Claim 1, Murukesan discloses a method (Fig. 1A, Fig. 4A), comprising:
forming a first conductive structure (122; ¶0031), comprising a plurality of curved sidewalls (as shown in view of Fig. 1A, wherein 122 has curved sidewalls on at least the left/right sides of the device), over a substrate (402; ¶0051);
forming a dielectric structure over a top surface, and the plurality of curved sidewalls, of the first conductive structure (122) (as described in ¶0139 in relation to forming feature 446, wherein an interlayer dielectric {ILD, not shown in the figures} is deposited over what is shown in Fig. 17 {including 122}, and then patterned to define openings for 446); and
forming a second conductive structure (furthest right 446; ¶0138) over the substrate (402).
Regarding Claim 2, Murukesan discloses the method of claim 1, wherein a bottom surface of the second conductive structure (446) is coplanar with a top surface of the substrate (402) (as shown in Fig. 4A).
Regarding Claim 3, Murukesan discloses the method of claim 2, wherein the bottom surface of the second conductive structure (446) resides on an isolation structure (136; ¶0036) (wherein “on” is interpreted with the definition provided in the instant specification at [0011]).
Claims 10, and 13-15 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Kuan-Wei Su et al. (US 20200006152 A1; hereinafter Su).
Regarding Claim 10, Su discloses a method (Fig. 2A, Fig. 2L), comprising:
forming a first conductive structure (124A; ¶0019) over a substrate (110; ¶0016);
forming a dielectric structure (150; ¶0027) over the first conductive structure (124A) and on the substrate (110); and
forming a second conductive structure (220E; ¶0042) over a source/drain (146 in region 108; ¶0025) that is at least partially over or within the substrate (110), wherein first conductive structure (124A) is a distance away from the second conductive structure (146 in region 108).
Regarding Claim 13, Su discloses the method of claim 10, further comprising: forming a doped portion (in view of Fig. 2A; 118; ¶0018), in the substrate (110), between the first conductive structure (124A) and the second conductive structure (220E).
Regarding Claim 14, Su discloses the method of claim 13, further comprising: forming a lightly doped drain (LDD) portion (146 is a LDD; ¶0125; in region 106), in the substrate (110) and over the doped portion (118) (146 in region 106 is over 118), between the first conductive structure (124A) and the second conductive structure (220E) (Fig. 2L).
Regarding Claim 15, Su discloses the method of claim 14, wherein the LDD portion (146 in region 106) resides above the doped portion (118) in the substrate (110) (Fig. 2L).
Claims 1, and 6-8 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Chang-Ming Wu et al. (US 20160336415 A1; hereinafter Wu).
Regarding Claim 1, Wu discloses a method (Fig. 1A, entire disclosure), comprising:
forming a first conductive structure (130; ¶0074-¶0075), comprising a plurality of curved sidewalls (left/right sidewalls are curved), over a substrate (108; ¶0016);
forming a dielectric structure (142+134A+134B; ¶0079+¶0020) over a top surface, and the plurality of curved sidewalls, of the first conductive structure (130) (as shown in Fig. 1A); and
forming a second conductive structure (114B; ¶0017) over the substrate (108).
Regarding Claim 6, Wu discloses the method of claim 1, wherein the dielectric structure (142+134A+134B) comprises a plurality of curved sidewalls in direct contact with the plurality of curved sidewalls of the first conductive structure (130) (as shown in Fig. 1A).
Regarding Claim 7, Wu discloses the method of claim 6, wherein the second conductive structure (114B) comprises a curved sidewall (left sidewall of 114B), in direct contact with a first curved sidewall of the plurality of curved sidewalls of the first conductive structure (130) (as shown in Fig. 1A, commensurate in scope with the interpretation of “direct contact” provided in the instant application, wherein an intermediate dielectric feature may exist), and a straight sidewall (right side of 114B).
Regarding Claim 8, Wu discloses the method of claim 7, further comprising:
a spacer (140B which spaces apart adjacent features) in direct contact with at least one of:
a second curved sidewall of the plurality of curved sidewalls of the first conductive structure, or
the straight sidewall (right sidewall of 114B) of the second conductive structure.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1-2, 4-6, and 9-13 are rejected under 35 U.S.C. 103 as being unpatentable over Chang-Ming Wu et al. (US 20160336415 A1; hereinafter Wu).
Regarding Claim 1, Wu discloses a method (Fig. 1A, entire disclosure), comprising:
forming a first conductive structure (130; ¶0074-¶0075), comprising a plurality of curved sidewalls (left/right sidewalls are curved), over a substrate (108; ¶0016);
forming a dielectric structure (142+134A; ¶0079+¶0020) over a top surface, and the plurality of curved sidewalls, of the first conductive structure (130) (as shown in Fig. 1A); and
forming a second conductive structure (146; ¶0022) over the substrate (108).
Wu does not explicitly disclose that the second conductive structure (contact 146) is a “conductive” contact. However, it would have been obvious to one of ordinary skill in the art, before the effective filing date of the claimed invention, that the contact 146 of Wu would be made to be conductive in order to provide electrical connection to the underlying transistor feature (106A) for a functioning device.
Regarding Claim 2, Wu discloses the method of claim 1, wherein a bottom surface of the second conductive structure (146) is coplanar with a top surface of the substrate (108) (as shown in Fig. 1A).
Regarding Claim 4, Wu discloses the method of claim 1, wherein the second conductive structure (146) is in contact with a source/drain (106A; ¶0016).
Regarding Claim 5, Wu discloses the method of claim 4, wherein the source/drain (106A) resides at least partially within the substrate (108) (Fig. 1A).
Regarding Claim 6, Wu discloses the method of claim 1, wherein the dielectric structure (142+134A) comprises a plurality of curved sidewalls in direct contact with the plurality of curved sidewalls of the first conductive structure (130) (as shown in Fig. 1A).
Regarding Claim 9, Wu discloses the method of claim 1, wherein the first conductive structure (130) is associated with a first terminal (gate) and the second conductive structure (146) is associated with a second terminal (source/drain).
Regarding Claim 10, Wu discloses a method (Fig. 1A, entire disclosure), comprising:
forming a first conductive structure (114B; ¶0017) over a substrate (108; ¶0016);
forming a dielectric structure (122B+126B+134B; ¶0018+¶0019+¶0020) over the first conductive structure (114B) and on the substrate (108); and
forming a second conductive structure (146; ¶0022) over a source/drain (106A; ¶0016) that is at least partially over or within the substrate (108), wherein first conductive structure (122B+126B+134B) is a distance away from the second conductive structure (146) (as shown in Fig. 1A).
Wu does not explicitly disclose that the second conductive structure (contact 146) is a “conductive” contact. However, it would have been obvious to one of ordinary skill in the art, before the effective filing date of the claimed invention, that the contact 146 of Wu would be made to be conductive in order to provide electrical connection to the underlying transistor feature (106A) for a functioning device.
Regarding Claim 11, Wu discloses the method of claim 10, further comprising:
forming at least one of:
a third conductive structure (120B; ¶0018) over the first conductive structure (114B), or
a fourth conductive structure over the second conductive structure.
Regarding Claim 12, Wu discloses the method of claim 11, wherein at least one of:
the third conductive structure (120B) is configured to couple the first conductive structure (114B) to a first voltage source (capacitively coupled; ¶0025-¶0026), or
the fourth conductive structure is configured to couple the second conductive structure to a second voltage source.
Regarding Claim 13, Wu discloses the method of claim 10, further comprising: forming a doped portion (104 in view of Fig. 18 that is p-type or n-type doped; ¶0071), in the substrate (108), between the first conductive structure (114B) and the second conductive structure (146) (104 is located at a position between 114B and 146).
Claims 16-20 are rejected under 35 U.S.C. 103 as being unpatentable over Wu in view of Kuan-Wei Su et al. (US 20200006152 A1; hereinafter Su).
Regarding Claim 16, Wu discloses a method (Fig. 1A; entire disclosure), comprising:
forming a first conductive structure (114B; ¶0017) on a first tunneling layer (116B; ¶0030; which is a dielectric commensurate in scope with the instant specification) that is on a substrate (108; ¶0029);
forming a second conductive structure (130; ¶0020) on a source/drain (104; ¶0073) that is at least partially within the substrate (108), wherein the first conductive structure (114B) is a distance away from the second conductive structure (130).
Wu does not expressly disclose forming a third conductive structure, over the second conductive structure (130), configured to receive a first voltage. Although some of the interconnection contacts and features are not shown in Wu (¶0031), these are common in the art.
In the same field of endeavor, Su teaches a similar device (Fig. 2A-Fig. 2L) comprising forming multiple transistors (in device regions 102, 104, 106, 108; ¶0015), wherein multiple device level features (source/drain features 146; ¶0026; gate structures 124A-124E; ¶0021, etc.) have device contacts (conductive features 220A, 220B, 220C, 220D, 220E; ¶0042) with conductive lines (230A, 230B, 230C; ¶0042) formed thereover to form interconnect structures.
It would have been obvious to one of ordinary skill in the art, before the effective filing date of the claimed invention, to form a third conductive structure (such as contacts 220 of Su), over the second conductive structure (Wu; gate 130), configured to receive a first voltage in order to form interconnect structures to electrically and/or physically couple the device features (source/drain, gates) to conductive lines to form functioning devices (Su; ¶0042).
Regarding Claim 17, modified Wu teaches the method of claim 16, further comprising:
forming a fourth conductive structure (114A; ¶0030) on a second tunneling layer (116A; ¶0030) that is on the substrate (108),
wherein the second conductive structure (130) is between the first conductive structure (114B) and the third conductive structure (modified contact of Su) (using the broadest interpretation, 130 exists at a position that is located at a level between 114B and the modified gate contact of Su).
Regarding Claim 18, modified Wu teaches the method of claim 17, further comprising:
forming a firth conductive structure (120A; ¶0031), over the fourth conductive structure (114A), configured to receive a second voltage (it is conductive and therefore configured to receive a voltage).
Regarding Claim 19, modified Wu teaches the method of claim 17, further comprising:
forming a fifth conductive structure (136A; ¶0033) over the substrate (108) and adjacent to the fourth conductive structure (114A).
Regarding Claim 20, modified Wu teaches the method of claim 19, further comprising:
forming a sixth conductive structure (not shown, described as electrically coupling BEOL stack; ¶0033), over the fifth conductive structure (136A), configured to receive a second voltage (they are conductive and therefore configured to receive a voltage).
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. Weize Chen et al. (US 20220254920 A1) discloses in Fig. 13 various semiconductor devices with conductive structures comprising curved and straight sidewalls. Akira Yoshino (US 20050180207 A1) discloses in Fig. 14 various adjacent conductive structures with complementary curved sidewalls.
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NATHAN PRIDEMORE
Examiner
Art Unit 2898
/NATHAN PRIDEMORE/Examiner, Art Unit 2898 /JULIO J MALDONADO/Supervisory Patent Examiner, Art Unit 2898
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