Prosecution Insights
Last updated: October 22, 2026
Application No. 18/788,741

Radical Treatment in Supercritical Fluid for Gate Dielectric Quality Improvement to CFET Structure

Non-Final OA §112§DOUBLEPATENT
Filed
Jul 30, 2024
Priority
Nov 21, 2023 — continuation of 18/515,921 +1 more
Examiner
LI, MEIYA
Art Unit
Tech Center
Assignee
Taiwan Semiconductor Manufacturing Company, Ltd.
OA Round
1 (Non-Final)
69%
Grant Probability
Favorable
1-2
OA Rounds
1y 4m
Est. Remaining
95%
With Interview

Examiner Intelligence

Grants 69% — above average
69%
Career Allowance Rate
655 granted / 948 resolved
+9.1% vs TC avg
Strong +26% interview lift
Without
With
+26.0%
Interview Lift
resolved cases with interview
Typical timeline
3y 7m
Avg Prosecution
29 currently pending
Career history
995
Total Applications
across all art units

Statute-Specific Performance

§101
0.5%
-39.5% vs TC avg
§103
39.4%
-0.6% vs TC avg
§102
14.6%
-25.4% vs TC avg
§112
43.4%
+3.4% vs TC avg
Black line = Tech Center average estimate • Based on career data from 948 resolved cases

Office Action

§112 §DOUBLEPATENT
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Election/Restrictions Applicant’s election without traverse of species III, claims 1-20, in the reply filed on August 13, 2026 is acknowledged. Information Disclosure Statement The information disclosure statements (IDS) submitted on July 30, 2024 and March 3, 2026 are in compliance with the provisions of 37 CFR 1.97. Accordingly, the information disclosure statements are being considered by the examiner. Drawings The drawings were received on August 13, 2026. These drawings are acceptable. Claim Objections Claims 19 and 20 are objected to because of the following informalities: “the” should be removed before “each” (claim 19, line 13). Appropriate correction is required. Claim Rejections - 35 USC § 112 The following is a quotation of 35 U.S.C. 112(b): (b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention. The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph: The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention. Claims 11-20 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention. The claimed limitation of “a semiconductor stacked of a first semiconductor layers and second semiconductor layers alternatively stacked on a top substrate”, as recited in claims 11 and 18, is unclear as to whether first semiconductor layers and second semiconductor layers are in repeated alternating sequence or in some other arrangement applicant refers. The claimed limitation of “a first dielectric layer that is wrapping around the top channels in the top channels”, as recited in claim 12, is unclear as to which element(s) in the top channels applicant refers. Double Patenting The nonstatutory double patenting rejection is based on a judicially created doctrine grounded in public policy (a policy reflected in the statute) so as to prevent the unjustified or improper timewise extension of the “right to exclude” granted by a patent and to prevent possible harassment by multiple assignees. A nonstatutory double patenting rejection is appropriate where the conflicting claims are not identical, but at least one examined application claim is not patentably distinct from the reference claim(s) because the examined application claim is either anticipated by, or would have been obvious over, the reference claim(s). See, e.g., In re Berg, 140 F.3d 1428, 46 USPQ2d 1226 (Fed. Cir. 1998); In re Goodman, 11 F.3d 1046, 29 USPQ2d 2010 (Fed. Cir. 1993); In re Longi, 759 F.2d 887, 225 USPQ 645 (Fed. Cir. 1985); In re Van Ornum, 686 F.2d 937, 214 USPQ 761 (CCPA 1982); In re Vogel, 422 F.2d 438, 164 USPQ 619 (CCPA 1970); In re Thorington, 418 F.2d 528, 163 USPQ 644 (CCPA 1969). A timely filed terminal disclaimer in compliance with 37 CFR 1.321(c) or 1.321(d) may be used to overcome an actual or provisional rejection based on nonstatutory double patenting provided the reference application or patent either is shown to be commonly owned with the examined application, or claims an invention made as a result of activities undertaken within the scope of a joint research agreement. See MPEP § 717.02 for applications subject to examination under the first inventor to file provisions of the AIA as explained in MPEP § 2159. See MPEP § 2146 et seq. for applications not subject to examination under the first inventor to file provisions of the AIA . A terminal disclaimer must be signed in compliance with 37 CFR 1.321(b). The filing of a terminal disclaimer by itself is not a complete reply to a nonstatutory double patenting (NSDP) rejection. A complete reply requires that the terminal disclaimer be accompanied by a reply requesting reconsideration of the prior Office action. Even where the NSDP rejection is provisional the reply must be complete. See MPEP § 804, subsection I.B.1. For a reply to a non-final Office action, see 37 CFR 1.111(a). For a reply to final Office action, see 37 CFR 1.113(c). A request for reconsideration while not provided for in 37 CFR 1.113(c) may be filed after final for consideration. See MPEP §§ 706.07(e) and 714.13. The USPTO Internet website contains terminal disclaimer forms which may be used. Please visit www.uspto.gov/patent/patents-forms. The actual filing date of the application in which the form is filed determines what form (e.g., PTO/SB/25, PTO/SB/26, PTO/AIA /25, or PTO/AIA /26) should be used. A web-based eTerminal Disclaimer may be filled out completely online using web-screens. An eTerminal Disclaimer that meets all requirements is auto-processed and approved immediately upon submission. For more information about eTerminal Disclaimers, refer to www.uspto.gov/patents/apply/applying-online/eterminal-disclaimer. Claims 1 and 5-11, as best understood, are rejected on the ground of nonstatutory double patenting as being unpatentable over claims 1-8 of U.S. Patent No. 12,218,225. Although the claims at issue are not identical, they are not patentably distinct from each other because: Claims 1-8 of U.S. Patent No. 12,218,225 shows: As for claim 1, a method, comprising: providing a semiconductor structure having top channels; forming a first dielectric layer to wrap around each of the top channels; applying a first supercritical carbon dioxide fluid to the first dielectric layer; forming a second dielectric layer on the first dielectric layer and wrapping around the top channels; applying a second supercritical carbon dioxide fluid to the second dielectric layer; and forming a gate electrode on the second dielectric layer (claim 1). As for claim 5, the applying of the first supercritical carbon dioxide fluid to the first dielectric layer further includes: dissolving a first radical source gas in the first supercritical carbon dioxide fluid; and thereafter, applying the first supercritical carbon dioxide fluid dissolved with a first radical chemical to the first dielectric layer at a temperature less than 100 °C (claim 2). As for claim 6, the applying of the second supercritical carbon dioxide fluid to the second dielectric layer further includes: dissolving a second radical source gas in the second supercritical carbon dioxide fluid; and thereafter, applying the second supercritical carbon dioxide fluid dissolved with a second radical chemical to the second dielectric layer (claim 3). As for claim 7, the second radical chemical is different from the first radical chemical (claim 4). As for claim 8, the first radical chemical includes a hydrogen radical (H*); and the second radical chemical includes an oxygen radical (O*) (claim 5). As for claim 9, the first radical chemical further includes a deuterium radical (D*); and the second radical chemical further includes a fluorine radical (F*) (claim 6). As for claim 10, the providing of the semiconductor structure having the top channels further includes: forming bottom channels vertically stacked on a bottom substrate; forming a bottom source and a bottom drain on the bottom substrate, the bottom source and the bottom drain being interposed by the bottom channels; forming a bottom gate dielectric layer wrapping around each of the bottom channels; and performing a thermal annealing process to the bottom gate dielectric layer at a temperature greater than 900 °C (claim 7). As for claim 11, the providing of the semiconductor structure having the top channels further includes: forming a semiconductor stack of first semiconductor layers and second semiconductor layers alternatively stacked on a top substrate; bonding the semiconductor stack formed on the top substrate to the bottom substrate; and thinning down the top substrate such that the semiconductor stack is exposed (claim 8). Claims 2-4 and 12-20, as best understood, are rejected on the ground of nonstatutory double patenting as being unpatentable over claims 1-6, 10-13 and 16-19 of U.S. Patent No. 12,218,225 (hereinafter Pat’225) in view of Huang et al. (2023/0420460). As for claims 2 and 4, Pat’225 disclosed substantially the entire claimed invention, as applied to claim 1 above, including the second dielectric layer includes a high-k dielectric material (claim 1), except the first dielectric layer is different from the second dielectric layer in composition, and wherein the first dielectric layer includes silicon oxide. As for claim 12, claim 10 of Pat’225 shows a method, comprising: providing a semiconductor structure having top channels; forming a first dielectric layer that is wrapping around the top channels in the top channels; performing a first radical treatment to the first dielectric layer in a first supercritical carbon dioxide fluid having a first radical chemical dissolved therein; forming a second dielectric layer over the first dielectric layer and wrapping around the top channels; and performing a second radical treatment to the second dielectric layer in a second supercritical carbon dioxide fluid having a second radical chemical dissolved therein, the second radical chemical being different from the first radical chemical. Claim 10 of Pat’225 does not disclose the second dielectric layer having a dielectric constant greater than that of the first dielectric layer. As for claim 18, claim 16 of Pat’225 shows a method, comprising: forming bottom channels vertically stacked on a bottom substrate; forming a bottom source and a bottom drain on the bottom substrate, the bottom source and the bottom drain being interposed by the bottom channels; forming a bottom interfacial layer wrapping around each of the bottom channels; performing a thermal annealing process to the bottom interfacial layer at a first temperature greater than 900 °C; forming a semiconductor stack of first semiconductor layers and second semiconductor layers alternatively stacked on a top substrate; bonding the semiconductor stack formed on the top substrate to the bottom substrate; thinning down the top substrate such that the semiconductor stack is exposed; patterning the semiconductor stack to form an active region; forming a top source and a top drain in the active region; forming a top gate dielectric layer wrapping around the top channels; and performing a radical treatment to the top gate dielectric layer in a supercritical carbon dioxide fluid at a second temperature less than 200 °C. Claim 16 of Pat’225 does not disclose removing the first semiconductor layers, resulting in the second semiconductor layers as top channels each connecting the top source and the top drain. Huang et al. teach in Figs. 1C, 2, 3A, 3B, 3C1, 3C2, 3D, 3E1-3G1, 3E2-3G2 and related text: As for claims 2 and 4, the first dielectric layer is different from the second dielectric layer in composition, and the first dielectric layer includes silicon oxide ([0070]). As for claim 12, the second dielectric layer having a dielectric constant greater than that of the first dielectric layer ([0070]). As for claim 18, removing the first semiconductor layers, resulting in the second semiconductor layers as top channels each connecting the top source and the top drain (Fig. 2). Pat’225 and Huang et al. are analogous art because they are directed to a method of forming a gate dielectric structure and one of ordinary skill in the art would have had a reasonable expectation of success to modify Pat’225 with the specified feature(s) of Huang et al. because they are from the same field of endeavor. It would have been obvious to one of ordinary skill in the art, before the effective filing date of the claimed invention to include the first dielectric layer being different from the second dielectric layer in composition, and the first dielectric layer including silicon oxide; the second dielectric layer having a dielectric constant greater than that of the first dielectric layer; and to remove the first semiconductor layers resulting in the second semiconductor layers as top channels each connecting the top source and the top drain, as taught by Huang et al., in Pat’224's device, in order to reduce cost, reduce parasitic capacitances and thus increase the device performance and reduce the power consumption of the device. Furthermore, it has been held to be within the general skill of a worker in the art to select a known material on the basis of its suitability for the intended use as a matter of obvious design choice. In re Leshin, 277 F.2d 197, 125 USPQ 416 (CCPA 1960). As for claim 3, the combined device shows the first supercritical carbon dioxide fluid is different from the second supercritical carbon dioxide fluid in composition (Pat’225: claims 1-6). As for claim 13, the combined device shows forming a gate electrode on the second dielectric layer, wherein the second dielectric layer includes a high-k dielectric material (Pat’225: claim 10). As for claim 14, the combined device shows the first radical chemical includes a hydrogen radical (H*); and the second radical chemical includes an oxygen radical (O*) (Pat’225: claim 11). As for claim 15, the combined device shows the first radical chemical further includes a deuterium radical (D*); and the second radical chemical further includes a fluorine radical (F*) (Pat’225: claims 12 and 13). As for claim 16, the combined device shows the performing of the first radical treatment to the first dielectric layer includes performing the first radical treatment to the first dielectric layer at a first temperature less than 100 °C; and the performing of the second radical treatment to the second dielectric layer includes performing the second radical treatment to the second dielectric layer at a second temperature less than 100 °C (Pat’225: claim 11). As for claim 17, the combined device shows the performing of the first radical treatment to the first dielectric layer further includes dissolving a first radical source gas in the first supercritical carbon dioxide fluid, and applying the first supercritical carbon dioxide fluid dissolved with the first radical chemical to the first dielectric layer; and the performing of the second radical treatment to the second dielectric layer further includes dissolving a second radical source gas in the second supercritical carbon dioxide fluid, and applying the second supercritical carbon dioxide fluid dissolved with the second radical chemical to the second dielectric layer (Pat’225: claim 12). As for claim 19, the combined device shows the forming of the top gate dielectric layer wrapping around the top channels further includes forming a top interfacial dielectric layer to wrap around each of the top channels, and forming a top high-k dielectric material layer on the top interfacial dielectric layer to wrap around each of the top channels; and the performing of the radical treatment to the top gate dielectric layer in the supercritical carbon dioxide fluid further includes dissolving a first radical source gas in a first supercritical carbon dioxide fluid, applying the first supercritical carbon dioxide fluid dissolved with a first radical chemical to the top interfacial dielectric layer, prior to the forming of the top high-k dielectric material layer on the top interfacial dielectric layer to wrap around each of the top channels, dissolving a second radical source gas in a second supercritical carbon dioxide fluid after the forming of the top high-k dielectric material layer on the top interfacial dielectric layer to wrap around the each of the top channels; and applying the second supercritical carbon dioxide fluid dissolved with a second radical chemical to the top high-k dielectric material layer, the second radical chemical being different from first radical chemical (Pat’225: claims 17 and 18). As for claim 20, the combined device shows the first radical chemical includes a hydrogen radical (H*); and the second radical chemical includes an oxygen radical (O*) (Pat’225: claim 19). Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to MEIYA LI whose telephone number is (571)270-1572. The examiner can normally be reached Monday-Friday 7AM-3PM. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, LYNNE GURLEY can be reached at (571)272-1670. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /MEIYA LI/Primary Examiner, Art Unit 2811
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Prosecution Timeline

Jul 30, 2024
Application Filed
Oct 09, 2026
Non-Final Rejection mailed — §112, §DOUBLEPATENT (current)

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

1-2
Expected OA Rounds
69%
Grant Probability
95%
With Interview (+26.0%)
3y 7m (~1y 4m remaining)
Median Time to Grant
Low
PTA Risk
Based on 948 resolved cases by this examiner. Grant probability derived from career allowance rate.

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