DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Double Patenting
The nonstatutory double patenting rejection is based on a judicially created doctrine grounded in public policy (a policy reflected in the statute) so as to prevent the unjustified or improper timewise extension of the “right to exclude” granted by a patent and to prevent possible harassment by multiple assignees. A nonstatutory double patenting rejection is appropriate where the conflicting claims are not identical, but at least one examined application claim is not patentably distinct from the reference claim(s) because the examined application claim is either anticipated by, or would have been obvious over, the reference claim(s). See, e.g., In re Berg, 140 F.3d 1428, 46 USPQ2d 1226 (Fed. Cir. 1998); In re Goodman, 11 F.3d 1046, 29 USPQ2d 2010 (Fed. Cir. 1993); In re Longi, 759 F.2d 887, 225 USPQ 645 (Fed. Cir. 1985); In re Van Ornum, 686 F.2d 937, 214 USPQ 761 (CCPA 1982); In re Vogel, 422 F.2d 438, 164 USPQ 619 (CCPA 1970); In re Thorington, 418 F.2d 528, 163 USPQ 644 (CCPA 1969).
A timely filed terminal disclaimer in compliance with 37 CFR 1.321(c) or 1.321(d) may be used to overcome an actual or provisional rejection based on nonstatutory double patenting provided the reference application or patent either is shown to be commonly owned with the examined application, or claims an invention made as a result of activities undertaken within the scope of a joint research agreement. See MPEP § 717.02 for applications subject to examination under the first inventor to file provisions of the AIA as explained in MPEP § 2159. See MPEP § 2146 et seq. for applications not subject to examination under the first inventor to file provisions of the AIA . A terminal disclaimer must be signed in compliance with 37 CFR 1.321(b).
The filing of a terminal disclaimer by itself is not a complete reply to a nonstatutory double patenting (NSDP) rejection. A complete reply requires that the terminal disclaimer be accompanied by a reply requesting reconsideration of the prior Office action. Even where the NSDP rejection is provisional the reply must be complete. See MPEP § 804, subsection I.B.1. For a reply to a non-final Office action, see 37 CFR 1.111(a). For a reply to final Office action, see 37 CFR 1.113(c). A request for reconsideration while not provided for in 37 CFR 1.113(c) may be filed after final for consideration. See MPEP §§ 706.07(e) and 714.13.
The USPTO Internet website contains terminal disclaimer forms which may be used. Please visit www.uspto.gov/patent/patents-forms. The actual filing date of the application in which the form is filed determines what form (e.g., PTO/SB/25, PTO/SB/26, PTO/AIA /25, or PTO/AIA /26) should be used. A web-based eTerminal Disclaimer may be filled out completely online using web-screens. An eTerminal Disclaimer that meets all requirements is auto-processed and approved immediately upon submission. For more information about eTerminal Disclaimers, refer to www.uspto.gov/patents/apply/applying-online/eterminal-disclaimer.
Claims 1-15 are rejected on the ground of nonstatutory double patenting as being unpatentable over claims 1-14 of U.S. Patent No. 12,148,746. Although the claims at issue are not identical, they are not patentably distinct from each other because each of the limitations in the claims of the present application are substantially recited in the corresponding claims of the patent, hence the patent claims would anticipate the application claims.
Regarding claim 1, see claim 1 of the patent.
Regarding claim 2, see claim 1 of the patent.
Regarding claim 3, see claim 2 of the patent.
Regarding claim 4, see claim 3 of the patent.
Regarding claim 5, see claim 4 of the patent.
Regarding claim 6, see claim 5 of the patent.
Regarding claim 7, see claim 6 of the patent.
Regarding claim 8, see claim 7 of the patent.
Regarding claim 9, see claim 8 of the patent.
Regarding claim 10, see claim 9 of the patent.
Regarding claim 11, see claim 10 of the patent.
Regarding claim 12, see claim 11 of the patent.
Regarding claim 13, see claim 12 of the patent.
Regarding claim 14, see claim 13 of the patent.
Regarding claim 15, see claim 14 of the patent.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claims 1, 4, 5, and 8 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Karp (U.S. Pub #2020/0343237).
With respect to claim 1, Karp teaches an integrated circuit (IC) device, comprising:
a substrate (Fig. 2, 106) comprising: a front side, a back side below the front side, first functional circuitry (Fig. 3, 306 and Paragraph 31) on the front side of the substrate, and a first electrostatic discharge (ESD) clamp circuit (Fig. 312 or 314) on the front side of the substrate;
a first connection tower (Fig. 2, 206) that extends below the back side of the substrate and is connected to an input/output pad (Fig. 3, 318 and Paragraph 31) below the back side of the substrate; and
one or more first front side conductors and one or more first front side vias (Fig. 2, 203A and Paragraph 27), wherein the one or more first front side conductors and one or more first front side vias connect the first connection tower to the first functional circuitry and to the first ESD clamp circuit.
With respect to claim 4, Karp teaches a first buried power rail configured to be biased at a first reference voltage (Fig. 3, 316 and Paragraph 31, VDD; connection to buried towers 206);
a second connection tower that is connected to the first buried power rail (Fig. 3, buried towers are connected together in a U-route); and
one or more second front side conductors (Fig. 2, 204) and one or more second front side vias (Fig. 2, 202) that connect the second connection tower to the first ESD clamp circuit.
With respect to claim 5, Karp teaches that the first connection tower comprises a first buried connection tower (Fig. 2, connection towers 206 are buried in the interconnect structure 203A below the chip 106).
With respect to claim 8, Karp teaches a first buried power rail configured to be biased at a first reference voltage (Fig. 3, 316 and Paragraph 31, VDD; connection to buried towers 206);
a second connection tower that is connected to the first buried power rail (Fig. 3, buried towers 206 are connected together in a U-route); and
one or more second front side conductors (Fig. 2, 204) and one or more front side vias (Fig. 2, 202) that connect the second connection tower to the first functional circuitry.
Allowable Subject Matter
Claims 16-20 are allowed.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to BENJAMIN P SANDVIK whose telephone number is (571)272-8446. The examiner can normally be reached M-F: 10-6.
Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Davienne Monbleau can be reached at (571)-272-1945. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/BENJAMIN P SANDVIK/Primary Examiner, Art Unit 2812
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