DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Double Patenting
The nonstatutory double patenting rejection is based on a judicially created doctrine grounded in public policy (a policy reflected in the statute) so as to prevent the unjustified or improper timewise extension of the “right to exclude” granted by a patent and to prevent possible harassment by multiple assignees. A nonstatutory double patenting rejection is appropriate where the conflicting claims are not identical, but at least one examined application claim is not patentably distinct from the reference claim(s) because the examined application claim is either anticipated by, or would have been obvious over, the reference claim(s). See, e.g., In re Berg, 140 F.3d 1428, 46 USPQ2d 1226 (Fed. Cir. 1998); In re Goodman, 11 F.3d 1046, 29 USPQ2d 2010 (Fed. Cir. 1993); In re Longi, 759 F.2d 887, 225 USPQ 645 (Fed. Cir. 1985); In re Van Ornum, 686 F.2d 937, 214 USPQ 761 (CCPA 1982); In re Vogel, 422 F.2d 438, 164 USPQ 619 (CCPA 1970); In re Thorington, 418 F.2d 528, 163 USPQ 644 (CCPA 1969).
A timely filed terminal disclaimer in compliance with 37 CFR 1.321(c) or 1.321(d) may be used to overcome an actual or provisional rejection based on nonstatutory double patenting provided the reference application or patent either is shown to be commonly owned with the examined application, or claims an invention made as a result of activities undertaken within the scope of a joint research agreement. See MPEP § 717.02 for applications subject to examination under the first inventor to file provisions of the AIA as explained in MPEP § 2159. See MPEP § 2146 et seq. for applications not subject to examination under the first inventor to file provisions of the AIA . A terminal disclaimer must be signed in compliance with 37 CFR 1.321(b).
The filing of a terminal disclaimer by itself is not a complete reply to a nonstatutory double patenting (NSDP) rejection. A complete reply requires that the terminal disclaimer be accompanied by a reply requesting reconsideration of the prior Office action. Even where the NSDP rejection is provisional the reply must be complete. See MPEP § 804, subsection I.B.1. For a reply to a non-final Office action, see 37 CFR 1.111(a). For a reply to final Office action, see 37 CFR 1.113(c). A request for reconsideration while not provided for in 37 CFR 1.113(c) may be filed after final for consideration. See MPEP §§ 706.07(e) and 714.13.
The USPTO Internet website contains terminal disclaimer forms which may be used. Please visit www.uspto.gov/patent/patents-forms. The actual filing date of the application in which the form is filed determines what form (e.g., PTO/SB/25, PTO/SB/26, PTO/AIA /25, or PTO/AIA /26) should be used. A web-based eTerminal Disclaimer may be filled out completely online using web-screens. An eTerminal Disclaimer that meets all requirements is auto-processed and approved immediately upon submission. For more information about eTerminal Disclaimers, refer to www.uspto.gov/patents/apply/applying-online/eterminal-disclaimer.
Claims 1-17 are rejected on the ground of nonstatutory double patenting as being unpatentable over claims 1-20 of U.S. Patent No. 12, 246, 351. Although the claims at issue are not identical, they are not patentably distinct from each other because claims 1-17 of the present Application are anticipated by claim 1-20 of U.S. Patent No. 12, 246, 351.
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
Claim(s) 1-16 are rejected under 35 U.S.C. 102(a)(1)/(a)(2) as being anticipated by Huang (US 2012/0187494).
Regarding claim 1, Huang discloses a semiconductor device comprising: a substrate (Figs.1, 2, numeral 11) including a well region (17) of a first conductive type; a first gate electrode (25) on the substrate (11); a second gate electrode (25) on the substrate (11); a first doped region (23) embedded within the well region (17) and is of the first conductive type, a second doped region (23) embedded within the well region (17)and is of the first conductive type, and a third doped region (23) embedded within the well region and is of the first conductive type; and a first interconnection structure (G) electrically connecting the first gate electrode (25) and the second gate electrode (25), wherein the first doped region (23) and the second doped region (23) are on opposite sides of the first gate electrode (25).
Regarding claim 2, Huang discloses wherein: the second doped region (23) and the third doped region (23) are on opposite sides of the second gate electrode (25).
Regarding claim 3, Huang discloses wherein: the first conductive type is N-type (Fig.2).
Regarding claim 4, Huang discloses wherein the first doped region (23) and the well region (17) are substantially equal in electrical potential (note: substantially is a broad term).
Regarding claim 5, Huang discloses wherein: the third doped region (23) and the well region (17) are substantially equal in electrical potential (note: substantially is a broad term).
Regarding claim 6, Huang discloses a third gate electrode (25) on the substrate (11) ([0033]); and a fourth doped region (230 embedded within the well region (17) and is of the first conductive type, wherein the first interconnection structure (G) electrically connects the first gate electrode (25), the second gate electrode (25), and the third gate electrode (25).
Regarding claim 7, Huang discloses wherein: the third doped region (23) and the fourth doped region (25) are on opposite sides of the third gate electrode (25).
Regarding claim 8, Huang discloses a second interconnection structure (G) electrically connecting the first doped region and the fourth doped region (23) ([0034]).
Regarding claim 9, Huang discloses number N of gate electrodes (25) between the first gate electrode (25) and the second gate electrode (25); and a number N of doped regions between the first gate electrode and the second gate electrode, wherein the first interconnection structure electrically connects the first gate electrode, the second gate electrode, and the number N of gate electrodes ([0033]).
Regarding claim 10, Huang discloses wherein: N is a positive integer equaling or exceeding one ([0033]).
Regarding claim 11, Huang discloses a semiconductor device comprising: a substrate (Fig.2, numeral 11) including a well region (17); a first gate electrode (25) over the well region (17); a second gate electrode (25) over the well region (17); a third gate electrode (15) over the well region (17) ([0033]); a first doped region (23) in the well region (17) at a first side of the first gate electrode (250; a second doped region (23) in the well region (17) at a second side of the first gate electrode (25) and a first side of the second gate electrode (250, between the first gate electrode (25) and the second gate electrode (25); a third doped region (23)in the well region (17) at a second side of the second gate electrode (25) and a first side of the third gate electrode (25), between the second gate electrode (25) and the third gate electrode (25); a fourth doped region (23) in the well region at a second side of the third gate electrode (25) ([0033]); a first electrical connection (G) electrically connecting the first gate electrode (25) and the second gate electrode (25) ; and a second electrical connection (S/D) electrically connecting the first doped region (23) and the fourth doped region (23).
Regarding claim 12, Huang discloses wherein: the first doped region (23) and the well region (17) are substantially equal in electrical potential (note: substantially is a broad term).
Regarding claim 13, Huang discloses, wherein: the third doped region (230 and the well region (17) are substantially equal in electrical potential (note: substantially is a broad term).
Regarding claim 14, Huang discloses a number N of gate electrodes between the first gate electrode and the second gate electrode, N being an integer of 1 or more ([0033]); and a number M of doped regions (23) between the first gate electrode (25) and the second gate electrode (25), M being equal to N, wherein: the first electrical connection electrically connects the first gate electrode (25), the second gate electrode, the third gate electrode, and the number N of gate electrodes (25) ([0033]).
Regarding claim 15, Huang discloses wherein: the well region (17), the first doped region (230, the second doped region (23), the third doped region (23), and the fourth doped region (23) all have a same conductivity type (Fig.2).
Regarding claim 16, Huang discloses wherein: the well region is an N-well (17), and the first doped region (23), the second doped region (23), the third doped region (23), and the fourth doped region (230 are each an N+ region (Fig.2).
Claim(s) 18-20 are rejected under 35 U.S.C. 102(a)(1)/(a)(2) as being anticipated by El-Tanani (US 2017/0330977).
Regarding claim 18, El-Tanani discloses a method of manufacturing a semiconductor device, comprising: providing a substrate (Fig. 1, numeral 126) including a well region (340) of a first conductive type (Fig.3) ; disposing fin structures (122) of a first conductive type on a well region of a substrate ([0016]), wherein the fin structures extend along a first orientation (Fig.1); disposing a first number of gate structures (Fig.3, numeral 302)) on the fin structures along a second orientation orthogonal to the first orientation (Fig.1); disposing a second number of electrodes (304) on the fin structures (122)along the second orientation; and electrically connecting the first number of gate structures (302) with a first interconnection structure (Fig.3, numeral 344).
Regarding claim 19, El-Tanani discloses electrically connecting the second number of electrodes (304) with a second interconnection structure (346) (Fig.3).
Regarding claim 20, El-Tanani discloses electrically connecting only two of the second number of electrodes (304) with a second interconnection structure (346) (Fig. 3)
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 17 is/are rejected under 35 U.S.C. 103 as being unpatentable over Huang as applied to claim 11 above, and further in view of Gau (US 6, 943, 399).
Regarding claim 17, Huang does not disclose wherein: the second electrical connection is free of electrical connections to the second doped region and the third doped region.
Gau however discloses that the second electrical connection (Fig.3, numeral 230) is free of electrical connections to the second doped region (212a) and the third doped region (212a) (column 5, line 61- column 6, line 6).
It would have been therefore obvious to one of ordinary skill in the art at the time the invention was filed to modify Huang with Gau to have the second electrical connection is free of electrical connections to the second doped region and the third doped region for the purpose of enhacing quality factor (Gau, column 5, line 61- column 6, line 6).
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Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to JULIA SLUTSKER whose telephone number is (571)270-3849. The examiner can normally be reached Monday-Friday, 9 am-6 pm.
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/JULIA SLUTSKER/Primary Examiner, Art Unit 2891
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