DETAILED ACTION
This office action is in response to the election filed 6/15/2026.
Currently, claims 1-20 are pending.
Election/Restrictions
Applicant’s election without traverse of Species III is acknowledged.
Upon examination, the Examiner has determined that the limitations claimed in claims 8 and 9 (as well as 19 and 20) are obvious variants. Thus, claims 9 and 20 have been rejoined.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
Claims 1, 10, 16 and 18 are rejected under 35 U.S.C. 102(a)(2) as being anticipated by Joi et al. (US 12,564,039).
Pertaining to claim 1, Joi shows, with reference to FIG. 3, a method, comprising:
forming an interconnect in one or more dielectric layers (302) of a device,
wherein the interconnect comprises a via and a trench above the via (col. 7, lines 3-5);
forming a zinc silicon oxide (ZnSiOx) barrier (314) on sidewalls of the via and on sidewalls of the trench (col. 9, lines 26-28 “zinc silicate”); and
filling the via and the trench with a copper (Cu) layer (340) (col. 10, lines 35-42).
Pertaining to claim 10, Joi shows forming the one or more dielectric layers before forming the interconnect (FIG. 3A).
Pertaining to claim 16, Joi shows a method, comprising:
forming a dual damascene structure in one or more dielectric layers (302) of a device (col. 7, lines 1-9), wherein forming the dual damascene structure comprises:
forming a via and a trench above the via (col. 7, lines 3-5);
forming an oxide material (314) on sidewalls of the via and on sidewalls of the trench (col. 8, lines 53-59); and
forming a copper (Cu) layer (340) in the via and the trench,
wherein the device comprises a metallization layer below the one or more dielectric layers (col. 7, lines 5-8).
Pertaining to claim 18, Joi shows the copper layer is coupled with the metallization layer (col. 11, lines 21-29).
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 3-5 are rejected under 35 U.S.C. 103 as being unpatentable over Joi in view of Witt (US 10,224,284).
Joi shows the method of claim 1, wherein the zinc layer bonds with silicon dioxide (SiO2) in the one or more dielectric layers to form the zinc silicon oxide barrier (col. 9, lines 26-29).
Joi fails to show that forming the zinc silicon oxide barrier comprises performing an atomic layer deposition (ALD) operation to deposit a zinc layer directly on the sidewalls of the trench, directly on the sidewalls of the via, and directly on a bottom surface of the via.
However, Witt teaches in col. 3, line 18 – col. 4, line 23 and FIG. 1-2 that, in a similar process for forming a self-formed barrier layer resulting from the reaction between the dielectric layer of the interconnect and a zinc material layer, the zinc layer is deposited directly on the sidewalls and bottom of the opening using a technique such as ALD (col. 3, lines 18-22).
It would have been obvious to one of ordinary skill in the art, before the effective filing date of the claimed invention, to substitute the technique for creating the self-formed zinc silicon oxide barrier used by Joi for that taught by Witt, as the court has held that the simple substitution of one known element for another to obtain predictable results is prima facie obvious. KSR Int'l Co. v. Teleflex Inc., 550 U.S. 398, 415-421, 82 USPQ2d 1385, 1395-97 (2007).
Pertaining to claim 4, Witt teaches performing the ALD operation to deposit the zinc layer comprises performing the ALD operation to deposit the zinc layer on the sidewalls of the trench and on the sidewalls of the via to a thickness of <1 nm (col. 3, lines 34-35), which at least overlaps with the claimed range of approximately 3 angstroms to approximately 10 angstroms.
Pertaining to claim 5, Witt teaches performing the ALD operation to deposit the zinc layer comprises performing the ALD operation to deposit the zinc layer on the bottom surface of the via to a thickness less than approximately 10 angstroms (col. 3, lines 34-35).
Claims 8-9 and 19-20 are rejected under 35 U.S.C. 103 as being unpatentable over Joi in view of Wang (US 8,912,093).
Joi shows the methods of claims 1 and 16 as discussed above, but fails to show either or both of forming the trench after forming the via or forming the via after forming the trench.
However, Joi does show that the via and trench may be formed using a dual damascene process (col. 7, lines 8-9). Meanwhile, Wang teaches in col. 1, lines 35-59 that the two preferred types of dual damascene processes that are common in the industry are trench first via last, and via first trench last.
It would have been obvious to one of ordinary skill in the art, before the effective filing date of the claimed invention, to try either trench first via last or via first trench last, as taught by Wang, for the dual damascene technique of Joi, as the court has held that choosing from a finite number of identified, predictable solutions, with a reasonable expectation of success is prima facie obvious. KSR Int'l Co. v. Teleflex Inc., 550 U.S. 398, 415-421, 82 USPQ2d 1385, 1395-97 (2007).
Claims 11-15 and 17 are rejected under 35 U.S.C. 103 as being unpatentable over Joi in view of Venkatraman et al. (US 10,501,846).
Pertaining to claim 11, Joi shows the method of claim 10 as discussed above.
Pertaining to claim 17, Joi shows the method of claim 16 as discussed above.
Pertaining to claim 12, Joi shows a method, comprising:
forming a metallization layer (“first metal line”, col. 11, line 23) and one or more dielectric layers (302);
forming an interconnect in the one or more dielectric layers, wherein the interconnect comprises a via and a trench above the via;
forming an oxide material on sidewalls of the via and on sidewalls of the trench; and
forming a copper (Cu) layer in the via and the trench.
Pertaining to all of claims 11, 12 and 17, Joi fails to show an etch stop layer between the metallization layer and the one or more dielectric layers.
However, Venkatraman teaches in FIG. 5 that, for an interconnect structure similar to that of Joi, an etch stop layer 504 is formed between metallization layer 506 and dielectric layer 502.
It would have been obvious to one of ordinary skill in the art, before the effective filing date of the claimed invention, to form an etch stop layer between the metallization layer and the dielectric layer of Joi, as taught by Venkatraman, as it is well known that such etch stop layers add an element of control to the etching process used to form the opening in the dielectric layer such that damage to the underlying metallization layer is reduced or eliminated.
Pertaining to claim 13, Joi shows the oxide material is a zinc silicon oxide barrier (col. 9, lines 26-28 “zinc silicate”).
Pertaining to claim 14, Joi shows forming the zinc silicon oxide barrier comprises forming the zinc silicon oxide barrier from silicon dioxide in the one or more dielectric layers and zinc in a zinc layer (col. 8, lines 52-55).
Pertaining to claim 15, Joi shows the via and the trench form a dual damascene structure (col. 7, lines 1-9).
Allowable Subject Matter
Claims 6-7 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
The following is a statement of reasons for the indication of allowable subject matter: The prior art of record, either singularly or in combination, does not disclose or suggest the zinc silicon oxide barrier is formed by forming a ruthenium seed layer on a zinc layer which last been directly deposited on the sidewalls of the trench and the via by ALD, wherein zinc in the zinc layer bonds with silicon dioxide in the one or more dielectric layers to form the zinc silicon oxide barrier. Although Venkatraman makes mention of a conformal ruthenium layer deposited in the opening, it is the ruthenium that is directly deposited on the dielectric that defines the boundaries of the opening. See e.g. Fig. 5B where Ru liner 508 is deposited on dielectric 502. The Ru liner prevents the Zn layer 510 from being directly deposited on the sidewalls and bottom of the trench/via, which is required by claim 6. Thus, this feature is patentably distinguishable over the prior art.
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. Brogan et al. (US 2023/0197509), Joi et al. (US 11,984,354), Zhao et al. (US 2019/0363048), Blakeney et al. (US 2023/0298936), and Wada et al. (US 7,875,976) disclose methods for manufacturing an interconnect that are similar to that disclosed by Applicant.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to DANIEL M LUKE whose telephone number is (571)270-1569. The examiner can normally be reached Monday-Friday, 9am-5pm, EST.
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, William Kraig can be reached at (571) 272-8660. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/DANIEL LUKE/Primary Examiner, Art Unit 2896
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