Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
DETAILED ACTION
Claims 1-20 are presented for examination.
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention.
Claim(s) 1-12, 14-18 and 20 is/are rejected under 35 U.S.C. 103 as being unpatentable over Yang et al. (US Pub. No. 2018/0151411 A1), hereafter referred to as Yang, in view of Kim et al. (US Pub. No. 2018/0096092 A1), hereafter referred to as Kim.
As to claim 1, Yang discloses a method for generating an integrated circuit (fig 19A; [0025]), comprising:
forming a first layer (fig 1A-2A, first layer M0 corresponding to 120), the first layer including a set of first metal rails (102a-c), each of the first metal rails separated from its adjacent one of the first metal rails according to a uniform pitch along a direction ([0036]-[0038]); and
forming a second layer (M2 corresponding to 230) facing the first layer (120), the second layer (M2) farther away from the bottom than the first layer (M0), the second layer including a set of second metal rails (108a-c), the set of second metal rails including two adjacent second metal rails separated according to a first pitch along the direction and additional two adjacent second metal rails separated according to a second pitch different from the first pitch along the direction ([0068], [0043]-[0044]).
Yang does not explicitly disclose any substrate and therefore does not disclose the first layer facing a substrate.
Nonetheless, Kim discloses a similar IC cell where the first layer faces a substrate (fig 8A, substrate 110 and [0088]).
It would have been obvious to one of ordinary skill in the art before the effective filing of the claimed invention to form the IC cell of Yang with metal rails facing a substrate as taught by Kim since this will provide electrical connection with the semiconductor elements.
As to claim 2, Yang in view of Kim disclose the method of claim 1 (paragraphs above).
Yang further discloses wherein each of the first metal rails (102a-c) has a uniform width along the direction ([0036]).
As to claim 3, Yang in view of Kim disclose the method of claim 1 (paragraphs above).
Yang further discloses wherein a second metal rail of the set of second metal rails has a first width along the direction, wherein another second metal rail of the set of second metal rails has a second width along the direction ([0069], [0045]).
As to claim 4, Yang in view of Kim disclose the method of claim 1 (paragraphs above).
Yang further discloses wherein the set of second metal rails includes two second metal rails and one or more second metal rails disposed between the two second metal rails, each of the two second metal rails having a first width along the direction, each of the one or more second metal rails having a second width along the direction, the second width less than the first width (fig 2A, W1b’; [0068]).
As to claim 5, Yang in view of Kim disclose the method of claim 4 (paragraphs above).
Yang further discloses wherein each of the two second metal rails of the set of second metal rails faces a corresponding one of two first metal rails of the set of first metal rails, each of the two first metal rails having a third width along the direction, the third width less than the first width (fig 2A, W1b’; [0068]).
As to claim 6, Yang in view of Kim disclose the method of claim 1 (paragraphs above).
Yang further discloses wherein the set of first metal rails includes:
a first metal rail (102a), and
an adjacent first metal rail (102b) adjacent to the first metal rail (102a), a distance between i) a side of the first metal rail away from the adjacent first metal rail and ii) a side of the adjacent first metal rail towards the first metal rail along the direction is the uniform pitch ([0036]).
As to claim 7, Yang in view of Kim disclose the method of claim 1 (paragraphs above).
Kim further discloses wherein a portion of a first metal rail of the set of first metal rails extends over an active region of the substrate in another direction (fig 8C, AC), the portion of the first metal rail facing the active region without a contact between the portion of the first metal rail and the active region of the substrate (portion of rail without contact).
As to claim 8, Yang in view of Kim disclose the method of claim 1 (paragraphs above).
Yang further discloses forming a third layer (M1) disposed between the first layer (M0) and the second layer (M2), the third layer including a set of third metal rails (106a-e), the set of third metal rails extending in the direction (fig 2A).
As to claim 9, Yang in view of Kim disclose the method of claim 8 (paragraphs above).
Yang further discloses wherein the set of first metal rails and the set of second metal rails extend in another direction traversing the direction (M0 and M2 extend in X-direction traversing the Y-direction).
As to claim 10, Yang in view of Kim disclose the method of claim 9 (paragraphs above).
Yang further discloses wherein the set of third metal rails includes two adjacent third metal rails separated, along the another direction (M1 includes rails 106 separated in Y-direction) and Kim further discloses a pitch of a polysilicon in the substrate ([0092], [0111]).
As to claim 11, Yang in view of Kim disclose the method of claim 1 (paragraphs above).
Yang further discloses wherein the first layer is a M0 layer, and the second layer is a M2 layer (fig 2A, M0 layer and M2 layer).
As to claim 12, Yang discloses a method for generating an integrated circuit (fig 19A; [0025]), comprising:
forming a first layer (M0), the first layer including a set of first metal rails extending in a first direction (102a-c extending in X-direction), each of the first metal rails having a first width along a second direction traversing the first direction ([0038]); and
forming a second layer (M2) over the first layer (M0), the second layer including a set of second metal rails extending in the first direction (208a-c), the set of second metal rails including two second metal rails and an additional second metal rail between the two second metal rails, each of the two second metal rails having a second width along the second direction, the additional second metal rail having a third width different from the second width along the second direction ([0069]).
Yang does not explicitly disclose a substrate.
Nonetheless, Kim discloses a similar IC cell where the first layer is over a substrate (fig 8A, substrate 110 and [0088]).
It would have been obvious to one of ordinary skill in the art before the effective filing of the claimed invention to form the IC cell of Yang with metal rails facing a substrate as taught by Kim since this will provide electrical connection with the semiconductor elements.
As to claim 14, Yang in view of Kim discloses the method of claim 12 (paragraphs above).
Yang further discloses wherein each of the first metal rails is separated from its adjacent one of the first metal rails by a uniform distance along the second direction ([0038]).
As to claim 15, Yang in view of Kim discloses the method of claim 12 (paragraphs above).
Yang further discloses wherein each of the two second metal rails of the set of second metal rails faces a corresponding one of two first metal rails of the set of first metal rails (fig 2A, rails of M2 face rails of M0).
As to claim 16, Yang in view of Kim discloses the method of claim 12 (paragraphs above).
Yang further discloses wherein the first layer is a M0 layer, and the second layer is a M2 layer (fig 2A, M0 layer and M2 layer).
As to claim 17, Yang in view of Kim disclose the method of claim 1 (paragraphs above).
Yang further discloses forming a third layer (M1) disposed between the first layer (M0) and the second layer (M2), the third layer including a set of third metal rails (106a-c), the set of third metal rails extending in the direction (Y-direction).
As to claim 18, Yang discloses a method for generating an integrated circuit (fig 19A; [0025]), comprising:
forming a first layer (fig 2A, M0), the first layer including a set of first metal rails (102a-c) extending in a first direction (X-direction), each of the first metal rails having a first width along a second direction (Y-direction) traversing the first direction ([0038]);
forming a second layer (M1) over the first layer (M0), the second layer including a set of second metal rails (106a-c), the set of second metal rails extending in the second direction (Y-direction); and
forming a third layer (M2) over the second layer (M1), the third layer including a set of third metal rails (208a-c) extending in the first direction (X-direction), the set of third metal rails including two third metal rails and an additional third metal rail between the two third metal rails (rail 208b between 208a and 208c).
Yang does not explicitly disclose a substrate.
Nonetheless, Kim discloses a similar IC cell where the first layer is over a substrate (fig 8A, substrate 110 and [0088]).
It would have been obvious to one of ordinary skill in the art before the effective filing of the claimed invention to form the IC cell of Yang with metal rails facing a substrate as taught by Kim since this will provide electrical connection with the semiconductor elements.
Yang does not explicitly disclose wherein each of the two third metal rails having a second width along the second direction, the additional third metal rail having a third width different from the second width along the second direction.
Nonetheless, Yang does disclose wherein the third metal rails may have the same or may have a different width along the second direction ([0069]). It would have been obvious to one of ordinary skill in the art before the effective filing of the claimed invention to choose any one rail of the plurality of rails of Yang to have a different width as a matter of design choice. Additionally, Kim further discloses wherein a width of a third power wall between a first and second power wall is different (fig 6, width Wa; [0082]). It would have been obvious to one of ordinary skill in the art before the effective filing of the claimed invention to form the width of the third metal rail of Yang as taught by Kim since this will reduce an occupation area of the integrated circuit.
As to claim 20, Yang in view of Kim disclose the method of claim 18 (paragraphs above).
Yang further discloses wherein each of the first metal rails is separated from its adjacent one of the first metal rails by a uniform distance along the second direction ([0036]).
Allowable Subject Matter
Claims 13 and 19 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
The following is a statement of reasons for the indication of allowable subject matter: The prior art of record fails to teach or suggest wherein the third width is less than the second width, and wherein the first width is less than the second width, as recited in claim 13; or wherein the third width is less than the second width, and wherein the first width is less than the second width, as recited in claim 19.
Pertinent Art
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. US 2017/0110405A1.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to SHAUN M CAMPBELL whose telephone number is (571)270-3830. The examiner can normally be reached on MWFS: 7:30-6pm Thurs 1-2pm.
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/SHAUN M CAMPBELL/Primary Examiner, Art Unit 2893 8/11/2026
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