DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
Information Disclosure Statement
The information disclosure statement (IDS) submitted on 07/31/2024 is in compliance with the provisions of 37 CFR 1.97. Accordingly, the information disclosure statement is being considered by the examiner.
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention.
Claim(s)1-7 are rejected under 35 U.S.C. 103 as being unpatentable over Lin et al. (PG Pub 2018/0151502; hereinafter Lin), Lee et al.(PG Pub 2020/0381373; hereinafter Lee) and Lin et al. (PG Pub 2012/0187584; hereinafter Lin-2).
PNG
media_image1.png
564
994
media_image1.png
Greyscale
Regarding claim 1, refer to Fig. 4 through Fig. Fgi.1 6a (Fig. 16a provided above), Lin taches a method of manufacturing a semiconductor device, the method comprising:
placing a conductive material (“copper, aluminum, tungsten, nickel, solder, or alloys thereof”; para [0036]) on a first seed layer 26 to form a via 26/32 (see Fig. 10a/b);
encapsulating and planarizing a first semiconductor die 35 and the via with an encapsulant 42 (para [0045]);
forming a first dielectric layer 50 over the encapsulant (see Fig. 13b); and
forming a first redistribution layer 48 extending through the first dielectric layer (see Fig. 13a).
Although, Lin teaches forming a first dielectric layer over the encapsulant (see Fig. 13b), he does not explicitly teach “the first dielectric layer is over the encapsulant, over a buffer region, a seal ring region, and a scribe region.”
PNG
media_image2.png
388
824
media_image2.png
Greyscale
In the same field of endeavor, refer to Fig. 7 through Fig. 16 (Fig. 8 provided above), Lee teaches forming a semiconductor device comprising: a first dielectric layer 50 is over an encapsulant 48, over a buffer region 120, a seal ring region 60 (para [0059]), and a scribe region 110 (see Fig. 8).
In light of such teachings, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have the first dielectric layer is over the encapsulant, over a buffer region, a seal ring region, and a scribe region, as taught by Lee, to reduce manufacturing costs (para [0057]).
Although Lin teaches forming a first dielectric layer over the encapsulant (see Fig. 13b), he does not explicitly teach “forming a low-temperature cured polyimide over the first redistribution layer, wherein the low-temperature cured polyimide has an adhesion to the first dielectric layer of about 582 kg/cm2.”
PNG
media_image3.png
634
908
media_image3.png
Greyscale
In the same field of endeavor, refer to Fig. 6a through Fig. 6g and Fig. 7 (Fig. 6g and Fig. 7 provided above), Lin-2 teaches a semiconductor package (para [0059-0070]) comprising: forming a first dielectric 170 (para [0059]; "positive tone polybenzoxazoles (PBO)); and forming a low-temperature cured polyimide 174 (para [0061]; "low temperature cure negative tone PI") over the first redistribution layer (see Fig. 6c), wherein the low-temperature cured polyimide has an adhesion to the first dielectric material of greater than 400 kg/cm2 (para [0061]),which overlaps the claimed range of about 582 kg/cm2. According to MPEP § 2144.05 a prima facie case of Obviousness exists where the claimed ranges "overlap or lie inside ranges disclosed by the prior art." Further support for overlapping ranges can be found in In re Wertheim, 541 F.2d 257, 191 USPQ 90 (CCPA 1976) and In re Woodruff, 919 F.2d 1575, 16 USPQ2d 1934 (Fed. Cir. 1990), and support for ranges that lie completely inside the claimed range can be found in In re Geisler, 116 F.3d 1465, 1469-71, 43 USPQ2d 1362, 1365-66 (Fed. Cir. 1997).
In light of such teachings, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have the material compositions of the first and second dielectric layer comprises the material composition, as taught by Lin-2, thereby enhancing the adhesion between the two layers (abstract).
Regarding claim 2, refer to the figures cited above, in the combination of Lin, Lee and Lin-2, Lin-2 teaches the low-temperature cured polyimide 174 (para [0061]) is cured at a temperature less than about 230 °C (para [0061]).
Regarding claim 3, refer to the figures cited above, in the combination of Lin, Lee and Lin-2, Lin teaches forming a second redistribution layer (44 of 43-2) over and electrically connected to the first redistribution layer (44 of 43-1) (see Fig. 16a).
Regarding claim 4, refer to the figures cited above, in the combination of Lin, Lee and Lin-2, Lin teaches the first dielectric layer 50 comprises a polybenzoxazole material (para [0049]).
Regarding claim 5, refer to the figures cited above, in the combination of Lin, Lee and Lin-2, Lee teaches forming a seal ring (not indexed; para [0059]) in the seal ring region (region containing the seal).
Regarding claim 6, refer to the figures cited above, in the combination of Lin, Lee and Lin-2, Lee teaches the seal ring (not indexed; para [0059]) comprises portions of the first redistribution layer (para [0059]).
Regarding claim 7, refer to the figures cited above, in the combination of Lin, Lee and Lin-2, Lee teaches singulating the semiconductor device through the scribe region 120 (para [0048]).
Claim(s) 8-14 are rejected under 35 U.S.C. 103 as being unpatentable over Lee et al.(PG Pub 2020/0381373; hereinafter Lee) and Lin et al. (PG Pub 2012/0187584; hereinafter Lin-2).
PNG
media_image4.png
414
820
media_image4.png
Greyscale
Regarding claim 8, refer to Fig. 7 through Fig. 16 (Fig. 8 provided above), Lee teaches a method of manufacturing a semiconductor device, the method comprising:
forming a first dielectric layer 50 over a buffer region (annotated ‘buffer” in Fig. 7 above), a seal ring region (not shown; para [0059]), and a scribe region 110 of an encapsulant 48, the encapsulant surrounding a semiconductor die 36 and a through via 32 (see Fig. 7).
Although Lee teaches a second dielectric layer 66 over the first dielectric layer 50, Lee does not teach “curing a second dielectric layer over the first dielectric layer, wherein the curing comprises: a ramping stage, wherein the ramping stage increases a temperature of the second dielectric layer at a rate in a range from about 2 °C/min to about 5 °C/min; and a curing stage wherein the second dielectric layer is cured at a temperature of less than about 230 °C for about two hours or less.”
In the same field of endeavor, refer to Fig. 6a through Fig. 6g and Fig. 7 (Fig. 6g and Fig. 7 provided above), Lin-2 teaches a semiconductor package (para [0059-0070]) comprising: forming a first dielectric 170 (para [0059]; "positive tone polybenzoxazoles (PBO)); and curing a second dielectric layer 174 (para [0061]; "low temperature cure negative tone PI") over the first dielectric layer (see Fig. 6c), wherein the curing comprises: a ramping stage, wherein the ramping stage increases a temperature of the second dielectric layer at a rate in a range from about 2 °C/min to about 5 °C/min; and a curing stage wherein the second dielectric layer is cured at a temperature of less than about 230 °C for about two hours or less (para [0061]).
In light of such teachings, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have the material compositions of the first and second dielectric layer comprises the material composition, as taught by Lin-2, thereby enhancing the adhesion between the two layers (abstract).
Regarding claim 9, refer to the figures cited above, in the combination of Lin-2 and Lee, Lin-2 teaches the second dielectric layer 174 comprises a polyimide (para [0061]).
Regarding claim 10, refer to the figures cited above, in the combination of Lin-2 and Lee, Lin-2 teaches forming a redistribution layer 176 between the first dielectric layer 170 and the second dielectric layer 174 (see Fig. 6f).
Regarding claim 11, refer to the figures cited above, in the combination of Lin-2 and Lee, Lin-2 teaches the first dielectric layer 170 comprises a polybenzoxazole material (para [0059]).
Regarding claim 12, refer to the figures cited above, in the combination of Lin-2 and Lee, Lin-2 forming a seal ring (not indexed; para [0059]) in the seal ring region (region containing the seal).1
Regarding claim 13, refer to the figures cited above, in the combination of Lin-2 and Lee, Lin-2 teaches singulating the semiconductor device through the scribe region 120 (para [0048]).
Regarding claim 14, refer to the figures cited above, in the combination of Lin-2 and Lee, Lin-2 teaches the second dielectric layer 174 has an increased adhesion to the first dielectric layer 170 compared to a non-low-temperature cured polyimide (abstract).
Allowable Subject Matter
3. Claims 15-20 are allowable.
The following is a statement of reasons for the indication of allowable subject matter:
Claim 15 contains allowable subject matter, because the prior art of record, either singularly or in combination, fails to disclose or suggest, in combination with the other elements in claim 15, applying a second dielectric material over a first dielectric material, the first dielectric material being located over a via, a first semiconductor device, and an encapsulant; curing the second dielectric material, wherein the curing comprises: a ramping stage, wherein the ramping stage increases the temperature of the second dielectric material at a rate in a range from about 2 °C/min to about 5 °C/min; and a curing stage wherein the second dielectric material is cured at a temperature of about 190 °C for about two hours; and applying a polyimide over the second dielectric material, wherein the first dielectric material is between the encapsulant and the second dielectric material, wherein at least a portion of the polyimide comprises a monomer according to
PNG
media_image5.png
177
568
media_image5.png
Greyscale
.
Claims 16-20 would be allowable, because they depend on allowable claim 10.
Any comments considered necessary by applicant must be submitted no later than the payment of the issue fee and, to avoid processing delays, should preferably accompany the issue fee. Such submissions should be clearly labeled “Comments on Statement of Reasons for Allowance.”
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to Christina A Sylvia whose telephone number is (571)272-7474. The examiner can normally be reached on 8am-4pm (M-F).
Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Marlon Fletcher can be reached on 571-272-2063. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
Information regarding the status of an application may be obtained from the Patent Application Information Retrieval (PAIR) system. Status information for published applications may be obtained from either Private PAIR or Public PAIR. Status information for unpublished applications is available through Private PAIR only. For more information about the PAIR system, see http://pair-direct.uspto.gov. Should you have questions on access to the Private PAIR system, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative or access to the automated information system, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000.
/CHRISTINA A SYLVIA/Examiner, Art Unit 2817
/ALI NARAGHI/Primary Examiner, Art Unit 2817
Prosecution Insights