DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Information Disclosure Statement
The information disclosure statement filed 7/31/24 fails to comply with 37 CFR 1.98(a)(2), which requires a legible copy of each cited foreign patent document; each non-patent literature publication or that portion which caused it to be listed; and all other information or that portion which caused it to be listed. It has been placed in the application file, but the information referred to therein has not been considered. A copy is in the parent file, but no translation is provided in that file.
Election/Restrictions
Applicant's election with traverse of the species of Figure 7 in the reply filed on 5/15/26 is acknowledged. The traversal is on the ground(s) that the Examiner has not identified which claims belong to which species. This is not a grounds for traversal as the Examiner has clearly indicated each species as required. All pending claims do not read on the elected Figure 7. The Examiner contacted Applicant’s representative Jun Kim to access if Applicant wished to change the election to Figure 9 which appeared to read on all the elected claims. Applicant agreed to change the election.
The requirement is still deemed proper and is therefore made FINAL.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
Claim(s) 1-3, 7-8, 13-16, 19 and 20 is/are rejected under 35 U.S.C. 103 as being unpatentable over Tao (US 2013/0088926) in view of Patel (US 5,781,497).
Regarding claims 1, 13 and 19, Tao discloses a memory device comprising: a set of memory cells (see Figures 1-3) coupled to a word line (RWL); a tracking cell (see Figure 4) coupled to a tracking word line and a tracking bit line; a tracking booster circuit coupled to the tracking word line, the tracking booster circuit (driver of pulse on RWL_TK in figure 7B) to boost a first edge (leading edge) of a first pulse applied to the tracking word line (pulse in Figure 7B), the tracking cell to generate a second pulse at the tracking bit line, in response to the first pulse having the boosted first edge (pulse on RWL_TK generates pulse on RBL_TK); and a word line controller to apply a third pulse to the word line (pulse on RWL in Figure 7B), based on the second pulse (second pulse triggers XCLK which shapes the pulse on RWL).
Tao fails to show the details of the booster circuit and therefore fails to teach wherein the tracking booster circuit comprises an inverter including an input port coupled to the tracking word line, and a first transistor coupled to the invertor.
However, the use of inverters with connected transistors in signal drive circuitry was well known at the time of filing. For example, Patel shows a word line drive circuit (see Figure 2) with an input connected to an inverter (36a+38a) with transistors connected in series connected thereto (40a, 42a, or 26a, etc). Therefore, it would have been obvious to one having ordinary skill at the time of filing to deploy inverters and transistors connected thereto since this was a known configuration as part of signal generation and would yield the predictable result of the signal output.
Regarding claims 2 and 15, Tao discloses the memory device of claim 1, wherein the first transistor (40a of Patel) comprises a first source, a first drain electrode coupled to the tracking word line (input 16a), and a first gate electrode coupled to an output port of the inverter (12a).
Regarding claims 3 and 16, Tao discloses the memory device of claim 2, wherein the tracking booster circuit further comprises a second transistor (26a) connected in series with the first transistor.
to receive a control signal to enable or disable the tracking booster circuit.
Regarding claim 7, Tao discloses the memory device of claim 1, wherein the tracking booster circuit also comprises a delay cell (26a) coupled between the tracking word line and the input port of the invertor.
Regarding claims 8 and 20, Tao discloses the memory device of claim 1, further comprising a booster circuit (driver of pulses on RWLs) coupled to the set of memory cells, the booster circuit to boost a second edge of the third pulse applied to the word line.
Regarding claim 14, Tao discloses the memory device of claim 13, wherein a word line controller to apply a third pulse (pulse on RWL in Figure 7B) to the word line based on the second pulse.
Allowable Subject Matter
Claims 4-6, 9-12, and 17-18 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
Regarding claim 4, the prior art fails to teach or reasonably disclose in combination all the features of the claim in combination with preceding claim limitations including wherein the second transistor comprises a second drain electrode coupled to the first source electrode of the first transistor.
Regarding claim 5, the prior art fails to teach or reasonably disclose in combination all the features of the claim in combination with preceding claim limitations including the first transistor and the second transistor are P-type transistors.
Regarding claims 6 and 17, the prior art fails to teach or reasonably disclose in combination all the features of the claim in combination with preceding claim limitations including wherein the second transistor comprises a second drain electrode coupled to the first source electrode of the first transistor.
Regarding claim 18, the prior art fails to teach or reasonably disclose in combination all the features of the claim in combination with preceding claim limitations including wherein the first transistor and the second transistor are P-type transistors.
Regarding claim 9, the prior art fails to teach or reasonably disclose in combination all the features of the claim in combination with preceding claim limitations including wherein the tracking booster circuit is to selectively boost the first edge of the first pulse, in response to a control signal having a first state.
Regarding claim 10, the prior art fails to teach or reasonably disclose in combination all the features of the claim in combination with preceding claim limitations including wherein the tracking cell is to generate a second edge of the second pulse at the tracking bit line, in response to the boosted first edge of the first pulse.
Any comments considered necessary by applicant must be submitted no later than the payment of the issue fee and, to avoid processing delays, should preferably accompany the issue fee. Such submissions should be clearly labeled “Comments on Statement of Reasons for Allowance.”
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to DOUGLAS KING whose telephone number is (571)272-2311. The examiner can normally be reached M-F: 9:00AM-5:30PM.
Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Richard Elms can be reached on 571-272-1869. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/DOUGLAS KING/Primary Examiner, Art Unit 2824
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