DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claims 5-8 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
Regarding claim 5:
In claim 5, the limitation “forming openings in the dielectric layer on either side of the gate structure” is indefinite.
In claim 2, the dielectric layer is a gate dielectric layer as indicated in the recitation “wherein forming the gate structure comprises: forming a dielectric layer…forming a gate electrode layer on the dielectric layer…”.
Claim 5 depends from claim 2. In claim 5 the openings are source/drain contact openings and they appear to be formed in a dielectric layer different from the gate dielectric layer”. See original specification at para. [0086].
Regarding claim 6:
In claim 6, the limitation “removing the doped semiconductor layer and the polarization layer through the openings in the dielectric layer to form source/drain contact openings” is indefinite.
In claim 2, the dielectric layer is a gate dielectric layer as indicated in the recitation “wherein forming the gate structure comprises: forming a dielectric layer…forming a gate electrode layer on the dielectric layer…”.
Claim 6 depends from claims 2 and 6. In claim 6 the openings are source/drain contact openings and they appear to be formed in a dielectric layer different from the gate dielectric layer”. See original specification at para. [0086].
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
Claim(s) 1, 2 and 4 is/are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Conway et al., US 20170200820 A1.
Conway anticipates:
1. A method, comprising (see fig. 11):
forming a fin structure (1004) on a substrate (1002) comprising an undoped semiconductor material, wherein the fin structure comprises a polar sidewall surface (e.g. left surface 1004);
growing a polarization layer (1006, 1102) on the polar sidewall surface;
growing a doped semiconductor layer (1012) on the polarization layer; and
forming a gate structure (1014, 1106) on the doped semiconductor layer. See Conway at para. [0170] – [0184].
2. The method of claim 1, wherein forming the gate structure comprises:
forming a dielectric layer (1010) on (e.g. on the side of) the doped semiconductor layer (e.g. left 1012) and on an other polar sidewall surface (e.g. right surface 1004); and
forming a gate electrode layer (1014, 1106) on the dielectric layer (1010) and the polar sidewall surface (e.g. left surface 1004), para. [0170] – [0184].
4. The method of claim 2, wherein forming the dielectric layer (1010) comprises forming the dielectric layer to surround the doped semiconductor layer (e.g. left 1012) and the other polar sidewall surface (e.g. right surface 1004), para. [0170] – [0184].
Claim(s) 1 and 2 is/are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Then et al., US 9947780 B2.
Then anticipates:
1. A method, comprising (see figs. 1-2):
forming a fin structure (110) on a substrate (105) comprising an undoped semiconductor material, wherein the fin structure comprises a polar sidewall surface (e.g. right sidewall, also see Psp in fig. 2);
growing a polarization layer (115) on the polar sidewall surface;
growing a doped semiconductor layer (120, 130) on (e.g. on the sides of) the polarization layer; and
forming a gate structure (150) on (e.g. on the sides of) the doped semiconductor layer. See Then at col 3-10, ln 1–67.
2. The method of claim 1, wherein forming the gate structure (150) comprises:
forming a dielectric layer (140) on (e.g. on the sides of) the doped semiconductor layer (120, 130) and on an other polar sidewall surface (e.g. left sidewall); and
forming a gate electrode layer (150) on the dielectric layer (140) and the polar sidewall surface (e.g. right sidewall), figs. 1-2.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 5 is is/are rejected under 35 U.S.C. 103 as being unpatentable over Then, as applied to claim 1 above.
Then teaches all the limitations of claim 1 above, and but does not show openings for source/drain contacts in figs. 1-2.
However, it would have been obvious to one of ordinary skill in the art to from openings for source/drain contacts to accomplish “further comprising forming openings in the dielectric layer on either side of the gate structure” because Then teaches forming contact metallization at col 12, ln 1–25.
Allowable Subject Matter
Claim 3 is objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
Claims 9-20 are allowed.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to Michele Fan whose telephone number is 571-270-7401. The examiner can normally be reached on M-F from 7:30 am to 4 pm.
Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice.
If attempts to reach the examiner by telephone are unsuccessful, the examiner's supervisor, Jeff Natalini, can be reached on (571) 272-2266. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000.
/Michele Fan/
Primary Examiner, Art Unit 2818
20 August 2026
Prosecution Insights