DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Double Patenting
The nonstatutory double patenting rejection is based on a judicially created doctrine grounded in public policy (a policy reflected in the statute) so as to prevent the unjustified or improper timewise extension of the “right to exclude” granted by a patent and to prevent possible harassment by multiple assignees. A nonstatutory double patenting rejection is appropriate where the conflicting claims are not identical, but at least one examined application claim is not patentably distinct from the reference claim(s) because the examined application claim is either anticipated by, or would have been obvious over, the reference claim(s). See, e.g., In re Berg, 140 F.3d 1428, 46 USPQ2d 1226 (Fed. Cir. 1998); In re Goodman, 11 F.3d 1046, 29 USPQ2d 2010 (Fed. Cir. 1993); In re Longi, 759 F.2d 887, 225 USPQ 645 (Fed. Cir. 1985); In re Van Ornum, 686 F.2d 937, 214 USPQ 761 (CCPA 1982); In re Vogel, 422 F.2d 438, 164 USPQ 619 (CCPA 1970); In re Thorington, 418 F.2d 528, 163 USPQ 644 (CCPA 1969).
A timely filed terminal disclaimer in compliance with 37 CFR 1.321(c) or 1.321(d) may be used to overcome an actual or provisional rejection based on nonstatutory double patenting provided the reference application or patent either is shown to be commonly owned with the examined application, or claims an invention made as a result of activities undertaken within the scope of a joint research agreement. See MPEP § 717.02 for applications subject to examination under the first inventor to file provisions of the AIA as explained in MPEP § 2159. See MPEP § 2146 et seq. for applications not subject to examination under the first inventor to file provisions of the AIA . A terminal disclaimer must be signed in compliance with 37 CFR 1.321(b).
The filing of a terminal disclaimer by itself is not a complete reply to a nonstatutory double patenting (NSDP) rejection. A complete reply requires that the terminal disclaimer be accompanied by a reply requesting reconsideration of the prior Office action. Even where the NSDP rejection is provisional the reply must be complete. See MPEP § 804, subsection I.B.1. For a reply to a non-final Office action, see 37 CFR 1.111(a). For a reply to final Office action, see 37 CFR 1.113(c). A request for reconsideration while not provided for in 37 CFR 1.113(c) may be filed after final for consideration. See MPEP §§ 706.07(e) and 714.13.
The USPTO Internet website contains terminal disclaimer forms which may be used. Please visit www.uspto.gov/patent/patents-forms. The actual filing date of the application in which the form is filed determines what form (e.g., PTO/SB/25, PTO/SB/26, PTO/AIA /25, or PTO/AIA /26) should be used. A web-based eTerminal Disclaimer may be filled out completely online using web-screens. An eTerminal Disclaimer that meets all requirements is auto-processed and approved immediately upon submission. For more information about eTerminal Disclaimers, refer to www.uspto.gov/patents/apply/applying-online/eterminal-disclaimer.
Claims 1-5, 8-10, 12-15, 17, and 19-20 are rejected on the ground of nonstatutory double patenting as being unpatentable over claims 1-20 of U.S. Patent No. 11,562,953 B2. Although the claims at issue are not identical, they are not patentably distinct from each other because application claims 1-5, 8-10, 12-15, 17, and 19-20 are anticipated by claims 1-20 of the patent, and it is not patentably distinct from claims 1-20 of the patent. See the Table as shown below:
Application Under Examination Claims
Patented Claims
1. An integrated circuit comprising:
two parallel active zones extending in a first direction, including a p-type active zone in an n-type well and an n-type active zone in a p-type well, wherein each of the p-type active zone and the n-type active zone includes a channel region between a source or a drain aligned along the first direction, and wherein the p-type active zone having channel regions is separated from the n-type active zone having channel regions along a second direction that is different from the first direction;
an n-type pick-up region in the n-type well and forming a first guard-ring surrounding the p-type active zone, wherein an n-type dopant concentration of the n-type pick-up region is higher than an n-type dopant concentration of the n-type well;
a p-type pick-up region in the p-type well and forming a second guard-ring surrounding the n-type active zone, wherein a p-type dopant concentration of the p-type pick-up region is higher than a p-type dopant concentration of the p-type well;
a first power rail and a second power rail extending in the first direction, wherein the first power rail, the p-type active zone, the n-type active zone, and the second power rail are arranged along the second direction such that the p-type active zone is between the first power rail and the n-type active zone and the n-type active zone is between the p-type active zone and the second power rail; and
a first conductive segment and a second conductive segment extending in the second direction, wherein the n-type pick-up region is conductively connected to the first power rail with the first conductive segment, and the p-type pick-up region is conductively connected to the second power rail with the second conductive segment.
Anticipated by Patented Claim 17:
17. An integrated circuit comprising:
two parallel active zones extending in a first direction that includes a p-type active zone located in an n-type well and an n-type active zone located in a p-type well, wherein each of the p-type active zone and the n-type active zone includes a channel region between a source or a drain aligned along the first direction, and wherein the p-type active zone having channel regions is separated from the n-type active zone having channel regions along a second direction that is different from the first direction;
an n-type pick-up region, in the n-type well, forming a first guard-ring surrounding the p-type active zone;
a p-type pick-up region, in the p-type well, forming a second guard-ring surrounding the n-type active zone; wherein the n-type pick-up region and the p-type pick-up region are separated from each other along the second direction;
a first power rail extending in the first direction and conductively connected with the n-type pick-up region, and wherein the p-type active zone is between the first power rail and the n-type active zone and separates the first power rail from the n-type active zone;
wherein the n-type pick-up region has an n-type dopant concentration which is higher than an n-type dopant concentration of the n-type well, and the n-type pick-up region is configured to connect the n-type well conductively to a first supply voltage on the first power rail;
a first conductive segment extending in the second direction and in conductive contact with the n-type pick-up region; a first via connection connected between the first power rail and the first conductive segment; a second power rail extending in the first direction and conductively connected with the p-type pick-up region, and wherein the n-type active zone is between the second power rail from the p-type active zone and separates the second power rail from the p-type active zone;
wherein the p-type pick-up region has an p-type dopant concentration which is higher than an p-type dopant concentration of the p-type well, and the p-type pick-up region is configured to connect the p-type well conductively to a second supply voltage on the second power rail;
a second conductive segment extending in the second direction and in conductive contact with the p-type pick-up region; and a second via connection connected between the second power rail and the second conductive segment.
2. The integrated circuit of claim 1, wherein: the n-type pick-up region is configured to have a first supply voltage, and
the p-type pick-up region is configured to have a second supply voltage different from the first supply voltage.
Anticipated by Patented Claim 18:
18. The integrated circuit of claim 17, wherein the n-type pick-up region is configured to have a first supply voltage, and the p-type pick-up region is configured to have a second supply voltage which is lower than the first supply voltage.
3. The integrated circuit of claim 2, wherein: the second supply voltage is lower than the first supply voltage.
Anticipated by Patented Claim 18:
18. The integrated circuit of claim 17, wherein the n-type pick-up region is configured to have a first supply voltage, and the p-type pick-up region is configured to have a second supply voltage which is lower than the first supply voltage.
4. The integrated circuit of claim 1, wherein: the p-type well is a part of a p-type substrate, and the n-type well is formed in the p-type substrate.
Anticipated by Patented Claim 19:
19. The integrated circuit of claim 17, wherein the p-type well is a part of a p-type substrate and the n-type well is formed in the p-type substrate.
5. The integrated circuit of claim 1, wherein: the n-type well is a part of an n-type substrate, and
the p-type well is formed in the n-type substrate.
Anticipated by Patented Claim 20:
20. The integrated circuit of claim 17, wherein the n-type well is a part of an n-type substrate and the p-type well is formed in the n-type substrate.
8. An integrated circuit comprising:
a first power rail;
a p-type active zone located in an n-type well;
an n-type pick-up region located at least in part in the n-type well and forming a first guard-ring around the p-type active zone;
a first conductive segment connecting the n-type pick-up region to the first power rail;
an n-type active zone located in a p-type well;
a p-type pick-up region located at least in part in the p-type well and forming a second guard-ring around the n-type active zone;
a second power rail; and
a second conductive segment connecting the p-type pick-up region to the second power rail,
wherein: an n-type dopant concentration of the n-type pick-up region is higher than an n-type dopant concentration of the n-type well, and
a p-type dopant concentration of the p-type pick-up region is higher than a p-type dopant concentration of the p-type well.
Anticipated by Patented Claim 17:
17. An integrated circuit comprising:
two parallel active zones extending in a first direction that includes a p-type active zone located in an n-type well and an n-type active zone located in a p-type well, wherein each of the p-type active zone and the n-type active zone includes a channel region between a source or a drain aligned along the first direction, and wherein the p-type active zone having channel regions is separated from the n-type active zone having channel regions along a second direction that is different from the first direction;
an n-type pick-up region, in the n-type well, forming a first guard-ring surrounding the p-type active zone;
a p-type pick-up region, in the p-type well, forming a second guard-ring surrounding the n-type active zone; wherein the n-type pick-up region and the p-type pick-up region are separated from each other along the second direction;
a first power rail extending in the first direction and conductively connected with the n-type pick-up region, and wherein the p-type active zone is between the first power rail and the n-type active zone and separates the first power rail from the n-type active zone;
wherein the n-type pick-up region has an n-type dopant concentration which is higher than an n-type dopant concentration of the n-type well, and the n-type pick-up region is configured to connect the n-type well conductively to a first supply voltage on the first power rail;
a first conductive segment extending in the second direction and in conductive contact with the n-type pick-up region; a first via connection connected between the first power rail and the first conductive segment; a second power rail extending in the first direction and conductively connected with the p-type pick-up region, and wherein the n-type active zone is between the second power rail from the p-type active zone and separates the second power rail from the p-type active zone;
wherein the p-type pick-up region has an p-type dopant concentration which is higher than an p-type dopant concentration of the p-type well, and the p-type pick-up region is configured to connect the p-type well conductively to a second supply voltage on the second power rail;
a second conductive segment extending in the second direction and in conductive contact with the p-type pick-up region; and a second via connection connected between the second power rail and the second conductive segment.
9. The integrated circuit of claim 8, wherein: the first power rail and the second power rail extend in a first direction, and
the p-type active zone is separated from the n-type active zone along a second direction that is different from the first direction.
Anticipated by Patented Claim 17:
17. An integrated circuit comprising:
two parallel active zones extending in a first direction that includes a p-type active zone located in an n-type well and an n-type active zone located in a p-type well, wherein each of the p-type active zone and the n-type active zone includes a channel region between a source or a drain aligned along the first direction, and wherein the p-type active zone having channel regions is separated from the n-type active zone having channel regions along a second direction that is different from the first direction;
a first power rail extending in the first direction and
a second power rail extending in the first direction
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10. The integrated circuit of claim 9, wherein: the first power rail, the p-type active zone, the n-type active zone, and the second power rail are arranged along the second direction such that:
the p-type active zone is between the first power rail and the n-type active zone, and the n-type active zone is between the p-type active zone and the second power rail.
Anticipated by Patented Claim 17:
17. An integrated circuit comprising:
two parallel active zones extending in a first direction that includes a p-type active zone located in an n-type well and an n-type active zone located in a p-type well, wherein each of the p-type active zone and the n-type active zone includes a channel region between a source or a drain aligned along the first direction, and wherein the p-type active zone having channel regions is separated from the n-type active zone having channel regions along a second direction that is different from the first direction;
an n-type pick-up region, in the n-type well, forming a first guard-ring surrounding the p-type active zone;
a p-type pick-up region, in the p-type well, forming a second guard-ring surrounding the n-type active zone; wherein the n-type pick-up region and the p-type pick-up region are separated from each other along the second direction;
a first power rail extending in the first direction and conductively connected with the n-type pick-up region, and wherein the p-type active zone is between the first power rail and the n-type active zone and separates the first power rail from the n-type active zone;
wherein the n-type pick-up region has an n-type dopant concentration which is higher than an n-type dopant concentration of the n-type well, and the n-type pick-up region is configured to connect the n-type well conductively to a first supply voltage on the first power rail;
a first conductive segment extending in the second direction and in conductive contact with the n-type pick-up region; a first via connection connected between the first power rail and the first conductive segment;
a second power rail extending in the first direction and conductively connected with the p-type pick-up region, and wherein the n-type active zone is between the second power rail from the p-type active zone and separates the second power rail from the p-type active zone;
12. The integrated circuit of claim 8, wherein: the first power rail is configured to supply a first supply voltage to the n-type pick-up region, and the second power rail is configured to supply a second supply voltage, different from the first supply voltage, to the p-type pick-up region.
Anticipated by Patented Claim 18:
18. The integrated circuit of claim 17, wherein the n-type pick-up region is configured to have a first supply voltage, and the p-type pick-up region is configured to have a second supply voltage which is lower than the first supply voltage.
13. The integrated circuit of claim 8, wherein: the n-type pick-up region extends continuously around the p-type active zone, and
the p-type pick-up region extends continuously around the n-type active zone.
Anticipated by Patented Claim 17:
17. An integrated circuit comprising:
two parallel active zones extending in a first direction that includes a p-type active zone located in an n-type well and an n-type active zone located in a p-type well, wherein each of the p-type active zone and the n-type active zone includes a channel region between a source or a drain aligned along the first direction, and wherein the p-type active zone having channel regions is separated from the n-type active zone having channel regions along a second direction that is different from the first direction;
an n-type pick-up region, in the n-type well, forming a first guard-ring surrounding the p-type active zone;
a p-type pick-up region, in the p-type well, forming a second guard-ring surrounding the n-type active zone;
14. An integrated circuit comprising:
a first power rail extending in a first direction;
a p-type active zone in an n-type well;
an n-type active zone in a p-type well;
a second power rail extending in the first direction;
a first pick-up region having an n-type dopant concentration that is higher than an n-type dopant concentration of the n-type well;
a first conductive segment extending in a second direction and connecting the first pick-up region to the first power rail, the second direction being different from the first direction;
a second pick-up region having a p-type dopant concentration that is higher than a p-type dopant concentration of the p-type well; and
a second conductive segment extending in the second direction and connecting the second pick-up region to the second power rail,
wherein: the first pick-up region includes a first n-doped segment in the n-type well between the first power rail and the p-type active zone, and
the second pick-up region includes a first p-doped segment in the p-type well between the n-type active zone and the second power rail.
Anticipated by Patented Claim 17:
17. An integrated circuit comprising:
two parallel active zones extending in a first direction that includes a p-type active zone located in an n-type well and an n-type active zone located in a p-type well, wherein each of the p-type active zone and the n-type active zone includes a channel region between a source or a drain aligned along the first direction, and wherein the p-type active zone having channel regions is separated from the n-type active zone having channel regions along a second direction that is different from the first direction;
an n-type pick-up region, in the n-type well, forming a first guard-ring surrounding the p-type active zone;
a p-type pick-up region, in the p-type well, forming a second guard-ring surrounding the n-type active zone;
wherein the n-type pick-up region and the p-type pick-up region are separated from each other along the second direction;
a first power rail extending in the first direction and conductively connected with the n-type pick-up region, and wherein the p-type active zone is between the first power rail and the n-type active zone and separates the first power rail from the n-type active zone;
wherein the n-type pick-up region has an n-type dopant concentration which is higher than an n-type dopant concentration of the n-type well, and the n-type pick-up region is configured to connect the n-type well conductively to a first supply voltage on the first power rail;
a first conductive segment extending in the second direction and in conductive contact with the n-type pick-up region;
a first via connection connected between the first power rail and the first conductive segment; a second power rail extending in the first direction and conductively connected with the p-type pick-up region, and wherein the n-type active zone is between the second power rail from the p-type active zone and separates the second power rail from the p-type active zone;
wherein the p-type pick-up region has an p-type dopant concentration which is higher than an p-type dopant concentration of the p-type well, and the p-type pick-up region is configured to connect the p-type well conductively to a second supply voltage on the second power rail;
a second conductive segment extending in the second direction and in conductive contact with the p-type pick-up region; and a second via connection connected between the second power rail and the second conductive segment.
15. The integrated circuit of claim 14, wherein: the first pick-up region and the second pick-up region are separated from each other along the second direction.
Anticipated by Patented Claim 17:
17. An integrated circuit comprising:
two parallel active zones extending in a first direction that includes a p-type active zone located in an n-type well and an n-type active zone located in a p-type well, wherein each of the p-type active zone and the n-type active zone includes a channel region between a source or a drain aligned along the first direction, and wherein the p-type active zone having channel regions is separated from the n-type active zone having channel regions along a second direction that is different from the first direction;
an n-type pick-up region, in the n-type well, forming a first guard-ring surrounding the p-type active zone;
a p-type pick-up region, in the p-type well, forming a second guard-ring surrounding the n-type active zone;
wherein the n-type pick-up region and the p-type pick-up region are separated from each other along the second direction;
17. The integrated circuit of claim 16, wherein: the first pick-up region forms a first guard-ring around the p-type active zone.
Anticipated by Patented Claim 17:
17. An integrated circuit comprising:
two parallel active zones extending in a first direction that includes a p-type active zone located in an n-type well and an n-type active zone located in a p-type well, wherein each of the p-type active zone and the n-type active zone includes a channel region between a source or a drain aligned along the first direction, and wherein the p-type active zone having channel regions is separated from the n-type active zone having channel regions along a second direction that is different from the first direction;
an n-type pick-up region, in the n-type well, forming a first guard-ring surrounding the p-type active zone;
19. The integrated circuit of claim 18, wherein: the second pick-up region forms a second guard-ring around the n-type active zone.
Anticipated by Patented Claim 17:
17. An integrated circuit comprising:
two parallel active zones extending in a first direction that includes a p-type active zone located in an n-type well and an n-type active zone located in a p-type well, wherein each of the p-type active zone and the n-type active zone includes a channel region between a source or a drain aligned along the first direction, and wherein the p-type active zone having channel regions is separated from the n-type active zone having channel regions along a second direction that is different from the first direction;
an n-type pick-up region, in the n-type well, forming a first guard-ring surrounding the p-type active zone;
a p-type pick-up region, in the p-type well, forming a second guard-ring surrounding the n-type active zone;
20. The integrated circuit of claim 14, wherein: the first pick-up region is configured to have a first supply voltage, and
the second pick-up region is configured to have a second supply voltage different from the first supply voltage.
Anticipated by Patented Claim 18:
18. The integrated circuit of claim 17, wherein the n-type pick-up region is configured to have a first supply voltage, and the p-type pick-up region is configured to have a second supply voltage which is lower than the first supply voltage.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
Claim(s) 1-4 and 6-20 are rejected under 35 U.S.C. 103 as being unpatentable over LEE et al. (U.S. 2016/0268243 A1, hereinafter refer to LEE) in view of Ouyang et al. (U.S. 2014/0291765 A1, hereinafter refer to Ouyang).
Regarding Claim 1: LEE discloses an integrated circuit (see LEE, Fig.9 as shown below and ¶ [0003]) comprising:
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two parallel active zones (114/116/118/119) extending in a first direction, including a p-type active zone (118/119) and an n-type active zone (114/116), wherein each of the p-type active zone (118/119) and the n-type active zone (114/116) includes a channel region (under the gate electrode 123/125) between a source or a drain (at each opposite side of gate electrode 123/125) aligned along the first direction, and wherein the p-type active zone (118/119) having channel regions (under the gate electrode 123b/125b) is separated from the n-type active zone (114/116) having channel regions (under the gate electrode of 123a/125a) along a second direction that is different from the first direction (see LEE, Fig.9 as shown above);
an n-type pick-up region (120) and forming a first guard-ring surrounding (partially surrounding) the p-type active zone (118/119) (see LEE, Fig.9 as shown above);
a p-type pick-up region (112) and forming a second guard-ring surrounding (partially surrounding) the n-type active zone (114/116) (see LEE, Fig.9 as shown above);
a first power rail (108) and a second power rail (102) extending in the first direction, wherein the first power rail (108), the p-type active zone (118/119), the n-type active zone (114/116), and the second power rail (102) are arranged along the second direction such that the p-type active zone (118/119) is between the first power rail (108) and the n-type active zone (114/116) and the n-type active zone (114/116) is between the p-type active zone (118/119) and the second power rail (102) (see LEE, Fig.9 as shown above); and
a first conductive segment and a second conductive segment extending in the second direction, wherein the n-type pick-up region (120) is conductively connected to the first power rail (108) with the first conductive segment, and the p-type pick-up region (112) is conductively connected to the second power rail (102) with the second conductive segment (see LEE, Fig.9 as shown above and Fig.2).
Lee is silent upon explicitly disclosing wherein a p-type active zone in an n-type well and an n-type active zone in a p-type well,
an n-type pick-up region in the n-type well and forming a first guard-ring surrounding the p-type active zone, wherein an n-type dopant concentration of the n-type pick-up region is higher than an n-type dopant concentration of the n-type well;
a p-type pick-up region in the p-type well and forming a second guard-ring surrounding the n-type active zone, wherein a p-type dopant concentration of the p-type pick-up region is higher than a p-type dopant concentration of the p-type well.
For support see Ouyang, which teaches wherein a p-type active zone (305) in an n-type well (301) and an n-type active zone (312) in a p-type well (302) (see Ouyang, Fig.3 as shown below and ¶ [0020]- ¶ [0021]),
an n-type pick-up region (307) in the n-type well (301) and forming a first guard-ring surrounding the p-type active zone (305), wherein an n-type dopant concentration of the n-type pick-up region (307) is higher than an n-type dopant concentration of the n-type well (301) (note: n+ type concentration is known as higher than n-type concentration) (see Ouyang, Fig.3 as shown below and ¶ [0020]- ¶ [0021]);
a p-type pick-up region (310) in the p-type well (302) and forming a second guard-ring surrounding the n-type active zone (312), wherein a p-type dopant concentration of the p-type pick-up region (310) is higher than a p-type dopant concentration of the p-type well (302) (note: p+ type concentration is known as higher than p-type concentration) (see Ouyang, Fig.3 as shown below and ¶ [0020]- ¶ [0021]).
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Thus, it would have been obvious to one of ordinary skill in the art before effective filing date of the claimed invention to combine the teachings of LEE and Ouyang to enable the p-type active zone and n-type active zone of LEE to be formed in an n-type well and in a p-type well, respectively and the n-type pick-up region to be formed in the n-type well and forming a first guard-ring surrounding the p-type active zone and the p-type pick-up region to be formed in the p-type well and forming a second guard-ring surrounding the n-type active zone as taught by Ouyang in order to increase the number of the electrostatic discharge paths and improve the electrostatic discharge efficiency.
Regarding Claim 2: LEE as modified teaches an integrated circuit as set forth in claim 1 as above. The combination of LEE and Ouyang further teaches wherein: the n-type pick-up region (120) is configured to have a first supply voltage (see LEE, Fig.9 as shown above and Fig.2), and
the p-type pick-up region (112) is configured to have a second supply voltage different from the first supply voltage (see LEE, Fig.9 as shown above and Fig.2).
Regarding Claim 3: LEE as modified teaches an integrated circuit as set forth in claim 2 as above. The combination of LEE and Ouyang further teaches wherein: the second supply voltage (VSS) is lower than the first supply voltage (VDD) (see LEE, Fig.9 as shown above and Fig.2).
Regarding Claim 4: LEE as modified teaches an integrated circuit as set forth in claim 1 as above. The combination of LEE and Ouyang further teaches wherein: the p-type well (302) is a part of a p-type substrate (300), and the n-type well (301) is formed in the p-type substrate (300) (note: Ouyang teaches “the source region of the PMOS transistor and the semiconductor substrate can form a first PNP-type parasitic transistor. The first doped base region, the drain region of the PMOS transistor and the semiconductor substrate can form a second PNP-type parasitic transistor” from the above statements of Ouyang, ordinary skill in the art recognize that the Ouyang substrate is a p-type substrate) (see Ouyang, Fig.3 as shown above and Fig.4 and ¶ [0020]).
Regarding Claim 6: LEE as modified teaches an integrated circuit as set forth in claim 1 as above. The combination of LEE and Ouyang further teaches wherein: relative to the second direction, the n-type pick-up region (120) extends between the first power rail (108) and the p-type active zone (114/116) (see LEE, Fig.9 as shown above).
The combination of LEE and Ouyang is silent upon explicitly disclosing wherein the n-type pick-up region extends between the p-type active zone and the p-type pick-up region.
However, practicing the combination of LEE and Ouyang to modify the n-type pick-up region and the p-type pick-up region of LEE according to the n-type pick-up region and the p-type pick-up region of Ouyang necessary results the claimed limitation of “the n-type pick-up region extends between the p-type active zone and the p-type pick-up region” as now specified in claim 6.
Regarding Claim 7: LEE as modified teaches an integrated circuit as set forth in claim 6 as above. The combination of LEE and Ouyang further teaches wherein the p-type pick-up region (112) extends between the n-type active zone (114/116) and the second power rail (102) (see LEE, Fig.9 as shown above).
The combination of LEE and Ouyang is silent upon explicitly disclosing wherein: relative to the second direction, the p-type pick-up region extends between the n-type pick-up region and the n-type active zone.
However, practicing the combination of LEE and Ouyang to modify the n-type pick-up region and the p-type pick-up region of LEE according to the n-type pick-up region and the p-type pick-up region of Ouyang necessary results the claimed limitation of “relative to the second direction, the p-type pick-up region extends between the n-type pick-up region and the n-type active zone” as now specified in claim 7.
Regarding Claim 8: LEE discloses an integrated circuit (see LEE, Fig.9 as shown above and ¶ [0003]) comprising:
a first power rail (108) (see LEE, Fig.9 as shown above);
a p-type active zone (118/119) (see LEE, Fig.9 as shown above);
an n-type pick-up region (120) forming a first guard-ring around the p-type active zone (118/119) (see LEE, Fig.9 as shown above);
a first conductive segment connecting the n-type pick-up region (120) to the first power rail (108) (see LEE, Fig.9 as shown above);
an n-type active zone (114/116) (see LEE, Fig.9 as shown above);
a p-type pick-up region (112) forming a second guard-ring around the n-type active zone (114/116) (see LEE, Fig.9 as shown above);
a second power rail (102) (see LEE, Fig.9 as shown above); and
a second conductive segment connecting the p-type pick-up region (112) to the second power rail (102) (see LEE, Fig.9 as shown above).
LEE is silent upon explicitly disclosing wherein a p-type active zone located in an n-type well;
an n-type pick-up region located at least in part in the n-type well;
an n-type active zone located in a p-type well;
a p-type pick-up region located at least in part in the p-type well.
wherein: an n-type dopant concentration of the n-type pick-up region is higher than an n-type dopant concentration of the n-type well, and
a p-type dopant concentration of the p-type pick-up region is higher than a p-type dopant concentration of the p-type well.
For support see Ouyang, which teaches wherein a p-type active zone (305) located in an n-type well (301) (see Ouyang, Fig.3 as shown above and ¶ [0020]- ¶ [0021]);
an n-type pick-up region (307) located at least in part in the n-type well (301) (see Ouyang, Fig.3 as shown above and ¶ [0020]- ¶ [0021]);
an n-type active zone (312) located in a p-type well (302) (see Ouyang, Fig.3 as shown above and ¶ [0020]- ¶ [0021]);
a p-type pick-up region (310) located at least in part in the p-type well (302) (see Ouyang, Fig.3 as shown above and ¶ [0020]- ¶ [0021]).
wherein: an n-type dopant concentration of the n-type pick-up region (307) is higher than an n-type dopant concentration of the n-type well (301) (note: n+ type concentration is known as higher than n-type concentration) (see Ouyang, Fig.3 as shown above and ¶ [0020]- ¶ [0021]), and
a p-type dopant concentration of the p-type pick-up region (310) is higher than a p-type dopant concentration of the p-type well (301) (note: p+ type concentration is known as higher than p-type concentration) (see Ouyang, Fig.3 as shown above and ¶ [0020]- ¶ [0021]).
Thus, it would have been obvious to one of ordinary skill in the art before effective filing date of the claimed invention to combine the teachings of LEE and Ouyang to enable the p-type active zone and n-type active zone of LEE to be formed in an n-type well and in a p-type well, respectively and the n-type pick-up region to be formed in the n-type well and the p-type pick-up region to be formed in the p-type well as taught by Ouyang in order to increase the number of the electrostatic discharge paths and improve the electrostatic discharge efficiency.
Regarding Claim 9: LEE as modified teaches an integrated circuit as set forth in claim 8 as above. The combination of LEE and Ouyang further teaches wherein: the first power rail (108) and the second power rail (102) extend in a first direction (see LEE, Fig.9 as shown above), and
the p-type active zone (118/119) is separated from the n-type active zone (114/116) along a second direction that is different from the first direction (see LEE, Fig.9 as shown above).
Regarding Claim 10: LEE as modified teaches an integrated circuit as set forth in claim 9 as above. The combination of LEE and Ouyang further teaches wherein: the first power rail (108), the p-type active zone (118/119), the n-type active zone (114/116), and the second power rail (102) are arranged along the second direction such that (see LEE, Fig.9 as shown above):
the p-type active zone (118/119) is between the first power rail (108) and the n-type active zone (114/116), and the n-type active zone (114/116) is between the p-type active zone (118/119) and the second power rail (102) (see LEE, Fig.9 as shown above).
Regarding Claim 11: LEE as modified teaches an integrated circuit as set forth in claim 9 as above. The combination of LEE and Ouyang further teaches wherein: relative to the second direction, the n-type pick-up region (120) extends between the first power rail (108) and the p-type active zone (118/119) (see LEE, Fig.9 as shown above),
the n-type pick-up region (307) extends between the p-type active zone (305) and the p-type pick-up region (310) (see Ouyang, Fig.3 as shown above),
the p-type pick-up region (310) extends between the n-type pick-up region (307) and the n-type active zone (312) (see Ouyang, Fig.3 as shown above), and
the p-type pick-up region (112) extends between the n-type active zone (114/116) and the second power rail (102) (see LEE, Fig.9 as shown above).
Regarding Claim 12: LEE as modified teaches an integrated circuit as set forth in claim 8 as above. The combination of LEE and Ouyang further teaches wherein: the first power rail is (108) configured to supply a first supply voltage to the n-type pick-up region (120), and the second power rail (102) is configured to supply a second supply voltage, different from the first supply voltage, to the p-type pick-up region (112) (see LEE, Fig.9 as shown above).
Regarding Claim 13: LEE as modified teaches an integrated circuit as set forth in claim 8 as above. The combination of LEE and Ouyang further teaches wherein: the n-type pick-up region (307) extends continuously around the p-type active zone (305) (see Ouyang, Fig.3 as shown above), and
the p-type pick-up region (310) extends continuously around the n-type active zone (312) (see Ouyang, Fig.3 as shown above).
Regarding Claim 14: LEE discloses an integrated circuit (see LEE, Fig.9 as shown above and ¶ [0003]) comprising:
a first power rail (108) extending in a first direction (see LEE, Fig.9 as shown above);
a p-type active zone (118/119) (see LEE, Fig.9 as shown above);
an n-type active zone (114/116) (see LEE, Fig.9 as shown above);
a second power rail (102) extending in the first direction (see LEE, Fig.9 as shown above);
a first pick-up region (120) (see LEE, Fig.9 as shown above);
a first conductive segment extending in a second direction and connecting the first pick-up region (120) to the first power rail (108), the second direction being different from the first direction (see LEE, Fig.9 as shown above);
a second pick-up region (112) (see LEE, Fig.9 as shown above); and
a second conductive segment extending in the second direction and connecting the second pick-up region (112) to the second power rail (102) (see LEE, Fig.9 as shown above),
wherein: the first pick-up region (120) between the first power rail (108) and the p-type active zone (118/119) (see LEE, Fig.9 as shown above), and
the second pick-up region (112) between the n-type active zone (114/116) and the second power rail (102) (see LEE, Fig.9 as shown above).
LEE is silent upon explicitly disclosing wherein a p-type active zone in an n-type well;
an n-type active zone in a p-type well;
a first pick-up region having an n-type dopant concentration that is higher than an n-type dopant concentration of the n-type well;
a second pick-up region having a p-type dopant concentration that is higher than a p-type dopant concentration of the p-type well;
wherein: the first pick-up region includes a first n-doped segment in the n-type well, and
the second pick-up region includes a first p-doped segment in the p-type well.
For support see Ouyang, which teaches wherein a p-type active zone (305) in an n-type well (301) (see Ouyang, Fig.3 as shown above and ¶ [0020]- ¶ [0021]);
an n-type active zone (312) in a p-type well (302) (see Ouyang, Fig.3 as shown above and ¶ [0020]- ¶ [0021]);
a first pick-up region (307) having an n-type dopant concentration that is higher than an n-type dopant concentration of the n-type well (301) (note: n+ type concentration is known as higher than n-type concentration) (see Ouyang, Fig.3 as shown above and ¶ [0020]- ¶ [0021]);
a second pick-up region (310) having a p-type dopant concentration that is higher than a p-type dopant concentration of the p-type well (302) (note: p+ type concentration is known as higher than p-type concentration) (see Ouyang, Fig.3 as shown above and ¶ [0020]- ¶ [0021]);
wherein: the first pick-up region (307) includes a first n-doped segment in the n-type well (301) (see Ouyang, Fig.3 as shown above), and
the second pick-up region (310) includes a first p-doped segment in the p-type well (302) (see Ouyang, Fig.3 as shown above).
Thus, it would have been obvious to one of ordinary skill in the art before effective filing date of the claimed invention to combine the teachings of LEE and Ouyang to enable the p-type active zone and n-type active zone of LEE to be formed in an n-type well and in a p-type well, respectively and the n-type pick-up region to be formed in the n-type well and the p-type pick-up region to be formed in the p-type well as taught by Ouyang in order to increase the number of the electrostatic discharge paths and improve the electrostatic discharge efficiency.
Regarding Claim 15: LEE as modified teaches an integrated circuit as set forth in claim 14 as above. The combination of LEE and Ouyang further teaches wherein: the first pick-up region (120) and the second pick-up region (112) are separated from each other along the second direction (see LEE, Fig.9 as shown above).
Regarding Claim 16: LEE as modified teaches an integrated circuit as set forth in claim 14 as above. The combination of LEE and Ouyang further teaches wherein: relative to the second direction, a second n-doped segment of the first pick-up region (307) extends between the p-type active zone (305) and the second pick-up region (310) (see Ouyang, Fig.3 as shown above).
Regarding Claim 17: LEE as modified teaches an integrated circuit as set forth in claim 16 as above. The combination of LEE and Ouyang further teaches wherein: the first pick-up region (307) forms a first guard-ring around the p-type active zone (305) (see Ouyang, Fig.3 as shown above).
Regarding Claim 18: LEE as modified teaches an integrated circuit as set forth in claim 14 as above. The combination of LEE and Ouyang further teaches wherein: relative to the second direction, a second p-doped segment of the second pick-up region (112) extends between the n-type active zone (114/116) and the second power rail (102) (see LEE, Fig.9 as shown above).
Regarding Claim 19: LEE as modified teaches an integrated circuit as set forth in claim 18 as above. The combination of LEE and Ouyang further teaches wherein: the second pick-up region (310) forms a second guard-ring around the n-type active zone (312) (see Ouyang, Fig.3 as shown above).
Regarding Claim 20: LEE as modified teaches an integrated circuit as set forth in claim 14 as above. The combination of LEE and Ouyang further teaches wherein: the first pick-up region (120) is configured to have a first supply voltage (see LEE, Fig.9 as shown above), and
the second pick-up region (112) is configured to have a second supply voltage different from the first supply voltage (see LEE, Fig.9 as shown above).
Claim(s) 5 is rejected under 35 U.S.C. 103 as being unpatentable over LEE et al. (U.S. 2016/0268243 A1, hereinafter refer to LEE) and Ouyang et al. (U.S. 2014/0291765 A1, hereinafter refer to Ouyang) as applied to claim 1 above, and further in view of Xu et al. (U.S. 2017/0194319 A1, hereinafter refer to Xu).
Regarding Claim 5: LEE as modified teaches an integrated circuit as applied to claim 1 above. The combination of LEE and Ouyang is silent upon explicitly disclosing wherein: the n-type well is a part of an n-type substrate, and
the p-type well is formed in the n-type substrate.
For support see Xu, which teaches wherein: the n-type well is a part of an n-type substrate (see Xu, ¶ [0021] and ¶ [0032]), and
the p-type well is formed in the n-type substrate (see Xu, ¶ [0021] and ¶ [0032]). Thus, it would have been obvious to one of ordinary skill in the art before effective filing date of the claimed invention to combine the teachings of LEE, Ouyang, and Xu to enable the n-type well is a part of an n-type substrate, and the p-type well to be formed in the n-type substrate as taught by Xu in order to improve device performance and chip area efficiency.
Conclusion
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/BITEW A DINKE/Primary Examiner, Art Unit 2812
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